VirtualBox

Changeset 80945 in vbox for trunk/src/VBox/Devices/Bus


Ignore:
Timestamp:
Sep 23, 2019 10:54:25 AM (6 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
133526
Message:

DevPciIch9: build fix. bugref:9218

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

    r80943 r80945  
    362362    LogFlowFunc(("Port=%#x u32=%#x cb=%d (config=%#10x)\n", uPort, u32, cb, pThis->uConfigReg));
    363363    NOREF(pvUser);
    364     int rc = VINF_SUCCESS;
     364    VBOXSTRICTRC rcStrict = VINF_SUCCESS;
    365365    if (!(uPort % cb))
    366366    {
    367367        PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_WRITE);
    368368
    369         do
     369        do /* do-brain-dead-while-false-utter-stupidity-loop */
    370370        {
    371371            /* Configuration space mapping enabled? */
     
    378378
    379379            /* Perform configuration space write */
    380             rc = ich9pciConfigWrite(pDevIns, pThis, &aPciAddr, u32, cb, VINF_IOM_R3_IOPORT_WRITE);
     380            rcStrict = ich9pciConfigWrite(pDevIns, pThis, &aPciAddr, u32, cb, VINF_IOM_R3_IOPORT_WRITE);
    381381        } while (0);
    382382
     
    385385    else
    386386        AssertMsgFailed(("Unaligned write to port %#x u32=%#x cb=%d\n", uPort, u32, cb));
    387     return rc;
     387    return VBOXSTRICTRC_TODO(rcStrict);
    388388}
    389389
     
    473473
    474474        /* Configuration space mapping enabled? */
    475         int rc;
     475        VBOXSTRICTRC rcStrict;
    476476        if (!(pThis->uConfigReg & (1 << 31)))
    477             rc = VINF_SUCCESS;
     477            rcStrict = VINF_SUCCESS;
    478478        else
    479479        {
     
    483483
    484484            /* Perform configuration space read */
    485             rc = ich9pciConfigRead(pThis, &aPciAddr, cb, pu32, VINF_IOM_R3_IOPORT_READ);
     485            rcStrict = ich9pciConfigRead(pThis, &aPciAddr, cb, pu32, VINF_IOM_R3_IOPORT_READ);
    486486        }
    487487
    488488        PCI_UNLOCK(pDevIns);
    489489
    490         LogFlowFunc(("Port=%#x cb=%#x (config=%#10x) -> %#x (%Rrc)\n", uPort, cb, *pu32, pThis->uConfigReg, rc));
    491         return rc;
     490        LogFlowFunc(("Port=%#x cb=%#x (config=%#10x) -> %#x (%Rrc)\n", uPort, cb, *pu32, pThis->uConfigReg, VBOXSTRICTRC_VAL(rcStrict)));
     491        return rcStrict;
    492492    }
    493493    AssertMsgFailed(("Unaligned read from port %#x cb=%d\n", uPort, cb));
     
    672672
    673673    /* Perform configuration space write */
    674     int rc = ich9pciConfigWrite(pDevIns, pPciRoot, &aDest, u32, cb, VINF_IOM_R3_MMIO_WRITE);
     674    VBOXSTRICTRC rcStrict = ich9pciConfigWrite(pDevIns, pPciRoot, &aDest, u32, cb, VINF_IOM_R3_MMIO_WRITE);
    675675    PCI_UNLOCK(pDevIns);
    676676
    677     return rc;
     677    return VBOXSTRICTRC_TODO(rcStrict);
    678678}
    679679
     
    696696{
    697697    PDEVPCIROOT pPciRoot = PDMINS_2_DATA(pDevIns, PDEVPCIROOT);
    698     uint32_t    rv;
    699698    NOREF(pvUser);
    700699
     
    708707
    709708    /* Perform configuration space read */
    710     int rc = ich9pciConfigRead(pPciRoot, &aDest, cb, &rv, VINF_IOM_R3_MMIO_READ);
    711 
    712     if (RT_SUCCESS(rc))
     709    uint32_t     u32Value;
     710    VBOXSTRICTRC rcStrict = ich9pciConfigRead(pPciRoot, &aDest, cb, &u32Value, VINF_IOM_R3_MMIO_READ);
     711    if (RT_SUCCESS(rcStrict)) /** @todo this is wrong, though it probably works fine due to double buffering... */
    713712    {
    714713        switch (cb)
    715714        {
    716715            case 1:
    717                 *(uint8_t*)pv   = (uint8_t)rv;
     716                *(uint8_t *)pv   = (uint8_t)u32Value;
    718717                break;
    719718            case 2:
    720                 *(uint16_t*)pv  = (uint16_t)rv;
     719                *(uint16_t *)pv  = (uint16_t)u32Value;
    721720                break;
    722721            case 4:
    723                 *(uint32_t*)pv  = (uint32_t)rv;
     722                *(uint32_t *)pv  = u32Value;
    724723                break;
    725724            default:
    726                 Assert(false);
     725                AssertFailed();
    727726                break;
    728727        }
    729728    }
     729
    730730    PCI_UNLOCK(pDevIns);
    731 
    732     return rc;
     731    return rcStrict;
    733732}
    734733
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