Changeset 81031 in vbox for trunk/src/VBox/Devices/USB

Timestamp:

Sep 26, 2019 7:26:33 PM (6 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

133634

Message:

PDM,Devices: Moving the PDMPCIDEV structures into the PDMDEVINS allocation. Preps for extending the config space to 4KB. bugref:9218

File:

• trunk/src/VBox/Devices/USB/DevOHCI.cpp (modified) (10 diffs)

trunk/src/VBox/Devices/USB/DevOHCI.cpp

@@ -255 +255 @@
 typedef struct OHCI
 {
-    /** The PCI device. */
-    PDMPCIDEV           PciDev;
-
     /** Pointer to the device instance - R3 ptr. */
     PPDMDEVINSR3        pDevInsR3;
@@ -4256 +4253 @@
     pThis->dqic = 0x7;
 
-    Log(("ohci: %s: Bus started\n", pThis->PciDev.pszNameR3));
+    Log(("ohci: Bus started\n"));
 
     pThis->SofTime = PDMDevHlpTMTimeVirtGet(pThis->CTX_SUFF(pDevIns));
@@ -4994 +4991 @@
     if ((val & (OHCI_RHA_NDP | OHCI_RHA_DT)) != OHCI_NDP_CFG(pThis))
     {
-        Log(("ohci: %s: invalid write to NDP or DT in roothub descriptor A!!! val=0x%.8x\n",
-             pThis->PciDev.pszNameR3, val));
+        Log(("ohci: invalid write to NDP or DT in roothub descriptor A!!! val=0x%.8x\n", val));
         val &= ~(OHCI_RHA_NDP | OHCI_RHA_DT);
         val |= OHCI_NDP_CFG(pThis);
@@ -5030 +5026 @@
 
     if ( pThis->RootHub.desc_b != val )
-        Log(("ohci: %s: unsupported write to root descriptor B!!! 0x%.8x -> 0x%.8x\n",
-             pThis->PciDev.pszNameR3, pThis->RootHub.desc_b, val));
+        Log(("ohci: unsupported write to root descriptor B!!! 0x%.8x -> 0x%.8x\n", pThis->RootHub.desc_b, val));
     pThis->RootHub.desc_b = val;
     return VINF_SUCCESS;
@@ -5075 +5070 @@
     {
         unsigned i;
-        Log2(("ohci: %s: global power up\n", pThis->PciDev.pszNameR3));
+        Log2(("ohci: global power up\n"));
         for (i = 0; i < OHCI_NDP_CFG(pThis); i++)
             ohciR3RhPortPower(&pThis->RootHub, i, true /* power up */);
@@ -5084 +5079 @@
     {
         unsigned i;
-        Log2(("ohci: %s: global power down\n", pThis->PciDev.pszNameR3));
+        Log2(("ohci: global power down\n"));
         for (i = 0; i < OHCI_NDP_CFG(pThis); i++)
             ohciR3RhPortPower(&pThis->RootHub, i, false /* power down */);
@@ -5468 +5463 @@
                                    RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
 {
-    RT_NOREF(iRegion, enmType);
-    POHCI pThis = (POHCI)pPciDev;
+    POHCI pThis = PDMINS_2_DATA(pDevIns, POHCI);
+    RT_NOREF(pPciDev, iRegion, enmType);
+    Assert(pPciDev == pDevIns->apPciDevs[0]);
+
     int rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /*pvUser*/,
                                    IOMMMIO_FLAGS_READ_DWORD | IOMMMIO_FLAGS_WRITE_DWORD_ZEROED
@@ -5961 +5958 @@
     pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
 
-    PCIDevSetVendorId     (&pThis->PciDev, 0x106b);
-    PCIDevSetDeviceId     (&pThis->PciDev, 0x003f);
-    PCIDevSetClassProg    (&pThis->PciDev, 0x10); /* OHCI */
-    PCIDevSetClassSub     (&pThis->PciDev, 0x03);
-    PCIDevSetClassBase    (&pThis->PciDev, 0x0c);
-    PCIDevSetInterruptPin (&pThis->PciDev, 0x01);
+    PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0];
+    PDMPCIDEV_ASSERT_VALID(pDevIns, pPciDev);
+
+    PDMPciDevSetVendorId(pPciDev,       0x106b);
+    PDMPciDevSetDeviceId(pPciDev,       0x003f);
+    PDMPciDevSetClassProg(pPciDev,      0x10); /* OHCI */
+    PDMPciDevSetClassSub(pPciDev,       0x03);
+    PDMPciDevSetClassBase(pPciDev,      0x0c);
+    PDMPciDevSetInterruptPin(pPciDev,   0x01);
 #ifdef VBOX_WITH_MSI_DEVICES
-    PCIDevSetStatus       (&pThis->PciDev, VBOX_PCI_STATUS_CAP_LIST);
-    PCIDevSetCapabilityList(&pThis->PciDev, 0x80);
+    PDMPciDevSetStatus(pPciDev,         VBOX_PCI_STATUS_CAP_LIST);
+    PDMPciDevSetCapabilityList(pPciDev, 0x80);
 #endif
 
@@ -6013 +6013 @@
      * Register PCI device and I/O region.
      */
-    rc = PDMDevHlpPCIRegister(pDevIns, &pThis->PciDev);
+    rc = PDMDevHlpPCIRegister(pDevIns, pPciDev);
     if (RT_FAILURE(rc))
         return rc;
@@ -6026 +6026 @@
     if (RT_FAILURE(rc))
     {
-        PCIDevSetCapabilityList(&pThis->PciDev, 0x0);
+        PDMPciDevSetCapabilityList(pPciDev, 0x0);
         /* That's OK, we can work without MSI */
     }