Changeset 81056 in vbox
- Timestamp:
- Sep 27, 2019 1:11:45 PM (5 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR0/IOMR0.cpp
r80960 r81056 131 131 pGVM->iomr0.s.paIoPortRegs[hIoPorts].idxStats = UINT16_MAX; 132 132 #endif 133 134 pGVM->iomr0.s.paIoPortRing3Regs[hIoPorts].fRing0 = true; 135 133 136 return VINF_SUCCESS; 134 137 } -
trunk/src/VBox/VMM/VMMR3/IOM.cpp
r80960 r81056 1816 1816 static DECLCALLBACK(void) iomR3IOPortInfo(PVM pVM, PCDBGFINFOHLP pHlp, const char *pszArgs) 1817 1817 { 1818 /* No locking needed here as registerations are only happening during VMSTATE_CREATING. */ 1819 pHlp->pfnPrintf(pHlp, 1820 "I/O port registrations: %u (%u allocated)\n" 1821 " ## Ctx Ports Mapping PCI Description\n", 1822 pVM->iom.s.cIoPortRegs, pVM->iom.s.cIoPortAlloc); 1823 PIOMIOPORTENTRYR3 paRegs = pVM->iom.s.paIoPortRegs; 1824 for (uint32_t i = 0; i < pVM->iom.s.cIoPortRegs; i++) 1825 { 1826 const char * const pszRing = paRegs[i].fRing0 ? paRegs[i].fRawMode ? "+0+C" : "+0 " 1827 : paRegs[i].fRawMode ? "+C " : " "; 1828 if (paRegs[i].fMapped && paRegs[i].pPciDev) 1829 pHlp->pfnPrintf(pHlp, "%3u R3%s %04x %04x-%04x pci%u/%u %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cPorts, 1830 paRegs[i].uPort, paRegs[i].uPort + paRegs[i].cPorts - 1, 1831 paRegs[i].pPciDev->idxSubDev, paRegs[i].iPciRegion, paRegs[i].pszDesc); 1832 else if (paRegs[i].fMapped && !paRegs[i].pPciDev) 1833 pHlp->pfnPrintf(pHlp, "%3u R3%s %04x %04x-%04x %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cPorts, 1834 paRegs[i].uPort, paRegs[i].uPort + paRegs[i].cPorts - 1, paRegs[i].pszDesc); 1835 else if (paRegs[i].pPciDev) 1836 pHlp->pfnPrintf(pHlp, "%3u R3%s %04x unmapped pci%u/%u %s\n", paRegs[i].idxSelf, pszRing, paRegs[i].cPorts, 1837 paRegs[i].pPciDev->idxSubDev, paRegs[i].iPciRegion, paRegs[i].pszDesc); 1838 else 1839 pHlp->pfnPrintf(pHlp, "%3u R3%s %04x unmapped %s\n", 1840 paRegs[i].idxSelf, pszRing, paRegs[i].cPorts, paRegs[i].pszDesc); 1841 } 1842 1843 /* Legacy registration: */ 1818 1844 NOREF(pszArgs); 1819 1845 pHlp->pfnPrintf(pHlp, … … 1825 1851 sizeof(RTHCPTR) * 2, "Out ", 1826 1852 sizeof(RTHCPTR) * 2, "pvUser "); 1853 IOM_LOCK_SHARED(pVM); 1827 1854 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR3, true, iomR3IOPortInfoOneR3, (void *)pHlp); 1855 IOM_UNLOCK_SHARED(pVM); 1828 1856 1829 1857 pHlp->pfnPrintf(pHlp, … … 1835 1863 sizeof(RTHCPTR) * 2, "Out ", 1836 1864 sizeof(RTHCPTR) * 2, "pvUser "); 1865 IOM_LOCK_SHARED(pVM); 1837 1866 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeR0, true, iomR3IOPortInfoOneR3, (void *)pHlp); 1838 1839 #if 0 1840 pHlp->pfnPrintf(pHlp, 1841 "I/O Port GC ranges (pVM=%p)\n" 1842 "Range %.*s %.*s %.*s %.*s Description\n", 1843 pVM, 1844 sizeof(RTRCPTR) * 2, "pDevIns ", 1845 sizeof(RTRCPTR) * 2, "In ", 1846 sizeof(RTRCPTR) * 2, "Out ", 1847 sizeof(RTRCPTR) * 2, "pvUser "); 1848 RTAvlroIOPortDoWithAll(&pVM->iom.s.pTreesR3->IOPortTreeRC, true, iomR3IOPortInfoOneRC, (void *)pHlp); 1849 #endif 1867 IOM_UNLOCK_SHARED(pVM); 1850 1868 } 1851 1869 -
trunk/src/VBox/VMM/include/IOMInternal.h
r80960 r81056 221 221 * Only updated when critsect is held exclusively. */ 222 222 bool fMapped; 223 /** Set if there is an ring-0 entry too. */ 224 bool fRing0; 225 /** Set if there is an raw-mode entry too. */ 226 bool fRawMode; 227 bool fUnused; 223 228 /** Same as the handle index. */ 224 229 uint16_t idxSelf; 225 230 } IOMIOPORTENTRYR3; 231 AssertCompileSize(IOMIOPORTENTRYR3, 9 * sizeof(RTR3PTR) + 16); 226 232 /** Pointer to a ring-3 I/O port handle table entry. */ 227 233 typedef IOMIOPORTENTRYR3 *PIOMIOPORTENTRYR3;
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