Changeset 81136 in vbox for trunk/src/VBox
- Timestamp:
- Oct 8, 2019 8:26:49 AM (5 years ago)
- svn:sync-xref-src-repo-rev:
- 133769
- Location:
- trunk/src/VBox
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Bus/DevPCI.cpp
r81048 r81136 806 806 */ 807 807 static DECLCALLBACK(VBOXSTRICTRC) 808 pciIOPortAddressWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)809 { 810 LogFunc((" uPort=%#x u32=%#x cb=%d\n", uPort, u32, cb));811 RT_NOREF2(uPort, pvUser);808 pciIOPortAddressWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 809 { 810 LogFunc(("offPort=%#x u32=%#x cb=%d\n", offPort, u32, cb)); 811 Assert(offPort == 0); RT_NOREF2(offPort, pvUser); 812 812 if (cb == 4) 813 813 { … … 827 827 */ 828 828 static DECLCALLBACK(VBOXSTRICTRC) 829 pciIOPortAddressRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb)830 { 831 RT_NOREF2(uPort, pvUser);829 pciIOPortAddressRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 830 { 831 Assert(offPort == 0); RT_NOREF2(offPort, pvUser); 832 832 if (cb == 4) 833 833 { … … 836 836 *pu32 = pThis->uConfigReg; 837 837 PCI_UNLOCK(pDevIns); 838 LogFunc((" uPort=%#x cb=%d -> %#x\n", uPort, cb, *pu32));838 LogFunc(("offPort=%#x cb=%d -> %#x\n", offPort, cb, *pu32)); 839 839 return VINF_SUCCESS; 840 840 } 841 841 /* else: 440FX does "pass through to the bus" for other writes, what ever that means. 842 842 * Linux probes for cmd640 using byte writes/reads during ide init. We'll just ignore it. */ 843 LogFunc((" uPort=%#x cb=%d VERR_IOM_IOPORT_UNUSED\n", uPort, cb));843 LogFunc(("offPort=%#x cb=%d VERR_IOM_IOPORT_UNUSED\n", offPort, cb)); 844 844 return VERR_IOM_IOPORT_UNUSED; 845 845 } … … 850 850 */ 851 851 static DECLCALLBACK(VBOXSTRICTRC) 852 pciIOPortDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)853 { 854 LogFunc((" uPort=%#x u32=%#x cb=%d\n", uPort, u32, cb));855 NOREF(pvUser);852 pciIOPortDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 853 { 854 LogFunc(("offPort=%#x u32=%#x cb=%d\n", offPort, u32, cb)); 855 Assert(offPort < 4); NOREF(pvUser); 856 856 VBOXSTRICTRC rcStrict = VINF_SUCCESS; 857 if (!( uPort % cb))857 if (!(offPort % cb)) 858 858 { 859 859 PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_WRITE); 860 rcStrict = pci_data_write(pDevIns, PDMINS_2_DATA(pDevIns, PDEVPCIROOT), uPort, u32, cb);860 rcStrict = pci_data_write(pDevIns, PDMINS_2_DATA(pDevIns, PDEVPCIROOT), offPort, u32, cb); 861 861 PCI_UNLOCK(pDevIns); 862 862 } 863 863 else 864 AssertMsgFailed(("Write to port %#x u32=%#x cb=%d\n", uPort, u32, cb));864 AssertMsgFailed(("Write to port %#x u32=%#x cb=%d\n", offPort, u32, cb)); 865 865 return rcStrict; 866 866 } … … 871 871 */ 872 872 static DECLCALLBACK(VBOXSTRICTRC) 873 pciIOPortDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb)874 { 875 NOREF(pvUser);876 if (!( uPort % cb))873 pciIOPortDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 874 { 875 Assert(offPort < 4); NOREF(pvUser); 876 if (!(offPort % cb)) 877 877 { 878 878 PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_READ); 879 VBOXSTRICTRC rcStrict = pci_data_read(PDMINS_2_DATA(pDevIns, PDEVPCIROOT), uPort, cb, pu32);879 VBOXSTRICTRC rcStrict = pci_data_read(PDMINS_2_DATA(pDevIns, PDEVPCIROOT), offPort, cb, pu32); 880 880 PCI_UNLOCK(pDevIns); 881 LogFunc((" uPort=%#x cb=%#x -> %#x (%Rrc)\n", uPort, cb, *pu32, VBOXSTRICTRC_VAL(rcStrict)));881 LogFunc(("offPort=%#x cb=%#x -> %#x (%Rrc)\n", offPort, cb, *pu32, VBOXSTRICTRC_VAL(rcStrict))); 882 882 return rcStrict; 883 883 } 884 AssertMsgFailed(("Read from port %#x cb=%d\n", uPort, cb));884 AssertMsgFailed(("Read from port %#x cb=%d\n", offPort, cb)); 885 885 return VERR_IOM_IOPORT_UNUSED; 886 886 } … … 892 892 */ 893 893 static DECLCALLBACK(VBOXSTRICTRC) 894 pciR3IOPortMagicPCIWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)895 { 896 RT_NOREF2(pvUser, uPort);897 LogFunc((" uPort=%#x u32=%#x cb=%d\n", uPort, u32, cb));894 pciR3IOPortMagicPCIWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 895 { 896 Assert(offPort == 0); RT_NOREF2(pvUser, offPort); 897 LogFunc(("offPort=%#x u32=%#x cb=%d\n", offPort, u32, cb)); 898 898 if (cb == 4) 899 899 { … … 912 912 */ 913 913 static DECLCALLBACK(VBOXSTRICTRC) 914 pciR3IOPortMagicPCIRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb)915 { 916 RT_NOREF5(pDevIns, pvUser, uPort, pu32, cb);917 LogFunc((" uPort=%#x cb=%d VERR_IOM_IOPORT_UNUSED\n", uPort, cb));914 pciR3IOPortMagicPCIRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 915 { 916 Assert(offPort == 0); RT_NOREF5(pDevIns, pvUser, offPort, pu32, cb); 917 LogFunc(("offPort=%#x cb=%d VERR_IOM_IOPORT_UNUSED\n", offPort, cb)); 918 918 return VERR_IOM_IOPORT_UNUSED; 919 919 } -
trunk/src/VBox/Devices/Bus/DevPciIch9.cpp
r81051 r81136 215 215 } 216 216 217 218 217 #ifdef IN_RING3 219 218 … … 223 222 */ 224 223 static DECLCALLBACK(VBOXSTRICTRC) 225 ich9pciR3IOPortMagicPCIWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)226 { 227 RT_NOREF2(pvUser, uPort);228 LogFlowFunc((" Port=%#x u32=%#x cb=%d\n", uPort, u32, cb));224 ich9pciR3IOPortMagicPCIWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 225 { 226 Assert(offPort == 0); RT_NOREF2(pvUser, offPort); 227 LogFlowFunc(("offPort=%#x u32=%#x cb=%d\n", offPort, u32, cb)); 229 228 if (cb == 4) 230 229 { … … 245 244 */ 246 245 static DECLCALLBACK(VBOXSTRICTRC) 247 ich9pciR3IOPortMagicPCIRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb)248 { 249 RT_NOREF5(pDevIns, pvUser, uPort, pu32, cb);250 LogFunc((" Port=%#x cb=%d VERR_IOM_IOPORT_UNUSED\n", uPort, cb));246 ich9pciR3IOPortMagicPCIRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 247 { 248 Assert(offPort == 0); RT_NOREF5(pDevIns, pvUser, offPort, pu32, cb); 249 LogFunc(("offPort=%#x cb=%d VERR_IOM_IOPORT_UNUSED\n", offPort, cb)); 251 250 return VERR_IOM_IOPORT_UNUSED; 252 251 } 253 252 254 253 #endif /* IN_RING3 */ 255 256 254 257 255 /** … … 263 261 */ 264 262 static DECLCALLBACK(VBOXSTRICTRC) 265 ich9pciIOPortAddressWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)266 { 267 LogFlowFunc((" Port=%#x u32=%#x cb=%d\n", uPort, u32, cb));268 RT_NOREF2(uPort, pvUser);263 ich9pciIOPortAddressWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 264 { 265 LogFlowFunc(("offPort=%#x u32=%#x cb=%d\n", offPort, u32, cb)); 266 Assert(offPort == 0); RT_NOREF2(offPort, pvUser); 269 267 if (cb == 4) 270 268 { … … 294 292 */ 295 293 static DECLCALLBACK(VBOXSTRICTRC) 296 ich9pciIOPortAddressRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb)297 { 298 RT_NOREF2(uPort, pvUser);294 ich9pciIOPortAddressRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 295 { 296 Assert(offPort == 0); RT_NOREF2(offPort, pvUser); 299 297 if (cb == 4) 300 298 { … … 305 303 PCI_UNLOCK(pDevIns); 306 304 307 LogFlowFunc((" Port=%#x cb=%d -> %#x\n", uPort, cb, *pu32));305 LogFlowFunc(("offPort=%#x cb=%d -> %#x\n", offPort, cb, *pu32)); 308 306 return VINF_SUCCESS; 309 307 } 310 308 311 LogFunc((" Port=%#x cb=%d VERR_IOM_IOPORT_UNUSED\n", uPort, cb));309 LogFunc(("offPort=%#x cb=%d VERR_IOM_IOPORT_UNUSED\n", offPort, cb)); 312 310 return VERR_IOM_IOPORT_UNUSED; 313 311 } … … 374 372 */ 375 373 static DECLCALLBACK(VBOXSTRICTRC) 376 ich9pciIOPortDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)374 ich9pciIOPortDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 377 375 { 378 376 PDEVPCIROOT pThis = PDMINS_2_DATA(pDevIns, PDEVPCIROOT); 379 LogFlowFunc((" Port=%#x u32=%#x cb=%d (config=%#10x)\n", uPort, u32, cb, pThis->uConfigReg));380 NOREF(pvUser);377 LogFlowFunc(("offPort=%u u32=%#x cb=%d (config=%#10x)\n", offPort, u32, cb, pThis->uConfigReg)); 378 Assert(offPort < 4); NOREF(pvUser); 381 379 382 380 VBOXSTRICTRC rcStrict = VINF_SUCCESS; 383 if (!( uPort % cb))381 if (!(offPort % cb)) 384 382 { 385 383 PCI_LOCK(pDevIns, VINF_IOM_R3_IOPORT_WRITE); … … 390 388 /* Decode target device from Configuration Address Port */ 391 389 PciAddress aPciAddr; 392 ich9pciStateToPciAddr(pThis, uPort, &aPciAddr);390 ich9pciStateToPciAddr(pThis, offPort, &aPciAddr); 393 391 394 392 /* Perform configuration space write */ … … 399 397 } 400 398 else 401 AssertMsgFailed(("Unaligned write to port %#x u32=%#x cb=%d\n", uPort, u32, cb));399 AssertMsgFailed(("Unaligned write to offPort=%u u32=%#x cb=%d\n", offPort, u32, cb)); 402 400 403 401 return rcStrict; … … 472 470 */ 473 471 static DECLCALLBACK(VBOXSTRICTRC) 474 ich9pciIOPortDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb)472 ich9pciIOPortDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 475 473 { 476 474 NOREF(pvUser); 477 if (!(uPort % cb)) 475 Assert(offPort < 4); 476 if (!(offPort % cb)) 478 477 { 479 478 PDEVPCIROOT pThis = PDMINS_2_DATA(pDevIns, PDEVPCIROOT); … … 490 489 /* Decode target device and configuration space register */ 491 490 PciAddress aPciAddr; 492 ich9pciStateToPciAddr(pThis, uPort, &aPciAddr);491 ich9pciStateToPciAddr(pThis, offPort, &aPciAddr); 493 492 494 493 /* Perform configuration space read */ … … 498 497 PCI_UNLOCK(pDevIns); 499 498 500 LogFlowFunc((" Port=%#x cb=%#x (config=%#10x) -> %#x (%Rrc)\n", uPort, cb, *pu32, pThis->uConfigReg, VBOXSTRICTRC_VAL(rcStrict)));499 LogFlowFunc(("offPort=%u cb=%#x (config=%#10x) -> %#x (%Rrc)\n", offPort, cb, *pu32, pThis->uConfigReg, VBOXSTRICTRC_VAL(rcStrict))); 501 500 return rcStrict; 502 501 } 503 AssertMsgFailed(("Unaligned read from port %#x cb=%d\n", uPort, cb));502 AssertMsgFailed(("Unaligned read from offPort=%u cb=%d\n", offPort, cb)); 504 503 return VERR_IOM_IOPORT_UNUSED; 505 504 } -
trunk/src/VBox/Devices/PC/DevRTC.cpp
r80960 r81136 348 348 * @callback_method_impl{FNIOMIOPORTIN} 349 349 */ 350 PDMBOTHCBDECL(VBOXSTRICTRC) rtcIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb)350 PDMBOTHCBDECL(VBOXSTRICTRC) rtcIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 351 351 { 352 352 NOREF(pvUser); 353 Assert(offPort < 4); 354 353 355 if (cb != 1) 354 356 return VERR_IOM_IOPORT_UNUSED; 355 357 356 358 PRTCSTATE pThis = PDMINS_2_DATA(pDevIns, PRTCSTATE); 357 if (( uPort & 1) == 0)359 if ((offPort & 1) == 0) 358 360 *pu32 = 0xff; 359 361 else 360 362 { 361 unsigned bank = ( uPort >> 1) & 1;363 unsigned bank = (offPort >> 1) & 1; 362 364 switch (pThis->cmos_index[bank]) 363 365 { … … 406 408 * @callback_method_impl{FNIOMIOPORTOUT} 407 409 */ 408 PDMBOTHCBDECL(VBOXSTRICTRC) rtcIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)410 PDMBOTHCBDECL(VBOXSTRICTRC) rtcIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 409 411 { 410 412 NOREF(pvUser); 413 Assert(offPort < 4); 414 411 415 if (cb != 1) 412 416 return VINF_SUCCESS; 413 417 414 418 PRTCSTATE pThis = PDMINS_2_DATA(pDevIns, PRTCSTATE); 415 uint32_t bank = ( uPort >> 1) & 1;416 if (( uPort & 1) == 0)419 uint32_t bank = (offPort >> 1) & 1; 420 if ((offPort & 1) == 0) 417 421 { 418 422 pThis->cmos_index[bank] = (u32 & 0x7f) + (bank * CMOS_BANK_SIZE); -
trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r80960 r81136 104 104 * Found an entry, get the data so we can leave the IOM lock. 105 105 */ 106 uint16_t const fFlags = pRegEntry->fFlags; 106 107 PFNIOMIOPORTNEWIN pfnInCallback = pRegEntry->pfnInCallback; 107 108 PPDMDEVINS pDevIns = pRegEntry->pDevIns; … … 130 131 { 131 132 STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfIn), a); 132 rcStrict = pfnInCallback(pDevIns, pvUser, Port, pu32Value, (unsigned)cbValue);133 rcStrict = pfnInCallback(pDevIns, pvUser, fFlags & IOM_IOPORT_F_ABS ? Port : offPort, pu32Value, (unsigned)cbValue); 133 134 STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfIn), a); 134 135 PDMCritSectLeave(pDevIns->CTX_SUFF(pCritSectRo)); … … 349 350 * Found an entry, get the data so we can leave the IOM lock. 350 351 */ 352 uint16_t const fFlags = pRegEntry->fFlags; 351 353 PFNIOMIOPORTNEWINSTRING pfnInStrCallback = pRegEntry->pfnInStrCallback; 352 354 PFNIOMIOPORTNEWIN pfnInCallback = pRegEntry->pfnInCallback; … … 381 383 { 382 384 STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfIn), a); 383 rcStrict = pfnInStrCallback(pDevIns, pvUser, uPort, (uint8_t *)pvDst, pcTransfers, cb); 385 rcStrict = pfnInStrCallback(pDevIns, pvUser, fFlags & IOM_IOPORT_F_ABS ? uPort : offPort, 386 (uint8_t *)pvDst, pcTransfers, cb); 384 387 STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfIn), a); 385 388 } … … 396 399 uint32_t u32Value = 0; 397 400 STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfIn), a); 398 rcStrict = pfnInCallback(pDevIns, pvUser, uPort, &u32Value, cb);401 rcStrict = pfnInCallback(pDevIns, pvUser, fFlags & IOM_IOPORT_F_ABS ? uPort : offPort, &u32Value, cb); 399 402 STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfIn), a); 400 403 if (rcStrict == VERR_IOM_IOPORT_UNUSED) … … 671 674 * Found an entry, get the data so we can leave the IOM lock. 672 675 */ 676 uint16_t const fFlags = pRegEntry->fFlags; 673 677 PFNIOMIOPORTNEWOUT pfnOutCallback = pRegEntry->pfnOutCallback; 674 678 PPDMDEVINS pDevIns = pRegEntry->pDevIns; … … 697 701 { 698 702 STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfOut), a); 699 rcStrict = pfnOutCallback(pDevIns, pvUser, Port, u32Value, (unsigned)cbValue);703 rcStrict = pfnOutCallback(pDevIns, pvUser, fFlags & IOM_IOPORT_F_ABS ? Port : offPort, u32Value, (unsigned)cbValue); 700 704 STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfOut), a); 701 705 … … 892 896 * Found an entry, get the data so we can leave the IOM lock. 893 897 */ 898 uint16_t const fFlags = pRegEntry->fFlags; 894 899 PFNIOMIOPORTNEWOUTSTRING pfnOutStrCallback = pRegEntry->pfnOutStrCallback; 895 900 PFNIOMIOPORTNEWOUT pfnOutCallback = pRegEntry->pfnOutCallback; … … 924 929 { 925 930 STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfOut), a); 926 rcStrict = pfnOutStrCallback(pDevIns, pvUser, uPort, (uint8_t const *)pvSrc, pcTransfers, cb); 931 rcStrict = pfnOutStrCallback(pDevIns, pvUser, fFlags & IOM_IOPORT_F_ABS ? uPort : offPort, 932 (uint8_t const *)pvSrc, pcTransfers, cb); 927 933 STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfOut), a); 928 934 } … … 946 952 } 947 953 STAM_PROFILE_START(&pStats->CTX_SUFF_Z(ProfOut), a); 948 rcStrict = pfnOutCallback(pDevIns, pvUser, uPort, u32Value, cb);954 rcStrict = pfnOutCallback(pDevIns, pvUser, fFlags & IOM_IOPORT_F_ABS ? uPort : offPort, u32Value, cb); 949 955 STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfOut), a); 950 956 if (IOM_SUCCESS(rcStrict)) -
trunk/src/VBox/VMM/VMMR0/IOMR0.cpp
r81056 r81136 111 111 AssertPtrNullReturn(pfnInStr, VERR_INVALID_POINTER); 112 112 113 uint16_t const fFlags = pGVM->iomr0.s.paIoPortRing3Regs[hIoPorts].fFlags; 113 114 RTIOPORT const cPorts = pGVM->iomr0.s.paIoPortRing3Regs[hIoPorts].cPorts; 114 115 AssertMsgReturn(cPorts > 0 && cPorts <= _8K, ("cPorts=%s\n", cPorts), VERR_IOM_INVALID_IOPORT_HANDLE); … … 124 125 pGVM->iomr0.s.paIoPortRegs[hIoPorts].pfnInStrCallback = pfnInStr; 125 126 pGVM->iomr0.s.paIoPortRegs[hIoPorts].cPorts = cPorts; 127 pGVM->iomr0.s.paIoPortRegs[hIoPorts].fFlags = fFlags; 126 128 #ifdef VBOX_WITH_STATISTICS 127 129 uint16_t const idxStats = pGVM->iomr0.s.paIoPortRing3Regs[hIoPorts].idxStats; -
trunk/src/VBox/VMM/VMMR3/IOM.cpp
r81056 r81136 471 471 472 472 AssertMsgReturn(cPorts > 0 && cPorts <= _8K, ("cPorts=%s\n", cPorts), VERR_OUT_OF_RANGE); 473 AssertReturn(! fFlags, VERR_INVALID_FLAGS);473 AssertReturn(!(fFlags & ~IOM_IOPORT_F_VALID_MASK), VERR_INVALID_FLAGS); 474 474 475 475 AssertReturn(pfnOut || pfnIn || pfnOutStr || pfnInStr, VERR_INVALID_PARAMETER); … … 540 540 pVM->iom.s.paIoPortRegs[idx].idxStats = (uint16_t)idxStats; 541 541 pVM->iom.s.paIoPortRegs[idx].fMapped = false; 542 pVM->iom.s.paIoPortRegs[idx].fFlags = (uint8_t)fFlags; 542 543 pVM->iom.s.paIoPortRegs[idx].idxSelf = idx; 543 544 -
trunk/src/VBox/VMM/include/IOMInternal.h
r81056 r81136 180 180 /** Same as the handle index. */ 181 181 uint16_t idxSelf; 182 /** IOM_IOPORT_F_XXX (copied from ring-3). */ 183 uint16_t fFlags; 182 184 } IOMIOPORTENTRYR0; 183 185 /** Pointer to a ring-0 I/O port handle table entry. */ … … 225 227 /** Set if there is an raw-mode entry too. */ 226 228 bool fRawMode; 227 bool fUnused; 229 /** IOM_IOPORT_F_XXX */ 230 uint8_t fFlags; 228 231 /** Same as the handle index. */ 229 232 uint16_t idxSelf;
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