Changeset 81375 in vbox for trunk/src/VBox/Devices/Bus

Timestamp:

Oct 19, 2019 1:57:55 PM (6 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

134088

Message:

IOM,PDM,PCI: Making new MMIO code work with PCI. bugref:9218

Location:

trunk/src/VBox/Devices/Bus

Files:

• DevPciIch9.cpp (modified) (10 diffs)
• DevPciInternal.h (modified) (1 diff)

trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

@@ -1039 +1039 @@
  * @interface_method_impl{PDMPCIBUSREGR3,pfnIORegionRegisterR3}
  */
-DECLCALLBACK(int) devpciR3CommonIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iRegion, RTGCPHYS cbRegion,
-                                                 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
-{
-    NOREF(pDevIns);
+DECLCALLBACK(int) devpciR3CommonIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
+                                                 RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags,
+                                                 uint64_t hHandle, PFNPCIIOREGIONMAP pfnCallback)
+{
+    LogFunc(("%s: region #%u size %RGp type %x fFlags=%#x hHandle=%#RX64\n",
+             pPciDev->pszNameR3, iRegion, cbRegion, enmType, fFlags, hHandle));
+    RT_NOREF(pDevIns);
 
     /*
@@ -1063 +1066 @@
                     ("Invalid cbRegion=%RGp iLastSet=%#x (not a power of 2 or 0)\n", cbRegion, iLastSet),
                     VERR_INVALID_PARAMETER);
-
-    LogFunc(("%s region %d size %RGp type %x\n", pPciDev->pszNameR3, iRegion, cbRegion, enmType));
+    switch (fFlags & PDMPCIDEV_IORGN_F_HANDLE_MASK)
+    {
+        case PDMPCIDEV_IORGN_F_IOPORT_HANDLE:
+        case PDMPCIDEV_IORGN_F_MMIO_HANDLE:
+        case PDMPCIDEV_IORGN_F_MMIO2_HANDLE:
+            AssertReturn(hHandle != UINT64_MAX, VERR_INVALID_HANDLE);
+            break;
+        default:
+            AssertReturn(hHandle == UINT64_MAX, VERR_INVALID_HANDLE);
+    }
 
     /* Make sure that we haven't marked this region as continuation of 64-bit region. */
-    Assert(pPciDev->Int.s.aIORegions[iRegion].type != 0xff);
+    AssertReturn(pPciDev->Int.s.aIORegions[iRegion].type != 0xff, VERR_NOT_AVAILABLE);
 
     /*
@@ -1075 +1086 @@
     pRegion->addr        = INVALID_PCI_ADDRESS;
     pRegion->size        = cbRegion;
+    pRegion->fFlags      = fFlags;
+    pRegion->hHandle     = hHandle;
     pRegion->type        = enmType;
-    pRegion->map_func    = pfnCallback;
+    pRegion->pfnMap      = pfnCallback;
 
     if ((enmType & PCI_ADDRESS_SPACE_BAR64) != 0)
@@ -2524 +2537 @@
 static int devpciR3UnmapRegion(PPDMDEVINS pDevIns, PPDMPCIDEV pDev, int iRegion)
 {
-    PCIIORegion *pRegion = &pDev->Int.s.aIORegions[iRegion];
+    PPCIIOREGION pRegion = &pDev->Int.s.aIORegions[iRegion];
     AssertReturn(pRegion->size != 0, VINF_SUCCESS);
 
-    int rc;
-    if (pRegion->addr == INVALID_PCI_ADDRESS)
-        rc = VINF_SUCCESS;
-    else
-    {
-        if (pRegion->type & PCI_ADDRESS_SPACE_IO)
-        {
-            /* Port IO */
-            rc = PDMDevHlpIOPortDeregister(pDev->Int.s.pDevInsR3, pRegion->addr, pRegion->size);
-            AssertRC(rc);
+    int rc = VINF_SUCCESS;
+    if (pRegion->addr != INVALID_PCI_ADDRESS)
+    {
+        if (pRegion->hHandle != UINT64_MAX)
+        {
+            /*
+             * New style device with a IOM handle.  Do callout first (optional),
+             * then do the unmapping via handle.
+             */
+            if (pRegion->pfnMap)
+            {
+                rc = pRegion->pfnMap(pDev->Int.s.pDevInsR3, pDev, iRegion,
+                                     NIL_RTGCPHYS, pRegion->size, (PCIADDRESSSPACE)(pRegion->type));
+                AssertRC(rc);
+            }
+
+            switch (pRegion->fFlags & PDMPCIDEV_IORGN_F_HANDLE_MASK)
+            {
+                case PDMPCIDEV_IORGN_F_IOPORT_HANDLE:
+                    rc = PDMDevHlpIoPortUnmap(pDev->Int.s.pDevInsR3, (IOMIOPORTHANDLE)pRegion->hHandle);
+                    AssertRC(rc);
+                    break;
+
+                case PDMPCIDEV_IORGN_F_MMIO_HANDLE:
+                    rc = PDMDevHlpMmioUnmap(pDev->Int.s.pDevInsR3, (IOMMMIOHANDLE)pRegion->hHandle);
+                    AssertRC(rc);
+                    break;
+
+                default:
+                    AssertLogRelFailed();
+            }
         }
         else
         {
-            PDEVPCIBUSCC pBusCC     = PDMINS_2_DATA_CC(pDevIns, PDEVPCIBUSCC);
-            RTGCPHYS     GCPhysBase = pRegion->addr;
-            if (pBusCC->pPciHlpR3->pfnIsMMIOExBase(pDevIns, pDev->Int.s.pDevInsR3, GCPhysBase))
+            /*
+             * Old style device, no handle here and only MMIOEx gets callouts.
+             */
+            if (pRegion->type & PCI_ADDRESS_SPACE_IO)
             {
-                /* unmap it. */
-                rc = pRegion->map_func(pDev->Int.s.pDevInsR3, pDev, iRegion,
-                                       NIL_RTGCPHYS, pRegion->size, (PCIADDRESSSPACE)(pRegion->type));
+                /* Port IO */
+                rc = PDMDevHlpIOPortDeregister(pDev->Int.s.pDevInsR3, pRegion->addr, pRegion->size);
                 AssertRC(rc);
-                rc = PDMDevHlpMMIOExUnmap(pDev->Int.s.pDevInsR3, pDev, iRegion, GCPhysBase);
             }
             else
-                rc = PDMDevHlpMMIODeregister(pDev->Int.s.pDevInsR3, GCPhysBase, pRegion->size);
-            AssertRC(rc);
+            {
+                PDEVPCIBUSCC pBusCC     = PDMINS_2_DATA_CC(pDevIns, PDEVPCIBUSCC);
+                RTGCPHYS     GCPhysBase = pRegion->addr;
+                if (pBusCC->pPciHlpR3->pfnIsMMIOExBase(pDevIns, pDev->Int.s.pDevInsR3, GCPhysBase))
+                {
+                    /* unmap it. */
+                    rc = pRegion->pfnMap(pDev->Int.s.pDevInsR3, pDev, iRegion,
+                                         NIL_RTGCPHYS, pRegion->size, (PCIADDRESSSPACE)(pRegion->type));
+                    AssertRC(rc);
+                    rc = PDMDevHlpMMIOExUnmap(pDev->Int.s.pDevInsR3, pDev, iRegion, GCPhysBase);
+                }
+                else
+                    rc = PDMDevHlpMMIODeregister(pDev->Int.s.pDevInsR3, GCPhysBase, pRegion->size);
+                AssertRC(rc);
+            }
         }
         pRegion->addr = INVALID_PCI_ADDRESS;
@@ -2579 +2625 @@
         if (fP2PBridge && iRegion >= 2 && iRegion <= 5)
             continue;
-        PCIIORegion   *pRegion  = &pPciDev->Int.s.aIORegions[iRegion];
+        PCIIOREGION   *pRegion  = &pPciDev->Int.s.aIORegions[iRegion];
         uint64_t const cbRegion = pRegion->size;
         if (cbRegion != 0)
@@ -2662 +2708 @@
             /*
              * Do real unmapping and/or mapping if the address change.
+             *
+             * For new style device we'll do the actual mapping, whereas old ones
+             * are expected to do it themselves via the callback.
              */
             Log4(("devpciR3UpdateMappings: dev %u/%u (%s): iRegion=%u addr=%#RX64 uNew=%#RX64\n",
@@ -2672 +2721 @@
                          pPciDev->pszNameR3, iRegion, pRegion->addr, uNew, cbRegion, cbRegion));
 
-                devpciR3UnmapRegion(pDevIns, pPciDev, iRegion);
+                int rc = devpciR3UnmapRegion(pDevIns, pPciDev, iRegion);
+                AssertLogRelRC(rc);
                 pRegion->addr = uNew;
                 if (uNew != INVALID_PCI_ADDRESS)
                 {
-                    int rc = pRegion->map_func(pPciDev->Int.s.pDevInsR3, pPciDev, iRegion, uNew, cbRegion,
-                                               (PCIADDRESSSPACE)pRegion->type);
-                    AssertRC(rc);
+                    /* The callout is optional with new style devices: */
+                    int rc;
+                    if (pRegion->pfnMap)
+                    {
+                        rc = pRegion->pfnMap(pPciDev->Int.s.pDevInsR3, pPciDev, iRegion,
+                                             uNew, cbRegion, (PCIADDRESSSPACE)(pRegion->type));
+                        AssertLogRelRC(rc);
+                    }
+
+                    /* We do the mapping for new-style devices: */
+                    if (pRegion->hHandle != UINT64_MAX)
+                    {
+                        switch (pRegion->fFlags & PDMPCIDEV_IORGN_F_HANDLE_MASK)
+                        {
+                            case PDMPCIDEV_IORGN_F_IOPORT_HANDLE:
+                                rc = PDMDevHlpIoPortMap(pPciDev->Int.s.pDevInsR3, (IOMIOPORTHANDLE)pRegion->hHandle, (RTIOPORT)uNew);
+                                AssertLogRelRC(rc);
+                                break;
+
+                            case PDMPCIDEV_IORGN_F_MMIO_HANDLE:
+                                rc = PDMDevHlpMmioMap(pPciDev->Int.s.pDevInsR3, (IOMMMIOHANDLE)pRegion->hHandle, uNew);
+                                AssertLogRelRC(rc);
+                                break;
+
+                            default:
+                                AssertLogRelFailed();
+                        }
+                    }
                 }
             }
@@ -2702 +2777 @@
 DECLINLINE(void) devpciR3WriteBarByte(PPDMPCIDEV pPciDev, uint32_t iRegion, uint32_t off, uint8_t bVal)
 {
-    PCIIORegion *pRegion = &pPciDev->Int.s.aIORegions[iRegion];
+    PCIIOREGION *pRegion = &pPciDev->Int.s.aIORegions[iRegion];
     Log3Func(("region=%d off=%d val=%#x size=%#llx\n", iRegion, off, bVal, pRegion->size));
     Assert(off <= 3);
@@ -3073 +3148 @@
             for (unsigned iRegion = 0; iRegion < VBOX_PCI_NUM_REGIONS; iRegion++)
             {
-                PCIIORegion const *pRegion  = &pPciDev->Int.s.aIORegions[iRegion];
+                PCIIOREGION const *pRegion  = &pPciDev->Int.s.aIORegions[iRegion];
                 uint64_t const     cbRegion = pRegion->size;
 
@@ -3431 +3506 @@
     for (int iRegion = 0; iRegion < VBOX_PCI_NUM_REGIONS; iRegion++)
     {
-        PCIIORegion* pRegion = &pDev->Int.s.aIORegions[iRegion];
+        PCIIOREGION *pRegion = &pDev->Int.s.aIORegions[iRegion];
         if (pRegion->size == 0)
             continue;

trunk/src/VBox/Devices/Bus/DevPciInternal.h

@@ -210 +210 @@
 DECLCALLBACK(int)  devpcibridgeR3CommonRegisterDevice(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t fFlags,
                                                       uint8_t uPciDevNo, uint8_t uPciFunNo, const char *pszName);
-DECLCALLBACK(int)  devpciR3CommonIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iRegion, RTGCPHYS cbRegion,
-                                                  PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback);
+DECLCALLBACK(int)  devpciR3CommonIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
+                                                  RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags,
+                                                  uint64_t hHandle, PFNPCIIOREGIONMAP pfnCallback);
 DECLCALLBACK(void) devpciR3CommonInterceptConfigAccesses(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
                                                          PFNPCICONFIGREAD pfnRead, PFNPCICONFIGWRITE pfnWrite);