VirtualBox

Changeset 81375 in vbox for trunk/src/VBox/VMM


Ignore:
Timestamp:
Oct 19, 2019 1:57:55 PM (5 years ago)
Author:
vboxsync
Message:

IOM,PDM,PCI: Making new MMIO code work with PCI. bugref:9218

Location:
trunk/src/VBox/VMM
Files:
7 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/VMMAll/IOMAllMmioNew.cpp

    r81369 r81375  
    701701
    702702
     703#ifndef IN_RING3
    703704/**
    704705 * @callback_method_impl{FNPGMRZPHYSPFHANDLER,
    … …  
    710711                                             RTGCPTR pvFault, RTGCPHYS GCPhysFault, void *pvUser)
    711712{
    712     LogFlow(("iomMmioPfHandler: GCPhys=%RGp uErr=%#x pvFault=%RGv rip=%RGv\n",
     713    STAM_COUNTER_INC(&pVM->iom.s.StatMmioPfHandlerNew);
     714    LogFlow(("iomMmioPfHandlerNew: GCPhys=%RGp uErr=%#x pvFault=%RGv rip=%RGv\n",
    713715             GCPhysFault, (uint32_t)uErrorCode, pvFault, (RTGCPTR)pCtxCore->rip));
    714716    RT_NOREF(pvFault, pCtxCore);
    … …  
    716718    /* Translate the MMIO handle to a registration entry for the current context. */
    717719    AssertReturn((uintptr_t)pvUser < RT_MIN(pVM->iom.s.cMmioRegs, pVM->iom.s.cMmioAlloc), VERR_IOM_INVALID_MMIO_HANDLE);
    718 #ifdef IN_RING0
     720# ifdef IN_RING0
    719721    AssertReturn((uintptr_t)pvUser < pVM->iomr0.s.cMmioAlloc, VERR_IOM_INVALID_MMIO_HANDLE);
    720722    CTX_SUFF(PIOMMMIOENTRY) pRegEntry = &pVM->iomr0.s.paMmioRegs[(uintptr_t)pvUser];
    721 #else
     723# else
    722724    CTX_SUFF(PIOMMMIOENTRY) pRegEntry = &pVM->iom.s.paMmioRegs[(uintptr_t)pvUser];
    723 #endif
     725# endif
    724726
    725727    return iomMmioCommonPfHandlerNew(pVM, pVCpu, (uint32_t)uErrorCode, GCPhysFault, pRegEntry);
    726728}
     729#endif /* !IN_RING3 */
    727730
    728731
    … …  
    739742 * @param   GCPhysFault The GC physical address.
    740743 */
    741 VMM_INT_DECL(VBOXSTRICTRC) IOMMmioPhysHandler(PVMCC pVM, PVMCPUCC pVCpu, uint32_t uErrorCode, RTGCPHYS GCPhysFault)
    742 {
     744VMM_INT_DECL(VBOXSTRICTRC) IOMMmioPhysHandlerNew(PVMCC pVM, PVMCPUCC pVCpu, uint32_t uErrorCode, RTGCPHYS GCPhysFault)
     745{
     746    STAM_COUNTER_INC(&pVM->iom.s.StatMmioPhysHandlerNew);
     747
    743748    /*
    744749     * We don't have a range here, so look it up before calling the common function.
    … …  
    793798{
    794799    STAM_PROFILE_START(UnusedMacroArg, Prf);
    795     STAM_COUNTER_INC(&pVM->iom.s.CTX_SUFF(StatMmioHandler));
     800    STAM_COUNTER_INC(&pVM->iom.s.CTX_SUFF(StatMmioHandlerNew));
     801    Log4(("iomMmioHandlerNew: GCPhysFault=%RGp cbBuf=%#x enmAccessType=%d enmOrigin=%d pvUser=%p\n", GCPhysFault, cbBuf, enmAccessType, enmOrigin, pvUser));
    796802
    797803    Assert(enmAccessType == PGMACCESSTYPE_READ || enmAccessType == PGMACCESSTYPE_WRITE);
    … …  
    855861    else
    856862    {
     863        Log4(("iomMmioHandlerNew: to ring-3: to-big=%RTbool zero-size=%RTbool no-callback=%RTbool pDevIns=%p hRegion=%p\n",
     864              !(cbBuf <= sizeof(pVCpu->iom.s.PendingMmioWrite.abValue)), !(pRegEntry->cbRegion != 0),
     865              !(  enmAccessType == PGMACCESSTYPE_READ
     866                ? pRegEntry->pfnReadCallback  != NULL || pVM->iomr0.s.paMmioRing3Regs[(uintptr_t)pvUser].pfnReadCallback == NULL
     867                : pRegEntry->pfnWriteCallback != NULL || pVM->iomr0.s.paMmioRing3Regs[(uintptr_t)pvUser].pfnWriteCallback == NULL),
     868              pDevIns, pvUser));
    857869        STAM_COUNTER_INC(enmAccessType == PGMACCESSTYPE_READ ? &pStats->ReadRZToR3 : &pStats->WriteRZToR3);
    858870        STAM_COUNTER_INC(enmAccessType == PGMACCESSTYPE_READ ? &pVM->iom.s.StatRZMMIOReadsToR3 : &pVM->iom.s.StatRZMMIOWritesToR3);
    … …  
    871883    RTGCPHYS const GCPhysMapping = pRegEntry->GCPhysMapping;
    872884#endif
    873     RTGCPHYS const offRegion     = GCPhysMapping - GCPhysFault;
     885    RTGCPHYS const offRegion     = GCPhysFault - GCPhysMapping;
    874886    if (RT_LIKELY(offRegion < pRegEntry->cbRegion && GCPhysMapping != NIL_RTGCPHYS))
    875887    { /* likely */ }

  • trunk/src/VBox/VMM/VMMR3/IOM.cpp

    r81341 r81375  
    196196                                          NULL, "iomMmioHandlerNew", "iomMmioPfHandlerNew",
    197197                                          NULL, "iomMmioHandlerNew", "iomMmioPfHandlerNew",
    198                                           "MMIO", &pVM->iom.s.hNewMmioHandlerType);
     198                                          "MMIO New", &pVM->iom.s.hNewMmioHandlerType);
    199199    AssertRCReturn(rc, rc);
    200200
    … …  
    210210    STAM_REL_REG(pVM, &pVM->iom.s.StatMMIOStaleMappings, STAMTYPE_PROFILE, "/IOM/MMIOStaleMappings",                STAMUNIT_TICKS_PER_CALL, "Number of times iomMmioHandlerNew got a call for a remapped range at the old mapping.");
    211211    STAM_REG(pVM, &pVM->iom.s.StatRZMMIOHandler,      STAMTYPE_PROFILE, "/IOM/RZ-MMIOHandler",                      STAMUNIT_TICKS_PER_CALL, "Profiling of the iomMmioPfHandler() body, only success calls.");
    212 #if 0
    213     STAM_REG(pVM, &pVM->iom.s.StatRZMMIO1Byte,        STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access1",              STAMUNIT_OCCURENCES,     "MMIO access by 1 byte counter.");
    214     STAM_REG(pVM, &pVM->iom.s.StatRZMMIO2Bytes,       STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access2",              STAMUNIT_OCCURENCES,     "MMIO access by 2 bytes counter.");
    215     STAM_REG(pVM, &pVM->iom.s.StatRZMMIO4Bytes,       STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access4",              STAMUNIT_OCCURENCES,     "MMIO access by 4 bytes counter.");
    216     STAM_REG(pVM, &pVM->iom.s.StatRZMMIO8Bytes,       STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/Access8",              STAMUNIT_OCCURENCES,     "MMIO access by 8 bytes counter.");
    217 #endif
    218212    STAM_REG(pVM, &pVM->iom.s.StatRZMMIOReadsToR3,    STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/ReadsToR3",            STAMUNIT_OCCURENCES,     "Number of read deferred to ring-3.");
    219213    STAM_REG(pVM, &pVM->iom.s.StatRZMMIOWritesToR3,   STAMTYPE_COUNTER, "/IOM/RZ-MMIOHandler/WritesToR3",           STAMUNIT_OCCURENCES,     "Number of writes deferred to ring-3.");
    … …  
    222216    STAM_REG(pVM, &pVM->iom.s.StatR3MMIOHandler,      STAMTYPE_COUNTER, "/IOM/R3-MMIOHandler",                      STAMUNIT_OCCURENCES,     "Number of calls to iomMmioHandler.");
    223217
    224     STAM_REG(pVM, &pVM->iom.s.StatMmioHandlerR3,      STAMTYPE_COUNTER, "/IOM/MmioHandlerR3",                       STAMUNIT_OCCURENCES,     "Number of calls to iomMmioHandlerNew from ring-3.");
    225     STAM_REG(pVM, &pVM->iom.s.StatMmioHandlerR0,      STAMTYPE_COUNTER, "/IOM/MmioHandlerR0",                       STAMUNIT_OCCURENCES,     "Number of calls to iomMmioHandlerNew from ring-0.");
     218    STAM_REG(pVM, &pVM->iom.s.StatMmioHandlerR3,      STAMTYPE_COUNTER, "/IOM/OldMmioHandlerR3",                    STAMUNIT_OCCURENCES,     "Number of calls to old iomMmioHandler from ring-3.");
     219    STAM_REG(pVM, &pVM->iom.s.StatMmioHandlerR0,      STAMTYPE_COUNTER, "/IOM/OldMmioHandlerR0",                    STAMUNIT_OCCURENCES,     "Number of calls to old iomMmioHandler from ring-0.");
     220
     221    STAM_REG(pVM, &pVM->iom.s.StatMmioHandlerNewR3,   STAMTYPE_COUNTER, "/IOM/MmioHandlerNewR3",                    STAMUNIT_OCCURENCES,     "Number of calls to iomMmioHandlerNew from ring-3.");
     222    STAM_REG(pVM, &pVM->iom.s.StatMmioHandlerNewR0,   STAMTYPE_COUNTER, "/IOM/MmioHandlerNewR0",                    STAMUNIT_OCCURENCES,     "Number of calls to iomMmioHandlerNew from ring-0.");
     223    STAM_REG(pVM, &pVM->iom.s.StatMmioPfHandlerNew,   STAMTYPE_COUNTER, "/IOM/MmioPfHandlerNew",                    STAMUNIT_OCCURENCES,     "Number of calls to iomMmioPfHandlerNew from ring-3.");
     224    STAM_REG(pVM, &pVM->iom.s.StatMmioPhysHandlerNew, STAMTYPE_COUNTER, "/IOM/MmioPhysHandlerNew",                  STAMUNIT_OCCURENCES,     "Number of calls to iomMmioPhysHandler from ring-3.");
    226225
    227226    /* Redundant, but just in case we change something in the future */

  • trunk/src/VBox/VMM/VMMR3/IOMR3IoPort.cpp

    r81162 r81375  
    125125    size_t cchPrefix;
    126126    if (pRegEntry->cPorts > 1)
    127         cchPrefix = RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/NewPorts/%04x-%04x/", uPort, uPort + pRegEntry->cPorts - 1);
     127        cchPrefix = RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/NewPorts/%04x-%04x", uPort, uPort + pRegEntry->cPorts - 1);
    128128    else
    129         cchPrefix = RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/NewPorts/%04x/", uPort);
     129        cchPrefix = RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/NewPorts/%04x", uPort);
    130130    STAMR3DeregisterByPrefix(pVM->pUVM, szPrefix);
    131131}
    … …  
    527527
    528528/**
     529 * Validates @a hIoPorts, making sure it belongs to @a pDevIns.
     530 *
     531 * @returns VBox status code.
     532 * @param   pVM         The cross context VM structure.
     533 * @param   pDevIns     The device which allegedly owns @a hIoPorts.
     534 * @param   hIoPorts    The handle to validate.
     535 */
     536VMMR3_INT_DECL(int)  IOMR3IoPortValidateHandle(PVM pVM, PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts)
     537{
     538    AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
     539    AssertReturn(hIoPorts < RT_MIN(pVM->iom.s.cIoPortRegs, pVM->iom.s.cIoPortAlloc), VERR_IOM_INVALID_IOPORT_HANDLE);
     540    PIOMIOPORTENTRYR3 const pRegEntry = &pVM->iom.s.paIoPortRegs[hIoPorts];
     541    AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_IOPORT_HANDLE);
     542    return VINF_SUCCESS;
     543}
     544
     545
     546/**
    529547 * Display a single I/O port ring-3 range.
    530548 *

  • trunk/src/VBox/VMM/VMMR3/IOMR3Mmio.cpp

    r81337 r81375  
    9898static void iomR3MmioDeregStats(PVM pVM, PIOMMMIOENTRYR3 pRegEntry, RTGCPHYS GCPhys)
    9999{
    100     char   szPrefix[80];
    101     RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/NewMmio/%RGp-%RGp/", GCPhys, GCPhys + pRegEntry->cbRegion - 1);
     100    char szPrefix[80];
     101    RTStrPrintf(szPrefix, sizeof(szPrefix), "/IOM/NewMmio/%RGp-%RGp", GCPhys, GCPhys + pRegEntry->cbRegion - 1);
    102102    STAMR3DeregisterByPrefix(pVM->pUVM, szPrefix);
    103103}
    … …  
    123123    AssertPtrReturn(pDevIns, VERR_INVALID_POINTER);
    124124
    125     AssertMsgReturn(cbRegion > 0 && !(cbRegion & PAGE_OFFSET_MASK), ("cbRegion=%RGp\n", cbRegion), VERR_OUT_OF_RANGE);
     125    AssertMsgReturn(cbRegion > 0 && cbRegion <= MM_MMIO_64_MAX, ("cbRegion=%#RGp (max %#RGp)\n", cbRegion, MM_MMIO_64_MAX),
     126                    VERR_OUT_OF_RANGE);
     127    AssertMsgReturn(!(cbRegion & PAGE_OFFSET_MASK), ("cbRegion=%#RGp\n", cbRegion), VERR_UNSUPPORTED_ALIGNMENT);
     128
    126129    AssertMsgReturn(   !(fFlags & ~IOMMMIO_FLAGS_VALID_MASK)
    127130                    && (fFlags & IOMMMIO_FLAGS_READ_MODE)  <= IOMMMIO_FLAGS_READ_DWORD_QWORD
    … …  
    130133                    VERR_INVALID_FLAGS);
    131134
    132     AssertReturn(pfnWrite || pfnRead || pfnFill, VERR_INVALID_PARAMETER);
     135    AssertReturn(pfnWrite || pfnRead, VERR_INVALID_PARAMETER);
    133136    AssertPtrNullReturn(pfnWrite, VERR_INVALID_POINTER);
    134137    AssertPtrNullReturn(pfnRead, VERR_INVALID_POINTER);
    135138    AssertPtrNullReturn(pfnFill, VERR_INVALID_POINTER);
     139
    136140    AssertPtrReturn(pszDesc, VERR_INVALID_POINTER);
    137141    AssertReturn(*pszDesc != '\0', VERR_INVALID_POINTER);
    … …  
    203207
    204208    RTGCPHYS const cbRegion = pRegEntry->cbRegion;
    205     AssertMsgReturn(cbRegion > 0 && cbRegion <= _1T, ("cbRegion=%RGp\n", cbRegion), VERR_IOM_MMIO_IPE_1);
     209    AssertMsgReturn(cbRegion > 0 && cbRegion <= MM_MMIO_64_MAX, ("cbRegion=%RGp\n", cbRegion), VERR_IOM_MMIO_IPE_1);
    206210    RTGCPHYS const GCPhysLast = GCPhys + cbRegion - 1;
    207211
    … …  
    288292        }
    289293        else
     294        {
     295            /* First entry in the lookup table: */
     296            ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, GCPhys);
     297            rc = PGMR3PhysMMIORegister(pVM, GCPhys, cbRegion, pVM->iom.s.hNewMmioHandlerType,
     298                                       (void *)(uintptr_t)hRegion, hRegion, hRegion, pRegEntry->pszDesc);
     299            AssertRCReturnStmt(rc, ASMAtomicWriteU64(&pRegEntry->GCPhysMapping, NIL_RTGCPHYS); IOM_UNLOCK_EXCL(pVM), rc);
     300
    290301            pEntry = paEntries;
     302        }
    291303
    292304        /*
    … …  
    455467
    456468/**
     469 * Validates @a hRegion, making sure it belongs to @a pDevIns.
     470 *
     471 * @returns VBox status code.
     472 * @param   pVM         The cross context VM structure.
     473 * @param   pDevIns     The device which allegedly owns @a hRegion.
     474 * @param   hRegion     The handle to validate.
     475 */
     476VMMR3_INT_DECL(int)  IOMR3MmioValidateHandle(PVM pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion)
     477{
     478    AssertPtrReturn(pDevIns, VERR_INVALID_HANDLE);
     479    AssertReturn(hRegion < RT_MIN(pVM->iom.s.cMmioRegs, pVM->iom.s.cMmioAlloc), VERR_IOM_INVALID_MMIO_HANDLE);
     480    PIOMMMIOENTRYR3 const pRegEntry = &pVM->iom.s.paMmioRegs[hRegion];
     481    AssertReturn(pRegEntry->pDevIns == pDevIns, VERR_IOM_INVALID_MMIO_HANDLE);
     482    return VINF_SUCCESS;
     483}
     484
     485
     486/**
    457487 * Display a single MMIO range.
    458488 *

  • trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp

    r81169 r81375  
    19241924/** @interface_method_impl{PDMDEVHLPR3,pfnPCIIORegionRegister} */
    19251925static DECLCALLBACK(int) pdmR3DevHlp_PCIIORegionRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    1926                                                          RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback)
     1926                                                         RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags,
     1927                                                         uint64_t hHandle, PFNPCIIOREGIONMAP pfnCallback)
    19271928{
    19281929    PDMDEV_ASSERT_DEVINS(pDevIns);
    … …  
    19321933        pPciDev = pDevIns->apPciDevs[0];
    19331934    AssertReturn(pPciDev, VERR_PDM_NOT_PCI_DEVICE);
    1934     LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%d cbRegion=%RGp enmType=%d pfnCallback=%p\n",
    1935              pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iRegion, cbRegion, enmType, pfnCallback));
     1935    LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: pPciDev=%p:{%#x} iRegion=%d cbRegion=%RGp enmType=%d fFlags=%#x, hHandle=%#RX64 pfnCallback=%p\n",
     1936             pDevIns->pReg->szName, pDevIns->iInstance, pPciDev, pPciDev->uDevFn, iRegion, cbRegion, enmType, fFlags, hHandle, pfnCallback));
    19361937    PDMPCIDEV_ASSERT_VALID_RET(pDevIns, pPciDev);
    19371938
    … …  
    19391940     * Validate input.
    19401941     */
     1942    VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
     1943    AssertLogRelMsgReturn(VMR3GetState(pVM) == VMSTATE_CREATING,
     1944                          ("caller='%s'/%d: %s\n", pDevIns->pReg->szName, pDevIns->iInstance, VMR3GetStateName(VMR3GetState(pVM))),
     1945                          VERR_WRONG_ORDER);
     1946
    19411947    if (iRegion >= VBOX_PCI_NUM_REGIONS)
    19421948    {
    … …  
    19841990            return VERR_INVALID_PARAMETER;
    19851991    }
    1986     if (!pfnCallback)
    1987     {
    1988         Assert(pfnCallback);
    1989         LogFlow(("pdmR3DevHlp_PCIIORegionRegister: caller='%s'/%d: returns %Rrc (callback)\n", pDevIns->pReg->szName, pDevIns->iInstance, VERR_INVALID_PARAMETER));
    1990         return VERR_INVALID_PARAMETER;
    1991     }
    1992     AssertRelease(VMR3GetState(pVM) != VMSTATE_RUNNING);
     1992
     1993    AssertMsgReturn(   pfnCallback
     1994                    || (   hHandle != UINT64_MAX
     1995                        && (fFlags & PDMPCIDEV_IORGN_F_HANDLE_MASK) != PDMPCIDEV_IORGN_F_NO_HANDLE),
     1996                    ("caller='%s'/%d: fFlags=%#x hHandle=%#RX64\n", pDevIns->pReg->szName, pDevIns->iInstance, fFlags, hHandle),
     1997                    VERR_INVALID_PARAMETER);
     1998
     1999    AssertMsgReturn(!(fFlags & ~PDMPCIDEV_IORGN_F_VALID_MASK), ("fFlags=%#x\n", fFlags), VERR_INVALID_FLAGS);
     2000    int rc;
     2001    switch (fFlags & PDMPCIDEV_IORGN_F_HANDLE_MASK)
     2002    {
     2003        case PDMPCIDEV_IORGN_F_NO_HANDLE:
     2004            break;
     2005        case PDMPCIDEV_IORGN_F_IOPORT_HANDLE:
     2006            AssertReturn(enmType == PCI_ADDRESS_SPACE_IO, VERR_INVALID_FLAGS);
     2007            rc = IOMR3IoPortValidateHandle(pVM, pDevIns, (IOMIOPORTHANDLE)hHandle);
     2008            AssertRCReturn(rc, rc);
     2009            break;
     2010        case PDMPCIDEV_IORGN_F_MMIO_HANDLE:
     2011            AssertReturn(   (enmType & ~PCI_ADDRESS_SPACE_BAR64) == PCI_ADDRESS_SPACE_MEM
     2012                         || (enmType & ~PCI_ADDRESS_SPACE_BAR64) == PCI_ADDRESS_SPACE_MEM_PREFETCH,
     2013                         VERR_INVALID_FLAGS);
     2014            rc = IOMR3MmioValidateHandle(pVM, pDevIns, (IOMMMIOHANDLE)hHandle);
     2015            AssertRCReturn(rc, rc);
     2016            break;
     2017        case PDMPCIDEV_IORGN_F_MMIO2_HANDLE:
     2018            AssertReturn(   (enmType & ~PCI_ADDRESS_SPACE_BAR64) == PCI_ADDRESS_SPACE_MEM
     2019                         || (enmType & ~PCI_ADDRESS_SPACE_BAR64) == PCI_ADDRESS_SPACE_MEM_PREFETCH,
     2020                         VERR_INVALID_FLAGS);
     2021            AssertFailedReturn(VERR_NOT_SUPPORTED);
     2022            break;
     2023        default:
     2024            AssertFailedReturn(VERR_IPE_NOT_REACHED_DEFAULT_CASE);
     2025            break;
     2026    }
    19932027
    19942028    /*
    … …  
    20172051
    20182052    pdmLock(pVM);
    2019     int rc = pBus->pfnIORegionRegister(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, pfnCallback);
     2053    rc = pBus->pfnIORegionRegister(pBus->pDevInsR3, pPciDev, iRegion, cbRegion, enmType, fFlags, hHandle, pfnCallback);
    20202054    pdmUnlock(pVM);
    20212055

  • trunk/src/VBox/VMM/include/IOMInternal.h

    r81341 r81375  
    751751    STAMCOUNTER                     StatRZMMIOCommitsToR3;
    752752    STAMCOUNTER                     StatRZMMIODevLockContention;
    753 #if 0
    754     STAMCOUNTER                     StatRZMMIO1Byte;
    755     STAMCOUNTER                     StatRZMMIO2Bytes;
    756     STAMCOUNTER                     StatRZMMIO4Bytes;
    757     STAMCOUNTER                     StatRZMMIO8Bytes;
    758 #endif
     753
     754    STAMCOUNTER                     StatMmioPfHandlerNew;
     755    STAMCOUNTER                     StatMmioPhysHandlerNew;
     756    STAMCOUNTER                     StatMmioHandlerNewR3;
     757    STAMCOUNTER                     StatMmioHandlerNewR0;
     758
    759759    STAMCOUNTER                     StatR3MMIOHandler;
    760760

  • trunk/src/VBox/VMM/include/PDMInternal.h

    r81031 r81375  
    727727    DECLR3CALLBACKMEMBER(int,  pfnRegisterMsi,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, PPDMMSIREG pMsiReg));
    728728    /** @copydoc PDMPCIBUSREGR3::pfnIORegionRegisterR3 */
    729     DECLR3CALLBACKMEMBER(int,  pfnIORegionRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, int iRegion, RTGCPHYS cbRegion,
    730                                                     PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnCallback));
     729    DECLR3CALLBACKMEMBER(int,  pfnIORegionRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
     730                                                    RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags,
     731                                                    uint64_t hHandle, PFNPCIIOREGIONMAP pfnCallback));
    731732    /** @copydoc PDMPCIBUSREGR3::pfnInterceptConfigAccesses */
    732733    DECLR3CALLBACKMEMBER(void, pfnInterceptConfigAccesses,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev,
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette