Changeset 81384 in vbox

Timestamp:

Oct 19, 2019 11:59:29 PM (5 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

134097

Message:

DevE1000: Converted timers from pointers to handles. bugref:9218

File:

• trunk/src/VBox/Devices/Network/DevE1000.cpp (modified) (162 diffs)

trunk/src/VBox/Devices/Network/DevE1000.cpp

@@ -1030 +1030 @@
 {
     char                    szPrf[8];                /**< Log prefix, e.g. E1000#1. */
+
     PDMIBASE                IBase;
     PDMINETWORKDOWN         INetworkDown;
@@ -1041 +1042 @@
     R3PTRTYPE(PPDMQUEUE)    pCanRxQueueR3;           /**< Rx wakeup signaller - R3. */
     PPDMINETWORKUPR3        pDrvR3;              /**< Attached network driver - R3. */
-    PTMTIMERR3              pRIDTimerR3;   /**< Receive Interrupt Delay Timer - R3. */
-    PTMTIMERR3              pRADTimerR3;    /**< Receive Absolute Delay Timer - R3. */
-    PTMTIMERR3              pTIDTimerR3;  /**< Transmit Interrupt Delay Timer - R3. */
-    PTMTIMERR3              pTADTimerR3;   /**< Transmit Absolute Delay Timer - R3. */
-    PTMTIMERR3              pTXDTimerR3;            /**< Transmit Delay Timer - R3. */
-    PTMTIMERR3              pIntTimerR3;            /**< Late Interrupt Timer - R3. */
-    PTMTIMERR3              pLUTimerR3;               /**< Link Up(/Restore) Timer. */
     /** The scatter / gather buffer used for the current outgoing packet - R3. */
     R3PTRTYPE(PPDMSCATTERGATHER) pTxSgR3;
@@ -1055 +1049 @@
     R0PTRTYPE(PPDMQUEUE)    pCanRxQueueR0;           /**< Rx wakeup signaller - R0. */
     PPDMINETWORKUPR0        pDrvR0;              /**< Attached network driver - R0. */
-    PTMTIMERR0              pRIDTimerR0;   /**< Receive Interrupt Delay Timer - R0. */
-    PTMTIMERR0              pRADTimerR0;    /**< Receive Absolute Delay Timer - R0. */
-    PTMTIMERR0              pTIDTimerR0;  /**< Transmit Interrupt Delay Timer - R0. */
-    PTMTIMERR0              pTADTimerR0;   /**< Transmit Absolute Delay Timer - R0. */
-    PTMTIMERR0              pTXDTimerR0;            /**< Transmit Delay Timer - R0. */
-    PTMTIMERR0              pIntTimerR0;            /**< Late Interrupt Timer - R0. */
-    PTMTIMERR0              pLUTimerR0;          /**< Link Up(/Restore) Timer - R0. */
     /** The scatter / gather buffer used for the current outgoing packet - R0. */
     R0PTRTYPE(PPDMSCATTERGATHER) pTxSgR0;
@@ -1069 +1056 @@
     RCPTRTYPE(PPDMQUEUE)    pCanRxQueueRC;           /**< Rx wakeup signaller - RC. */
     PPDMINETWORKUPRC        pDrvRC;              /**< Attached network driver - RC. */
-    PTMTIMERRC              pRIDTimerRC;   /**< Receive Interrupt Delay Timer - RC. */
-    PTMTIMERRC              pRADTimerRC;    /**< Receive Absolute Delay Timer - RC. */
-    PTMTIMERRC              pTIDTimerRC;  /**< Transmit Interrupt Delay Timer - RC. */
-    PTMTIMERRC              pTADTimerRC;   /**< Transmit Absolute Delay Timer - RC. */
-    PTMTIMERRC              pTXDTimerRC;            /**< Transmit Delay Timer - RC. */
-    PTMTIMERRC              pIntTimerRC;            /**< Late Interrupt Timer - RC. */
-    PTMTIMERRC              pLUTimerRC;          /**< Link Up(/Restore) Timer - RC. */
     /** The scatter / gather buffer used for the current outgoing packet - RC. */
     RCPTRTYPE(PPDMSCATTERGATHER) pTxSgRC;
@@ -1088 +1068 @@
     IOMIOPORTHANDLE         hIoPorts;
 
-    PDMCRITSECT cs;                  /**< Critical section - what is it protecting? */
-    PDMCRITSECT csRx;                                     /**< RX Critical section. */
+    /** Receive Interrupt Delay Timer. */
+    TMTIMERHANDLE           hRIDTimer;
+    /** Receive Absolute Delay Timer. */
+    TMTIMERHANDLE           hRADTimer;
+    /** Transmit Interrupt Delay Timer. */
+    TMTIMERHANDLE           hTIDTimer;
+    /** Transmit Absolute Delay Timer. */
+    TMTIMERHANDLE           hTADTimer;
+    /** Transmit Delay Timer. */
+    TMTIMERHANDLE           hTXDTimer;
+    /** Late Interrupt Timer. */
+    TMTIMERHANDLE           hIntTimer;
+    /** Link Up(/Restore) Timer. */
+    TMTIMERHANDLE           hLUTimer;
+
+    /** Critical section - what is it protecting? */
+    PDMCRITSECT             cs;
+    /** RX Critical section. */
+    PDMCRITSECT             csRx;
 #ifdef E1K_WITH_TX_CS
-    PDMCRITSECT csTx;                                     /**< TX Critical section. */
+    /** TX Critical section. */
+    PDMCRITSECT             csTx;
 #endif /* E1K_WITH_TX_CS */
     /** Base address of memory-mapped registers. */
@@ -1105 +1103 @@
     /** EMT: false if the cable is disconnected by the GUI. */
     bool        fCableConnected;
-    /** EMT: */
-    bool        fR0Enabled;
-    /** EMT: */
-    bool        fRCEnabled;
     /** EMT: Compute Ethernet CRC for RX packets. */
     bool        fEthernetCRC;
@@ -1117 +1111 @@
     /** All: Delay TX interrupts using TIDV/TADV. */
     bool        fTidEnabled;
+    bool        afPadding[2];
     /** Link up delay (in milliseconds). */
     uint32_t    cMsLinkUpDelay;
@@ -1317 +1312 @@
 static int e1kXmitPending(PE1KSTATE pThis, bool fOnWorkerThread);
 
-static int e1kRegReadUnimplemented (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
-static int e1kRegWriteUnimplemented(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegReadAutoClear     (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
-static int e1kRegReadDefault       (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
-static int e1kRegWriteDefault      (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
+/**
+ * E1000 register read handler.
+ */
+typedef int (FNE1KREGREAD)(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
+/**
+ * E1000 register write handler.
+ */
+typedef int (FNE1KREGWRITE)(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
+
+static FNE1KREGREAD  e1kRegReadUnimplemented;
+static FNE1KREGWRITE e1kRegWriteUnimplemented;
+static FNE1KREGREAD  e1kRegReadAutoClear;
+static FNE1KREGREAD  e1kRegReadDefault;
+static FNE1KREGWRITE e1kRegWriteDefault;
 #if 0 /* unused */
-static int e1kRegReadCTRL          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
+static FNE1KREGREAD  e1kRegReadCTRL;
 #endif
-static int e1kRegWriteCTRL         (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegReadEECD          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
-static int e1kRegWriteEECD         (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegWriteEERD         (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegWriteMDIC         (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegReadICR           (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
-static int e1kRegWriteICR          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegWriteICS          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegWriteIMS          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegWriteIMC          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegWriteRCTL         (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegWritePBA          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegWriteRDT          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegWriteRDTR         (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegWriteTDT          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegReadMTA           (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
-static int e1kRegWriteMTA          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegReadRA            (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
-static int e1kRegWriteRA           (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
-static int e1kRegReadVFTA          (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
-static int e1kRegWriteVFTA         (PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
+static FNE1KREGWRITE e1kRegWriteCTRL;
+static FNE1KREGREAD  e1kRegReadEECD;
+static FNE1KREGWRITE e1kRegWriteEECD;
+static FNE1KREGWRITE e1kRegWriteEERD;
+static FNE1KREGWRITE e1kRegWriteMDIC;
+static FNE1KREGREAD  e1kRegReadICR;
+static FNE1KREGWRITE e1kRegWriteICR;
+static FNE1KREGWRITE e1kRegWriteICS;
+static FNE1KREGWRITE e1kRegWriteIMS;
+static FNE1KREGWRITE e1kRegWriteIMC;
+static FNE1KREGWRITE e1kRegWriteRCTL;
+static FNE1KREGWRITE e1kRegWritePBA;
+static FNE1KREGWRITE e1kRegWriteRDT;
+static FNE1KREGWRITE e1kRegWriteRDTR;
+static FNE1KREGWRITE e1kRegWriteTDT;
+static FNE1KREGREAD  e1kRegReadMTA;
+static FNE1KREGWRITE e1kRegWriteMTA;
+static FNE1KREGREAD  e1kRegReadRA;
+static FNE1KREGWRITE e1kRegWriteRA;
+static FNE1KREGREAD  e1kRegReadVFTA;
+static FNE1KREGWRITE e1kRegWriteVFTA;
 
 /**
@@ -1363 +1367 @@
     uint32_t   writable;
     /** Read callback. */
-    int       (*pfnRead)(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value);
+    FNE1KREGREAD *pfnRead;
     /** Write callback. */
-    int       (*pfnWrite)(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t u32Value);
+    FNE1KREGWRITE *pfnWrite;
     /** Abbreviated name. */
     const char *abbrev;
@@ -1515 +1519 @@
  * Convert U32 value to hex string. Masked bytes are replaced with dots.
  *
- * @remarks The mask has byte (not bit) granularity (e.g. 000000FF).
+ * @remarks The mask has half-byte byte (not bit) granularity (e.g. 0000000F).
  *
  * @returns The buffer.
@@ -1542 +1546 @@
  *
  * @param   pThis       The device state structure.
- * @param   pTimer      The timer to get the name for.
- */
-DECLINLINE(const char *) e1kGetTimerName(PE1KSTATE pThis, PTMTIMER pTimer)
-{
-    if (pTimer == pThis->CTX_SUFF(pTIDTimer))
+ * @param   hTimer      The timer to name.
+ */
+DECLINLINE(const char *) e1kGetTimerName(PE1KSTATE pThis, TMTIMERHANDLE hTimer)
+{
+    if (hTimer == pThis->hTIDTimer)
         return "TID";
-    if (pTimer == pThis->CTX_SUFF(pTADTimer))
+    if (hTimer == pThis->hTADTimer)
         return "TAD";
-    if (pTimer == pThis->CTX_SUFF(pRIDTimer))
+    if (hTimer == pThis->hRIDTimer)
         return "RID";
-    if (pTimer == pThis->CTX_SUFF(pRADTimer))
+    if (hTimer == pThis->hRADTimer)
         return "RAD";
-    if (pTimer == pThis->CTX_SUFF(pIntTimer))
+    if (hTimer == pThis->hIntTimer)
         return "Int";
-    if (pTimer == pThis->CTX_SUFF(pTXDTimer))
+    if (hTimer == pThis->hTXDTimer)
         return "TXD";
-    if (pTimer == pThis->CTX_SUFF(pLUTimer))
+    if (hTimer == pThis->hLUTimer)
         return "LinkUp";
     return "unknown";
 }
 
-#endif /* DEBUG */
+#endif /* LOG_ENABLED */
 
 /**
  * Arm a timer.
  *
- * @param   pThis      Pointer to the device state structure.
- * @param   pTimer      Pointer to the timer.
+ * @param   pDevIns     The device instance.
+ * @param   pThis       Pointer to the device state structure.
+ * @param   hTimer      The timer to arm.
  * @param   uExpireIn   Expiration interval in microseconds.
  */
-DECLINLINE(void) e1kArmTimer(PE1KSTATE pThis, PTMTIMER pTimer, uint32_t uExpireIn)
+DECLINLINE(void) e1kArmTimer(PPDMDEVINS pDevIns, PE1KSTATE pThis, TMTIMERHANDLE hTimer, uint32_t uExpireIn)
 {
     if (pThis->fLocked)
@@ -1578 +1583 @@
 
     E1kLog2(("%s Arming %s timer to fire in %d usec...\n",
-             pThis->szPrf, e1kGetTimerName(pThis, pTimer), uExpireIn));
-    TMTimerSetMicro(pTimer, uExpireIn);
+             pThis->szPrf, e1kGetTimerName(pThis, hTimer), uExpireIn));
+    int rc = PDMDevHlpTimerSetMicro(pDevIns, hTimer, uExpireIn);
+    AssertRC(rc);
 }
 
@@ -1586 +1592 @@
  * Cancel a timer.
  *
- * @param   pThis      Pointer to the device state structure.
+ * @param   pDevIns     The device instance.
+ * @param   pThis       Pointer to the device state structure.
  * @param   pTimer      Pointer to the timer.
  */
-DECLINLINE(void) e1kCancelTimer(PE1KSTATE pThis, PTMTIMER pTimer)
+DECLINLINE(void) e1kCancelTimer(PPDMDEVINS pDevIns, PE1KSTATE pThis, TMTIMERHANDLE hTimer)
 {
     E1kLog2(("%s Stopping %s timer...\n",
-            pThis->szPrf, e1kGetTimerName(pThis, pTimer)));
-    int rc = TMTimerStop(pTimer);
+            pThis->szPrf, e1kGetTimerName(pThis, hTimer)));
+    int rc = PDMDevHlpTimerStop(pDevIns, hTimer);
     if (RT_FAILURE(rc))
-        E1kLog2(("%s e1kCancelTimer: TMTimerStop() failed with %Rrc\n",
-                pThis->szPrf, rc));
-    RT_NOREF1(pThis);
+        E1kLog2(("%s e1kCancelTimer: TMTimerStop(%s) failed with %Rrc\n",
+                pThis->szPrf, e1kGetTimerName(pThis, hTimer), rc));
+    RT_NOREF_PV(pThis);
 }
 #endif /* IN_RING3 */
@@ -1636 +1643 @@
  * Hardware reset. Revert all registers to initial values.
  *
+ * @param   pDevIns     The device instance.
  * @param   pThis       The device state structure.
  */
-static void e1kHardReset(PE1KSTATE pThis)
+static void e1kHardReset(PPDMDEVINS pDevIns, PE1KSTATE pThis)
 {
     E1kLog(("%s Hard reset triggered\n", pThis->szPrf));
@@ -1692 +1700 @@
     E1kLog(("%s Will trigger LSC in %d seconds...\n",
             pThis->szPrf, pThis->cMsLinkUpDelay / 1000));
-    e1kArmTimer(pThis, pThis->CTX_SUFF(pLUTimer), pThis->cMsLinkUpDelay * 1000);
+    e1kArmTimer(pDevIns, pThis, pThis->hLUTimer, pThis->cMsLinkUpDelay * 1000);
 #endif /* E1K_LSC_ON_RESET */
 }
@@ -2019 +2027 @@
  * @param   pThis       The device state structure.
  */
-inline void e1kPostponeInterrupt(PE1KSTATE pThis, uint64_t uNanoseconds)
-{
-    if (!TMTimerIsActive(pThis->CTX_SUFF(pIntTimer)))
-        TMTimerSetNano(pThis->CTX_SUFF(pIntTimer), uNanoseconds);
+DECLINLINE(void) e1kPostponeInterrupt(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint64_t nsDeadline)
+{
+    if (!PDMDevHlpTimerIsActive(pDevIns, pThis->hIntTimer))
+        PDMDevHlpTimerSetNano(pDevIns, pThis->hIntTimer, nsDeadline);
 }
 
@@ -2030 +2038 @@
  * @param   pThis       The device state structure.
  */
-static int e1kRaiseInterrupt(PE1KSTATE pThis, int rcBusy, uint32_t u32IntCause = 0)
+static int e1kRaiseInterrupt(PPDMDEVINS pDevIns, PE1KSTATE pThis, int rcBusy, uint32_t u32IntCause = 0)
 {
     int rc = e1kCsEnter(pThis, rcBusy);
@@ -2048 +2056 @@
         else
         {
-            uint64_t tsNow = TMTimerGet(pThis->CTX_SUFF(pIntTimer));
+            uint64_t tsNow = PDMDevHlpTimerGet(pDevIns, pThis->hIntTimer);
             if (!!ITR && tsNow - pThis->u64AckedAt < ITR * 256
                      && pThis->fItrEnabled && (pThis->fItrRxEnabled || !(ICR & ICR_RXT0)))
@@ -2055 +2063 @@
                 E1kLog2(("%s e1kRaiseInterrupt: Too early to raise again: %d ns < %d ns.\n",
                         pThis->szPrf, (uint32_t)(tsNow - pThis->u64AckedAt), ITR * 256));
-                e1kPostponeInterrupt(pThis, ITR * 256);
+                e1kPostponeInterrupt(pDevIns, pThis, ITR * 256);
             }
             else
@@ -2063 +2071 @@
                  * there is no need to do it later -- stop the timer.
                  */
-                TMTimerStop(pThis->CTX_SUFF(pIntTimer));
+                PDMDevHlpTimerStop(pDevIns, pThis->hIntTimer);
                 E1K_INC_ISTAT_CNT(pThis->uStatInt);
                 STAM_COUNTER_INC(&pThis->StatIntsRaised);
@@ -2070 +2078 @@
                 /* Raise(1) INTA(0) */
                 E1kLogRel(("E1000: irq RAISED icr&mask=0x%x, icr=0x%x\n", ICR & IMS, ICR));
-                PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 1);
+                PDMDevHlpPCISetIrq(pDevIns, 0, 1);
                 E1kLog(("%s e1kRaiseInterrupt: Raised. ICR&IMS=%08x\n",
                         pThis->szPrf, ICR & IMS));
@@ -2107 +2115 @@
  * @remarks RDH always points to the next available RX descriptor.
  *
+ * @param   pDevIns     The device instance.
  * @param   pThis       The device state structure.
  */
-DECLINLINE(void) e1kAdvanceRDH(PE1KSTATE pThis)
+DECLINLINE(void) e1kAdvanceRDH(PPDMDEVINS pDevIns, PE1KSTATE pThis)
 {
     Assert(e1kCsRxIsOwner(pThis));
@@ -2154 +2163 @@
                  pThis->szPrf, RDH, RDT, uRQueueLen, uMinRQThreshold));
         E1K_INC_ISTAT_CNT(pThis->uStatIntRXDMT0);
-        e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, ICR_RXDMT0);
+        e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, ICR_RXDMT0);
     }
     E1kLog2(("%s e1kAdvanceRDH: at exit RDH=%x RDT=%x len=%x\n",
@@ -2196 +2205 @@
  * pointer. The descriptor gets written back to the RXD ring.
  *
+ * @param   pDevIns     The device instance.
  * @param   pThis       The device state structure.
  * @param   pDesc       The descriptor being "returned" to the RX ring.
  * @thread  RX
  */
-DECLINLINE(void) e1kRxDPut(PE1KSTATE pThis, E1KRXDESC* pDesc)
+DECLINLINE(void) e1kRxDPut(PPDMDEVINS pDevIns, PE1KSTATE pThis, E1KRXDESC* pDesc)
 {
     Assert(e1kCsRxIsOwner(pThis));
@@ -2217 +2227 @@
      */
     e1kPrintRDesc(pThis, pDesc);
-    e1kAdvanceRDH(pThis);
+    e1kAdvanceRDH(pDevIns, pThis);
 }
 
@@ -2253 +2263 @@
  * @param   cb              The size of the fragment.
  */
-static DECLCALLBACK(void) e1kStoreRxFragment(PE1KSTATE pThis, E1KRXDESC *pDesc, const void *pvBuf, size_t cb)
+static DECLCALLBACK(void) e1kStoreRxFragment(PPDMDEVINS pDevIns, PE1KSTATE pThis, E1KRXDESC *pDesc, const void *pvBuf, size_t cb)
 {
     STAM_PROFILE_ADV_START(&pThis->StatReceiveStore, a);
@@ -2264 +2274 @@
     E1kLogRel(("E1000: Wrote back RX desc, RDH=%x\n", RDH));
     /* Advance head */
-    e1kAdvanceRDH(pThis);
+    e1kAdvanceRDH(pDevIns, pThis);
     //E1kLog2(("%s e1kStoreRxFragment: EOP=%d RDTR=%08X RADV=%08X\n", pThis->szPrf, pDesc->fEOP, RDTR, RADV));
     if (pDesc->status.fEOP)
@@ -2273 +2283 @@
         {
             /* Arm the timer to fire in RDTR usec (discard .024) */
-            e1kArmTimer(pThis, pThis->CTX_SUFF(pRIDTimer), RDTR);
+            e1kArmTimer(pDevIns, pThis, pThis->hRIDTimer, RDTR);
             /* If absolute timer delay is enabled and the timer is not running yet, arm it. */
-            if (RADV != 0 && !TMTimerIsActive(pThis->CTX_SUFF(pRADTimer)))
-                e1kArmTimer(pThis, pThis->CTX_SUFF(pRADTimer), RADV);
+            if (RADV != 0 && !PDMDevHlpTimerIsActive(pDevIns, pThis->CTX_SUFF(pRADTimer)))
+                e1kArmTimer(pThis, pThis->hRADTimer, RADV);
         }
         else
@@ -2283 +2293 @@
             /* 0 delay means immediate interrupt */
             E1K_INC_ISTAT_CNT(pThis->uStatIntRx);
-            e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, ICR_RXT0);
+            e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, ICR_RXT0);
 #ifdef E1K_USE_RX_TIMERS
         }
@@ -2377 +2387 @@
  *
  * @returns VBox status code.
+ * @param   pDevIns     The device instance.
  * @param   pThis          The device state structure.
  * @param   pvBuf           The available data.
@@ -2382 +2393 @@
  * @param   status          Bit fields containing status info.
  */
-static int e1kHandleRxPacket(PE1KSTATE pThis, const void *pvBuf, size_t cb, E1KRXDST status)
+static int e1kHandleRxPacket(PPDMDEVINS pDevIns, PE1KSTATE pThis, const void *pvBuf, size_t cb, E1KRXDST status)
 {
 #if defined(IN_RING3) /** @todo Remove this extra copying, it's gonna make us run out of kernel / hypervisor stack! */
@@ -2543 +2554 @@
         /* Write back the descriptor. */
         pDesc->status.fDD = true;
-        e1kRxDPut(pThis, pDesc);
+        e1kRxDPut(pDevIns, pThis, pDesc);
 # else /* !E1K_WITH_RXD_CACHE */
         else
@@ -2552 +2563 @@
                                   e1kDescAddr(RDBAH, RDBAL, RDH),
                                   pDesc, sizeof(E1KRXDESC));
-            e1kAdvanceRDH(pThis);
+            e1kAdvanceRDH(pDevIns, pThis);
         }
 # endif /* !E1K_WITH_RXD_CACHE */
@@ -2569 +2580 @@
     {
         /* Arm the timer to fire in RDTR usec (discard .024) */
-        e1kArmTimer(pThis, pThis->CTX_SUFF(pRIDTimer), RDTR);
+        e1kArmTimer(pThis, pThis->hRIDTimer, RDTR);
         /* If absolute timer delay is enabled and the timer is not running yet, arm it. */
-        if (RADV != 0 && !TMTimerIsActive(pThis->CTX_SUFF(pRADTimer)))
-            e1kArmTimer(pThis, pThis->CTX_SUFF(pRADTimer), RADV);
+        if (RADV != 0 && !PDMDevHlpTimerIsActive(pDevIns, pThis->hRADTimer))
+            e1kArmTimer(pThis, pThis->hRADTimer, RADV);
     }
     else
@@ -2579 +2590 @@
         /* 0 delay means immediate interrupt */
         E1K_INC_ISTAT_CNT(pThis->uStatIntRx);
-        e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, ICR_RXT0);
+        e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, ICR_RXT0);
 #  ifdef E1K_USE_RX_TIMERS
     }
@@ -2587 +2598 @@
     return VINF_SUCCESS;
 #else  /* !IN_RING3 */
-    RT_NOREF_PV(pThis); RT_NOREF_PV(pvBuf); RT_NOREF_PV(cb); RT_NOREF_PV(status);
+    RT_NOREF(pDevIns, pThis, pvBuf, cb, status);
     return VERR_INTERNAL_ERROR_2;
 #endif /* !IN_RING3 */
@@ -2597 +2608 @@
  * Bring the link up after the configured delay, 5 seconds by default.
  *
+ * @param   pDevIns     The device instance.
  * @param   pThis       The device state structure.
  * @thread  any
  */
-DECLINLINE(void) e1kBringLinkUpDelayed(PE1KSTATE pThis)
+DECLINLINE(void) e1kBringLinkUpDelayed(PPDMDEVINS pDevIns, PE1KSTATE pThis)
 {
     E1kLog(("%s Will bring up the link in %d seconds...\n",
             pThis->szPrf, pThis->cMsLinkUpDelay / 1000));
-    e1kArmTimer(pThis, pThis->CTX_SUFF(pLUTimer), pThis->cMsLinkUpDelay * 1000);
+    e1kArmTimer(pDevIns, pThis, pThis->hLUTimer, pThis->cMsLinkUpDelay * 1000);
 }
 
@@ -2610 +2622 @@
  * Bring up the link immediately.
  *
+ * @param   pDevIns     The device instance.
  * @param   pThis       The device state structure.
  */
-DECLINLINE(void) e1kR3LinkUp(PE1KSTATE pThis)
+DECLINLINE(void) e1kR3LinkUp(PPDMDEVINS pDevIns, PE1KSTATE pThis)
 {
     E1kLog(("%s Link is up\n", pThis->szPrf));
     STATUS |= STATUS_LU;
     Phy::setLinkStatus(&pThis->phy, true);
-    e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, ICR_LSC);
+    e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, ICR_LSC);
     if (pThis->pDrvR3)
         pThis->pDrvR3->pfnNotifyLinkChanged(pThis->pDrvR3, PDMNETWORKLINKSTATE_UP);
@@ -2629 +2642 @@
  * Bring down the link immediately.
  *
+ * @param   pDevIns     The device instance.
  * @param   pThis       The device state structure.
  */
-DECLINLINE(void) e1kR3LinkDown(PE1KSTATE pThis)
+DECLINLINE(void) e1kR3LinkDown(PPDMDEVINS pDevIns, PE1KSTATE pThis)
 {
     E1kLog(("%s Link is down\n", pThis->szPrf));
@@ -2638 +2652 @@
     Phy::setLinkStatus(&pThis->phy, false);
 #endif /* E1K_LSC_ON_RESET */
-    e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, ICR_LSC);
+    e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, ICR_LSC);
     if (pThis->pDrvR3)
         pThis->pDrvR3->pfnNotifyLinkChanged(pThis->pDrvR3, PDMNETWORKLINKSTATE_DOWN);
@@ -2646 +2660 @@
  * Bring down the link temporarily.
  *
+ * @param   pDevIns     The device instance.
  * @param   pThis       The device state structure.
  */
-DECLINLINE(void) e1kR3LinkDownTemp(PE1KSTATE pThis)
+DECLINLINE(void) e1kR3LinkDownTemp(PPDMDEVINS pDevIns, PE1KSTATE pThis)
 {
     E1kLog(("%s Link is down temporarily\n", pThis->szPrf));
     STATUS &= ~STATUS_LU;
     Phy::setLinkStatus(&pThis->phy, false);
-    e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, ICR_LSC);
+    e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, ICR_LSC);
     /*
      * Notifying the associated driver that the link went down (even temporarily)
@@ -2663 +2678 @@
     if (pThis->pDrvR3)
         pThis->pDrvR3->pfnNotifyLinkChanged(pThis->pDrvR3, PDMNETWORKLINKSTATE_DOWN);
-    e1kBringLinkUpDelayed(pThis);
+    e1kBringLinkUpDelayed(pThis->pDevInsR3, pThis);
 }
 #endif /* IN_RING3 */
@@ -2717 +2732 @@
     /* Make sure we have cable connected and MAC can talk to PHY */
     if (pThis->fCableConnected && (CTRL & CTRL_SLU))
-        e1kArmTimer(pThis, pThis->CTX_SUFF(pLUTimer), E1K_INIT_LINKUP_DELAY_US);
+        e1kArmTimer(pThis->CTX_SUFF(pDevIns), pThis, pThis->hLUTimer, E1K_INIT_LINKUP_DELAY_US); /** @todo 9218 */
 }
 
@@ -2732 +2747 @@
  * @thread  EMT
  */
-static int e1kRegWriteCTRL(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+static int e1kRegWriteCTRL(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
 {
     int rc = VINF_SUCCESS;
@@ -2741 +2756 @@
         return VINF_IOM_R3_MMIO_WRITE;
 #else
-        e1kHardReset(pThis);
+        e1kHardReset(pDevIns, pThis);
 #endif
     }
@@ -2758 +2773 @@
         {
             /* It should take about 2 seconds for the link to come up */
-            e1kArmTimer(pThis, pThis->CTX_SUFF(pLUTimer), E1K_INIT_LINKUP_DELAY_US);
+            e1kArmTimer(pDevIns, pThis, pThis->hLUTimer, E1K_INIT_LINKUP_DELAY_US);
         }
 #else /* !E1K_LSC_ON_SLU */
@@ -2764 +2779 @@
             && !(CTRL & CTRL_SLU)
             && pThis->fCableConnected
-            && !TMTimerIsActive(pThis->CTX_SUFF(pLUTimer)))
+            && !PDMDevHlpTimerIsActive(pDevIns, pThis->hLUTimer))
         {
             /* PXE does not use LSC interrupts, see @bugref{9113}. */
@@ -2794 +2809 @@
             }
         }
-        rc = e1kRegWriteDefault(pThis, offset, index, value);
+        rc = e1kRegWriteDefault(pDevIns, pThis, offset, index, value);
     }
 
@@ -2812 +2827 @@
  * @thread  EMT
  */
-static int e1kRegWriteEECD(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
-{
-    RT_NOREF(offset, index);
+static int e1kRegWriteEECD(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+{
+    RT_NOREF(pDevIns, offset, index);
 #ifdef IN_RING3
     /* So far we are concerned with lower byte only */
@@ -2851 +2866 @@
  * @thread  EMT
  */
-static int e1kRegReadEECD(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
+static int e1kRegReadEECD(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
 {
 #ifdef IN_RING3
     uint32_t value;
-    int      rc = e1kRegReadDefault(pThis, offset, index, &value);
+    int      rc = e1kRegReadDefault(pDevIns, pThis, offset, index, &value);
     if (RT_SUCCESS(rc))
     {
@@ -2871 +2886 @@
     return rc;
 #else /* !IN_RING3 */
-    RT_NOREF_PV(pThis); RT_NOREF_PV(offset); RT_NOREF_PV(index); RT_NOREF_PV(pu32Value);
+    RT_NOREF_PV(pDevIns); RT_NOREF_PV(pThis); RT_NOREF_PV(offset); RT_NOREF_PV(index); RT_NOREF_PV(pu32Value);
     return VINF_IOM_R3_MMIO_READ;
 #endif /* !IN_RING3 */
@@ -2889 +2904 @@
  * @thread  EMT
  */
-static int e1kRegWriteEERD(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+static int e1kRegWriteEERD(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
 {
 #ifdef IN_RING3
     /* Make use of 'writable' and 'readable' masks. */
-    e1kRegWriteDefault(pThis, offset, index, value);
+    e1kRegWriteDefault(pDevIns, pThis, offset, index, value);
     /* DONE and DATA are set only if read was triggered by START. */
     if (value & EERD_START)
@@ -2907 +2922 @@
     return VINF_SUCCESS;
 #else /* !IN_RING3 */
-    RT_NOREF_PV(pThis); RT_NOREF_PV(offset); RT_NOREF_PV(index); RT_NOREF_PV(value);
+    RT_NOREF_PV(pDevIns); RT_NOREF_PV(pThis); RT_NOREF_PV(offset); RT_NOREF_PV(index); RT_NOREF_PV(value);
     return VINF_IOM_R3_MMIO_WRITE;
 #endif /* !IN_RING3 */
@@ -2925 +2940 @@
  * @thread  EMT
  */
-static int e1kRegWriteMDIC(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+static int e1kRegWriteMDIC(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
 {
     if (value & MDIC_INT_EN)
@@ -2951 +2966 @@
     {
         /* Store the value */
-        e1kRegWriteDefault(pThis, offset, index, value);
+        e1kRegWriteDefault(pDevIns, pThis, offset, index, value);
         STAM_COUNTER_INC(&pThis->StatPHYAccesses);
         /* Forward op to PHY */
@@ -2977 +2992 @@
  * @thread  EMT
  */
-static int e1kRegWriteICR(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+static int e1kRegWriteICR(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
 {
     ICR &= ~value;
 
-    RT_NOREF_PV(pThis); RT_NOREF_PV(offset); RT_NOREF_PV(index);
+    RT_NOREF_PV(pDevIns); RT_NOREF_PV(pThis); RT_NOREF_PV(offset); RT_NOREF_PV(index);
     return VINF_SUCCESS;
 }
@@ -2998 +3013 @@
  * @thread  EMT
  */
-static int e1kRegReadICR(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
+static int e1kRegReadICR(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
 {
     int rc = e1kCsEnter(pThis, VINF_IOM_R3_MMIO_READ);
@@ -3005 +3020 @@
 
     uint32_t value = 0;
-    rc = e1kRegReadDefault(pThis, offset, index, &value);
+    rc = e1kRegReadDefault(pDevIns, pThis, offset, index, &value);
     if (RT_SUCCESS(rc))
     {
@@ -3029 +3044 @@
                 pThis->fIntRaised = false;
                 /* Lower(0) INTA(0) */
-                PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 0);
-
-                pThis->u64AckedAt = TMTimerGet(pThis->CTX_SUFF(pIntTimer));
+                PDMDevHlpPCISetIrq(pDevIns, 0, 0);
+
+                pThis->u64AckedAt = PDMDevHlpTimerGet(pDevIns, pThis->hIntTimer);
                 if (pThis->fIntMaskUsed)
                     pThis->fDelayInts = true;
@@ -3063 +3078 @@
  * @thread  EMT
  */
-static int e1kRegWriteICS(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+static int e1kRegWriteICS(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
 {
     RT_NOREF_PV(offset); RT_NOREF_PV(index);
     E1K_INC_ISTAT_CNT(pThis->uStatIntICS);
-    return e1kRaiseInterrupt(pThis, VINF_IOM_R3_MMIO_WRITE, value & g_aE1kRegMap[ICS_IDX].writable);
+    return e1kRaiseInterrupt(pDevIns, pThis, VINF_IOM_R3_MMIO_WRITE, value & g_aE1kRegMap[ICS_IDX].writable);
 }
 
@@ -3082 +3097 @@
  * @thread  EMT
  */
-static int e1kRegWriteIMS(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+static int e1kRegWriteIMS(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
 {
     RT_NOREF_PV(offset); RT_NOREF_PV(index);
@@ -3096 +3111 @@
     {
         E1K_INC_ISTAT_CNT(pThis->uStatIntIMS);
-        e1kPostponeInterrupt(pThis, E1K_IMS_INT_DELAY_NS);
+        e1kPostponeInterrupt(pDevIns, pThis, E1K_IMS_INT_DELAY_NS);
     }
 
@@ -3114 +3129 @@
  * @thread  EMT
  */
-static int e1kRegWriteIMC(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+static int e1kRegWriteIMC(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
 {
     RT_NOREF_PV(offset); RT_NOREF_PV(index);
@@ -3132 +3147 @@
         E1kLogRel(("E1000: irq lowered (IMC), icr=0x%x\n", ICR));
         /* Lower(0) INTA(0) */
-        PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 0);
+        PDMDevHlpPCISetIrq(pDevIns, 0, 0);
         pThis->fIntRaised = false;
         E1kLog(("%s e1kRegWriteIMC: Lowered IRQ: ICR=%08x\n", pThis->szPrf, ICR));
@@ -3153 +3168 @@
  * @thread  EMT
  */
-static int e1kRegWriteRCTL(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+static int e1kRegWriteRCTL(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
 {
     /* Update promiscuous mode */
@@ -3180 +3195 @@
 
     /* Update the register */
-    e1kRegWriteDefault(pThis, offset, index, value);
-
-    return VINF_SUCCESS;
+    return e1kRegWriteDefault(pDevIns, pThis, offset, index, value);
 }
 
@@ -3197 +3210 @@
  * @thread  EMT
  */
-static int e1kRegWritePBA(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
-{
-    e1kRegWriteDefault(pThis, offset, index, value);
+static int e1kRegWritePBA(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+{
+    e1kRegWriteDefault(pDevIns, pThis, offset, index, value);
     PBA_st->txa = 64 - PBA_st->rxa;
 
@@ -3220 +3233 @@
  * @thread  EMT
  */
-static int e1kRegWriteRDT(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+static int e1kRegWriteRDT(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
 {
 #ifndef IN_RING3
@@ -3246 +3259 @@
         }
 #endif /* !E1K_WITH_RXD_CACHE */
-        rc = e1kRegWriteDefault(pThis, offset, index, value);
+        rc = e1kRegWriteDefault(pDevIns, pThis, offset, index, value);
 #ifdef E1K_WITH_RXD_CACHE
         /*
@@ -3301 +3314 @@
  * @thread  EMT
  */
-static int e1kRegWriteRDTR(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
-{
-    e1kRegWriteDefault(pThis, offset, index, value);
+static int e1kRegWriteRDTR(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+{
+    e1kRegWriteDefault(pDevIns, pThis, offset, index, value);
     if (value & RDTR_FPD)
     {
         /* Flush requested, cancel both timers and raise interrupt */
 #ifdef E1K_USE_RX_TIMERS
-        e1kCancelTimer(pThis, pThis->CTX_SUFF(pRIDTimer));
-        e1kCancelTimer(pThis, pThis->CTX_SUFF(pRADTimer));
+        e1kCancelTimer(pDevIns, pThis, pThis->hRIDTimer);
+        e1kCancelTimer(pDevIns, pThis, pThis->hRADTimer);
 #endif
         E1K_INC_ISTAT_CNT(pThis->uStatIntRDTR);
-        return e1kRaiseInterrupt(pThis, VINF_IOM_R3_MMIO_WRITE, ICR_RXT0);
+        return e1kRaiseInterrupt(pDevIns, pThis, VINF_IOM_R3_MMIO_WRITE, ICR_RXT0);
     }
 
@@ -3378 +3391 @@
     /* Cancel absolute delay timer as we have already got attention */
 #  ifndef E1K_NO_TAD
-    e1kCancelTimer(pThis, pThis->CTX_SUFF(pTADTimer));
+    e1kCancelTimer(pDevIns, pThis, pThis->hTADTimer);
 #  endif
-    e1kRaiseInterrupt(pThis, ICR_TXDW);
+    e1kRaiseInterrupt(pDevIns, pThis, ICR_TXDW);
 }
 
@@ -3401 +3414 @@
     E1K_INC_ISTAT_CNT(pThis->uStatTAD);
     /* Cancel interrupt delay timer as we have already got attention */
-    e1kCancelTimer(pThis, pThis->CTX_SUFF(pTIDTimer));
-    e1kRaiseInterrupt(pThis, ICR_TXDW);
+    e1kCancelTimer(pDevIns, pThis, pThis->hTIDTimer);
+    e1kRaiseInterrupt(pDevIns, pThis, ICR_TXDW);
 }
 
@@ -3424 +3437 @@
     E1K_INC_ISTAT_CNT(pThis->uStatRID);
     /* Cancel absolute delay timer as we have already got attention */
-    e1kCancelTimer(pThis, pThis->CTX_SUFF(pRADTimer));
-    e1kRaiseInterrupt(pThis, ICR_RXT0);
+    e1kCancelTimer(pDevIns, pThis, pThis->hRADTimer);
+    e1kRaiseInterrupt(pDevIns, pThis, ICR_RXT0);
 }
 
@@ -3444 +3457 @@
     E1K_INC_ISTAT_CNT(pThis->uStatRAD);
     /* Cancel interrupt delay timer as we have already got attention */
-    e1kCancelTimer(pThis, pThis->CTX_SUFF(pRIDTimer));
-    e1kRaiseInterrupt(pThis, ICR_RXT0);
+    e1kCancelTimer(pDevIns, pThis, pThis->hRIDTimer);
+    e1kRaiseInterrupt(pDevIns, pThis, ICR_RXT0);
 }
 
@@ -3470 +3483 @@
         pThis->iStatIntLost--;
 # endif
-    e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, 0);
+    e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, 0);
     STAM_PROFILE_ADV_STOP(&pThis->StatLateIntTimer, a);
 }
@@ -3497 +3510 @@
         /* 82543GC does not have an internal PHY */
         if (pThis->eChip == E1K_CHIP_82543GC || (CTRL & CTRL_SLU))
-            e1kR3LinkUp(pThis);
+            e1kR3LinkUp(pDevIns, pThis);
     }
 #ifdef E1K_LSC_ON_RESET
     else if (pThis->eChip == E1K_CHIP_82543GC)
-        e1kR3LinkDown(pThis);
+        e1kR3LinkDown(pDevIns, pThis);
 #endif /* E1K_LSC_ON_RESET */
 }
@@ -3949 +3962 @@
  *          a real ethernet wire.
  *
- * @param   pThis              The device state structure.
- * @param   fOnWorkerThread     Whether we're on a worker thread or an EMT.
+ * @param   pDevIns         The device instance.
+ * @param   pThis           The device state structure.
+ * @param   fOnWorkerThread Whether we're on a worker thread or an EMT.
  * @thread  E1000_TX
  */
-static void e1kTransmitFrame(PE1KSTATE pThis, bool fOnWorkerThread)
+static void e1kTransmitFrame(PPDMDEVINS pDevIns, PE1KSTATE pThis, bool fOnWorkerThread)
 {
     PPDMSCATTERGATHER   pSg     = pThis->CTX_SUFF(pTxSg);
@@ -4058 +4072 @@
             RT_ZERO(status);
             status.fPIF = true;
-            e1kHandleRxPacket(pThis, pSg->aSegs[0].pvSeg, cbFrame, status);
+            e1kHandleRxPacket(pDevIns, pThis, pSg->aSegs[0].pvSeg, cbFrame, status);
             rc = VINF_SUCCESS;
         }
@@ -4127 +4141 @@
  *          legacy.u64BufAddr.
  *
- * @param   pThis          The device state structure.
+ * @param   pDevIns         The device instance.
+ * @param   pThis           The device state structure.
  * @param   pDesc           Pointer to the descriptor to transmit.
  * @param   u16Len          Length of buffer to the end of segment.
@@ -4135 +4150 @@
  */
 #ifndef E1K_WITH_TXD_CACHE
-static void e1kFallbackAddSegment(PE1KSTATE pThis, RTGCPHYS PhysAddr, uint16_t u16Len, bool fSend, bool fOnWorkerThread)
+static void e1kFallbackAddSegment(PPDMDEVINS pDevIns, PE1KSTATE pThis, RTGCPHYS PhysAddr, uint16_t u16Len, bool fSend, bool fOnWorkerThread)
 {
     /* TCP header being transmitted */
@@ -4231 +4246 @@
             pThis->CTX_SUFF(pTxSg)->aSegs[0].cbSeg = pThis->u16TxPktLen;
         }
-        e1kTransmitFrame(pThis, fOnWorkerThread);
+        e1kTransmitFrame(pDevIns, pThis, fOnWorkerThread);
 
         /* Update Sequence Number */
@@ -4241 +4256 @@
 }
 #else /* E1K_WITH_TXD_CACHE */
-static int e1kFallbackAddSegment(PE1KSTATE pThis, RTGCPHYS PhysAddr, uint16_t u16Len, bool fSend, bool fOnWorkerThread)
+static int e1kFallbackAddSegment(PPDMDEVINS pDevIns, PE1KSTATE pThis, RTGCPHYS PhysAddr, uint16_t u16Len, bool fSend, bool fOnWorkerThread)
 {
     int rc = VINF_SUCCESS;
@@ -4349 +4364 @@
             pThis->CTX_SUFF(pTxSg)->aSegs[0].cbSeg = cbCopy;
         }
-        e1kTransmitFrame(pThis, fOnWorkerThread);
+        e1kTransmitFrame(pDevIns, pThis, fOnWorkerThread);
 
         /* Update Sequence Number */
@@ -4410 +4425 @@
             /* This descriptor fits completely into current segment */
             cb = cbFragment;
-            e1kFallbackAddSegment(pThis, pDesc->data.u64BufAddr, cb, pDesc->data.cmd.fEOP /*fSend*/, fOnWorkerThread);
+            e1kFallbackAddSegment(pDevIns, pThis, pDesc->data.u64BufAddr, cb, pDesc->data.cmd.fEOP /*fSend*/, fOnWorkerThread);
         }
         else
         {
-            e1kFallbackAddSegment(pThis, pDesc->data.u64BufAddr, cb, true /*fSend*/, fOnWorkerThread);
+            e1kFallbackAddSegment(pDevIns, pThis, pDesc->data.u64BufAddr, cb, true /*fSend*/, fOnWorkerThread);
             /*
              * Rewind the packet tail pointer to the beginning of payload,
@@ -4447 +4462 @@
  * @returns error code
  *
- * @param   pThis          The device state structure.
+ * @param   pDevIns         The device instance.
+ * @param   pThis           The device state structure.
  * @param   pDesc           Pointer to the descriptor to transmit.
  * @param   cbFragment      Length of descriptor's buffer.
@@ -4453 +4469 @@
  * @thread  E1000_TX
  */
-static int e1kFallbackAddToFrame(PE1KSTATE pThis, E1KTXDESC *pDesc, bool fOnWorkerThread)
+static int e1kFallbackAddToFrame(PPDMDEVINS pDevIns, PE1KSTATE pThis, E1KTXDESC *pDesc, bool fOnWorkerThread)
 {
 #ifdef VBOX_STRICT
@@ -4479 +4495 @@
             /* This descriptor fits completely into current segment */
             cb = pDesc->data.cmd.u20DTALEN;
-            rc = e1kFallbackAddSegment(pThis, pDesc->data.u64BufAddr, cb, pDesc->data.cmd.fEOP /*fSend*/, fOnWorkerThread);
+            rc = e1kFallbackAddSegment(pDevIns, pThis, pDesc->data.u64BufAddr, cb, pDesc->data.cmd.fEOP /*fSend*/, fOnWorkerThread);
         }
         else
         {
-            rc = e1kFallbackAddSegment(pThis, pDesc->data.u64BufAddr, cb, true /*fSend*/, fOnWorkerThread);
+            rc = e1kFallbackAddSegment(pDevIns, pThis, pDesc->data.u64BufAddr, cb, true /*fSend*/, fOnWorkerThread);
             /*
              * Rewind the packet tail pointer to the beginning of payload,
@@ -4568 +4584 @@
  * @thread  E1000_TX
  */
-static void e1kDescReport(PE1KSTATE pThis, E1KTXDESC *pDesc, RTGCPHYS addr)
+static void e1kDescReport(PPDMDEVINS pDevIns, PE1KSTATE pThis, E1KTXDESC *pDesc, RTGCPHYS addr)
 {
     /*
@@ -4606 +4622 @@
                 //else {
                 /* Arm the timer to fire in TIVD usec (discard .024) */
-                e1kArmTimer(pThis, pThis->CTX_SUFF(pTIDTimer), TIDV);
+                e1kArmTimer(pDevIns, pThis, pThis->hTIDTimer, TIDV);
 # ifndef E1K_NO_TAD
                 /* If absolute timer delay is enabled and the timer is not running yet, arm it. */
                 E1kLog2(("%s Checking if TAD timer is running\n",
                          pThis->szPrf));
-                if (TADV != 0 && !TMTimerIsActive(pThis->CTX_SUFF(pTADTimer)))
-                    e1kArmTimer(pThis, pThis->CTX_SUFF(pTADTimer), TADV);
+                if (TADV != 0 && !PDMDevHlpTimerIsActive(pDevIns, pThis->hTADTimer))
+                    e1kArmTimer(pDevIns, pThis, pThis->hTADTimer, TADV);
 # endif /* E1K_NO_TAD */
             }
@@ -4623 +4639 @@
                     /* Cancel both timers if armed and fire immediately. */
 # ifndef E1K_NO_TAD
-                    TMTimerStop(pThis->CTX_SUFF(pTADTimer));
+                    PDMDevHlpTimerStop(pDevIns, pThis->hTADTimer);
 # endif
-                    TMTimerStop(pThis->CTX_SUFF(pTIDTimer));
+                    PDMDevHlpTimerStop(pDevIns, pThis->hTIDTimer);
                 }
 //#endif /* E1K_USE_TX_TIMERS */
                 E1K_INC_ISTAT_CNT(pThis->uStatIntTx);
-                e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, ICR_TXDW);
+                e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, ICR_TXDW);
 //#ifdef E1K_USE_TX_TIMERS
             }
@@ -4651 +4667 @@
  * - context  sets up the context for following data descriptors.
  *
- * @param   pThis          The device state structure.
+ * @param   pDevIns         The device instance.
+ * @param   pThis           The device state structure.
  * @param   pDesc           Pointer to descriptor union.
  * @param   addr            Physical address of descriptor in guest memory.
@@ -4657 +4674 @@
  * @thread  E1000_TX
  */
-static int e1kXmitDesc(PE1KSTATE pThis, E1KTXDESC *pDesc, RTGCPHYS addr, bool fOnWorkerThread)
+static int e1kXmitDesc(PPDMDEVINS pDevIns, PE1KSTATE pThis, E1KTXDESC *pDesc, RTGCPHYS addr, bool fOnWorkerThread)
 {
     int rc = VINF_SUCCESS;
@@ -4666 +4683 @@
 //#ifdef E1K_USE_TX_TIMERS
     if (pThis->fTidEnabled)
-        e1kCancelTimer(pThis, pThis->CTX_SUFF(pTIDTimer));
+        e1kCancelTimer(pDevIns, pThis, pThis->hTIDTimer);
 //#endif /* E1K_USE_TX_TIMERS */
 
@@ -4784 +4801 @@
                         && pThis->CTX_SUFF(pTxSg)->cbUsed == (size_t)pThis->contextTSE.dw3.u8HDRLEN + pThis->contextTSE.dw2.u20PAYLEN)
                     {
-                        e1kTransmitFrame(pThis, fOnWorkerThread);
+                        e1kTransmitFrame(pDevIns, pThis, fOnWorkerThread);
                         E1K_INC_CNT32(TSCTC);
                     }
@@ -4818 +4835 @@
                                               pThis->contextNormal.tu.u8CSS,
                                               pThis->contextNormal.tu.u16CSE);
-                        e1kTransmitFrame(pThis, fOnWorkerThread);
+                        e1kTransmitFrame(pDevIns, pThis, fOnWorkerThread);
                     }
                     else
@@ -4828 +4845 @@
             {
                 STAM_COUNTER_INC(&pThis->StatTxPathFallback);
-                e1kFallbackAddToFrame(pThis, pDesc, pDesc->data.cmd.u20DTALEN, fOnWorkerThread);
+                e1kFallbackAddToFrame(pDevIns, pThis, pDesc, pDesc->data.cmd.u20DTALEN, fOnWorkerThread);
             }
 
@@ -4877 +4894 @@
                     pThis->u16VTagTCI  = pDesc->legacy.dw3.u16Special;
                     /** @todo Offload processing goes here. */
-                    e1kTransmitFrame(pThis, fOnWorkerThread);
+                    e1kTransmitFrame(pDevIns, pThis, fOnWorkerThread);
                     pThis->u16TxPktLen = 0;
                 }
@@ -4911 +4928 @@
  * - context  sets up the context for following data descriptors.
  *
- * @param   pThis          The device state structure.
+ * @param   pDevIns         The device instance.
+ * @param   pThis           The device state structure.
  * @param   pDesc           Pointer to descriptor union.
  * @param   addr            Physical address of descriptor in guest memory.
@@ -4918 +4936 @@
  * @thread  E1000_TX
  */
-static int e1kXmitDesc(PE1KSTATE pThis, E1KTXDESC *pDesc, RTGCPHYS addr,
-                       bool fOnWorkerThread)
+static int e1kXmitDesc(PPDMDEVINS pDevIns, PE1KSTATE pThis, E1KTXDESC *pDesc, RTGCPHYS addr, bool fOnWorkerThread)
 {
     int rc = VINF_SUCCESS;
@@ -4928 +4945 @@
     {
         E1kLog(("%s e1kXmitDesc: skipping bad descriptor ^^^\n", pThis->szPrf));
-        e1kDescReport(pThis, pDesc, addr);
+        e1kDescReport(pDevIns, pThis, pDesc, addr);
         return VINF_SUCCESS;
     }
@@ -4934 +4951 @@
 //#ifdef E1K_USE_TX_TIMERS
     if (pThis->fTidEnabled)
-        TMTimerStop(pThis->CTX_SUFF(pTIDTimer));
+        PDMDevHlpTimerStop(pDevIns, pThis->hTIDTimer);
 //#endif /* E1K_USE_TX_TIMERS */
 
@@ -4942 +4959 @@
             /* The caller have already updated the context */
             E1K_INC_ISTAT_CNT(pThis->uStatDescCtx);
-            e1kDescReport(pThis, pDesc, addr);
+            e1kDescReport(pDevIns, pThis, pDesc, addr);
             break;
 
@@ -4957 +4974 @@
                 if (pDesc->data.cmd.fEOP)
                 {
-                    e1kTransmitFrame(pThis, fOnWorkerThread);
+                    e1kTransmitFrame(pDevIns, pThis, fOnWorkerThread);
                     pThis->u16TxPktLen = 0;
                 }
@@ -4977 +4994 @@
                             && pThis->CTX_SUFF(pTxSg)->cbUsed == (size_t)pThis->contextTSE.dw3.u8HDRLEN + pThis->contextTSE.dw2.u20PAYLEN)
                         {
-                            e1kTransmitFrame(pThis, fOnWorkerThread);
+                            e1kTransmitFrame(pDevIns, pThis, fOnWorkerThread);
                             E1K_INC_CNT32(TSCTC);
                         }
@@ -5011 +5028 @@
                                                   pThis->contextNormal.tu.u8CSS,
                                                   pThis->contextNormal.tu.u16CSE);
-                            e1kTransmitFrame(pThis, fOnWorkerThread);
+                            e1kTransmitFrame(pDevIns, pThis, fOnWorkerThread);
                         }
                         else
@@ -5021 +5038 @@
                 {
                     STAM_COUNTER_INC(&pThis->StatTxPathFallback);
-                    rc = e1kFallbackAddToFrame(pThis, pDesc, fOnWorkerThread);
+                    rc = e1kFallbackAddToFrame(pDevIns, pThis, pDesc, fOnWorkerThread);
                 }
             }
-            e1kDescReport(pThis, pDesc, addr);
+            e1kDescReport(pDevIns, pThis, pDesc, addr);
             STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatTransmit), a);
             break;
@@ -5055 +5072 @@
                                               0);
                         }
-                        e1kTransmitFrame(pThis, fOnWorkerThread);
+                        e1kTransmitFrame(pDevIns, pThis, fOnWorkerThread);
                         pThis->u16TxPktLen = 0;
                     }
@@ -5066 +5083 @@
                 }
             }
-            e1kDescReport(pThis, pDesc, addr);
+            e1kDescReport(pDevIns, pThis, pDesc, addr);
             STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatTransmit), a);
             break;
@@ -5230 +5247 @@
 }
 
-static int e1kXmitPacket(PE1KSTATE pThis, bool fOnWorkerThread)
+static int e1kXmitPacket(PPDMDEVINS pDevIns, PE1KSTATE pThis, bool fOnWorkerThread)
 {
     int rc = VINF_SUCCESS;
@@ -5242 +5259 @@
         E1kLog3(("%s About to process new TX descriptor at %08x%08x, TDLEN=%08x, TDH=%08x, TDT=%08x\n",
                  pThis->szPrf, TDBAH, TDBAL + TDH * sizeof(E1KTXDESC), TDLEN, TDH, TDT));
-        rc = e1kXmitDesc(pThis, pDesc, e1kDescAddr(TDBAH, TDBAL, TDH), fOnWorkerThread);
+        rc = e1kXmitDesc(pDevIns, pThis, pDesc, e1kDescAddr(TDBAH, TDBAL, TDH), fOnWorkerThread);
         if (RT_FAILURE(rc))
             break;
@@ -5252 +5269 @@
             E1kLog2(("%s Low on transmit descriptors, raise ICR.TXD_LOW, len=%x thresh=%x\n",
                      pThis->szPrf, e1kGetTxLen(pThis), GET_BITS(TXDCTL, LWTHRESH)*8));
-            e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, ICR_TXD_LOW);
+            e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, ICR_TXD_LOW);
         }
         ++pThis->iTxDCurrent;
@@ -5320 +5337 @@
                 E1kLog2(("%s Low on transmit descriptors, raise ICR.TXD_LOW, len=%x thresh=%x\n",
                          pThis->szPrf, e1kGetTxLen(pThis), GET_BITS(TXDCTL, LWTHRESH)*8));
-                e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, ICR_TXD_LOW);
+                e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, ICR_TXD_LOW);
             }
 
@@ -5327 +5344 @@
 
         /// @todo uncomment: pThis->uStatIntTXQE++;
-        /// @todo uncomment: e1kRaiseInterrupt(pThis, ICR_TXQE);
+        /// @todo uncomment: e1kRaiseInterrupt(pDevIns, pThis, ICR_TXQE);
         /*
          * Release the lock.
@@ -5374 +5391 @@
  * @returns VBox status code.  VERR_TRY_AGAIN is returned if we're busy.
  *
- * @param   pThis              The E1000 state.
+ * @param   pDevIns             The device instance.
+ * @param   pThis               The E1000 state.
  * @param   fOnWorkerThread     Whether we're on a worker thread or on an EMT.
  */
-static int e1kXmitPending(PE1KSTATE pThis, bool fOnWorkerThread)
+static int e1kXmitPending(PPDMDEVINS pDevIns, PE1KSTATE pThis, bool fOnWorkerThread)
 {
     int rc = VINF_SUCCESS;
@@ -5421 +5439 @@
                     goto out;
                 /* Copy the packet to allocated buffer and send it. */
-                rc = e1kXmitPacket(pThis, fOnWorkerThread);
+                rc = e1kXmitPacket(pDevIns, pThis, fOnWorkerThread);
                 /* If we're out of bandwidth we'll come back later. */
                 if (RT_FAILURE(rc))
@@ -5485 +5503 @@
             E1kLog2(("%s Out of transmit descriptors, raise ICR.TXD_LOW\n",
                      pThis->szPrf));
-            e1kRaiseInterrupt(pThis, VERR_SEM_BUSY, ICR_TXD_LOW);
+            e1kRaiseInterrupt(pDevIns, pThis, VERR_SEM_BUSY, ICR_TXD_LOW);
         }
 out:
@@ -5491 +5509 @@
 
         /// @todo uncomment: pThis->uStatIntTXQE++;
-        /// @todo uncomment: e1kRaiseInterrupt(pThis, ICR_TXQE);
+        /// @todo uncomment: e1kRaiseInterrupt(pDevIns, pThis, ICR_TXQE);
 
         e1kCsTxLeave(pThis);
@@ -5516 +5534 @@
     /* Resume suspended transmission */
     STATUS &= ~STATUS_TXOFF;
-    e1kXmitPending(pThis, true /*fOnWorkerThread*/);
+    e1kXmitPending(pThis->pDevInsR3, pThis, true /*fOnWorkerThread*/);
 }
 
@@ -5534 +5552 @@
     E1kLog2(("%s e1kTxQueueConsumer:\n", pThis->szPrf));
 
-    int rc = e1kXmitPending(pThis, false /*fOnWorkerThread*/); NOREF(rc);
+    int rc = e1kXmitPending(pDevIns, pThis, false /*fOnWorkerThread*/); NOREF(rc);
     AssertMsg(RT_SUCCESS(rc) || rc == VERR_TRY_AGAIN || rc == VERR_NET_DOWN, ("%Rrc\n", rc));
     return true;
@@ -5561 +5579 @@
  * @thread  EMT
  */
-static int e1kRegWriteTDT(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
-{
-    int rc = e1kRegWriteDefault(pThis, offset, index, value);
+static int e1kRegWriteTDT(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+{
+    int rc = e1kRegWriteDefault(pDevIns, pThis, offset, index, value);
 
     /* All descriptors starting with head and not including tail belong to us. */
@@ -5583 +5601 @@
         if (RT_LIKELY(rc == VINF_SUCCESS))
         {
-            if (!TMTimerIsActive(pThis->CTX_SUFF(pTXDTimer)))
+            if (!PDMDevInsTimerIsActive(pDevIns, pThis->hTXDTimer))
             {
 #ifdef E1K_INT_STATS
                 pThis->u64ArmedAt = RTTimeNanoTS();
 #endif
-                e1kArmTimer(pThis, pThis->CTX_SUFF(pTXDTimer), E1K_TX_DELAY);
+                e1kArmTimer(pDevIns, pThis, pThis->hTXDTimer, E1K_TX_DELAY);
             }
             E1K_INC_ISTAT_CNT(pThis->uStatTxDelayed);
@@ -5606 +5624 @@
 #endif
         {
-            rc = e1kXmitPending(pThis, false /*fOnWorkerThread*/);
+            rc = e1kXmitPending(pDevIns, pThis, false /*fOnWorkerThread*/);
             if (rc == VERR_TRY_AGAIN)
                 rc = VINF_SUCCESS;
@@ -5627 +5645 @@
  * @thread  EMT
  */
-static int e1kRegWriteMTA(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
-{
+static int e1kRegWriteMTA(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+{
+    RT_NOREF_PV(pDevIns);
     AssertReturn(offset - g_aE1kRegMap[index].offset < sizeof(pThis->auMTA), VERR_DEV_IO_ERROR);
-    pThis->auMTA[(offset - g_aE1kRegMap[index].offset)/sizeof(pThis->auMTA[0])] = value;
+    pThis->auMTA[(offset - g_aE1kRegMap[index].offset) / sizeof(pThis->auMTA[0])] = value;
 
     return VINF_SUCCESS;
@@ -5645 +5664 @@
  * @thread  EMT
  */
-static int e1kRegReadMTA(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
-{
-    AssertReturn(offset - g_aE1kRegMap[index].offset< sizeof(pThis->auMTA), VERR_DEV_IO_ERROR);
+static int e1kRegReadMTA(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
+{
+    RT_NOREF_PV(pDevIns);
+    AssertReturn(offset - g_aE1kRegMap[index].offset < sizeof(pThis->auMTA), VERR_DEV_IO_ERROR);
     *pu32Value = pThis->auMTA[(offset - g_aE1kRegMap[index].offset)/sizeof(pThis->auMTA[0])];
 
@@ -5662 +5682 @@
  * @thread  EMT
  */
-static int e1kRegWriteRA(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
-{
+static int e1kRegWriteRA(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+{
+    RT_NOREF_PV(pDevIns);
     AssertReturn(offset - g_aE1kRegMap[index].offset < sizeof(pThis->aRecAddr.au32), VERR_DEV_IO_ERROR);
     pThis->aRecAddr.au32[(offset - g_aE1kRegMap[index].offset)/sizeof(pThis->aRecAddr.au32[0])] = value;
@@ -5680 +5701 @@
  * @thread  EMT
  */
-static int e1kRegReadRA(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
-{
+static int e1kRegReadRA(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
+{
+    RT_NOREF_PV(pDevIns);
     AssertReturn(offset - g_aE1kRegMap[index].offset< sizeof(pThis->aRecAddr.au32), VERR_DEV_IO_ERROR);
     *pu32Value = pThis->aRecAddr.au32[(offset - g_aE1kRegMap[index].offset)/sizeof(pThis->aRecAddr.au32[0])];
@@ -5697 +5719 @@
  * @thread  EMT
  */
-static int e1kRegWriteVFTA(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
-{
+static int e1kRegWriteVFTA(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+{
+    RT_NOREF_PV(pDevIns);
     AssertReturn(offset - g_aE1kRegMap[index].offset < sizeof(pThis->auVFTA), VINF_SUCCESS);
     pThis->auVFTA[(offset - g_aE1kRegMap[index].offset)/sizeof(pThis->auVFTA[0])] = value;
@@ -5715 +5738 @@
  * @thread  EMT
  */
-static int e1kRegReadVFTA(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
-{
+static int e1kRegReadVFTA(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
+{
+    RT_NOREF_PV(pDevIns);
     AssertReturn(offset - g_aE1kRegMap[index].offset< sizeof(pThis->auVFTA), VERR_DEV_IO_ERROR);
     *pu32Value = pThis->auVFTA[(offset - g_aE1kRegMap[index].offset)/sizeof(pThis->auVFTA[0])];
@@ -5735 +5759 @@
  * @thread  EMT
  */
-static int e1kRegReadUnimplemented(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
-{
-    RT_NOREF3(pThis, offset, index);
+static int e1kRegReadUnimplemented(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, offset, index);
     E1kLog(("%s At %08X read (00000000) attempt from unimplemented register %s (%s)\n",
             pThis->szPrf, offset, g_aE1kRegMap[index].abbrev, g_aE1kRegMap[index].name));
@@ -5761 +5785 @@
  * @thread  EMT
  */
-static int e1kRegReadAutoClear(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
+static int e1kRegReadAutoClear(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
 {
     AssertReturn(index < E1K_NUM_OF_32BIT_REGS, VERR_DEV_IO_ERROR);
-    int rc = e1kRegReadDefault(pThis, offset, index, pu32Value);
+    int rc = e1kRegReadDefault(pDevIns, pThis, offset, index, pu32Value);
     pThis->auRegs[index] = 0;
 
@@ -5786 +5810 @@
  * @thread  EMT
  */
-static int e1kRegReadDefault(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
-{
-    RT_NOREF_PV(offset);
+static int e1kRegReadDefault(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t *pu32Value)
+{
+    RT_NOREF_PV(pDevIns); RT_NOREF_PV(offset);
 
     AssertReturn(index < E1K_NUM_OF_32BIT_REGS, VERR_DEV_IO_ERROR);
@@ -5808 +5832 @@
  */
 
- static int e1kRegWriteUnimplemented(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
-{
-    RT_NOREF_PV(pThis); RT_NOREF_PV(offset); RT_NOREF_PV(index); RT_NOREF_PV(value);
+ static int e1kRegWriteUnimplemented(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+{
+    RT_NOREF_PV(pDevIns); RT_NOREF_PV(pThis); RT_NOREF_PV(offset); RT_NOREF_PV(index); RT_NOREF_PV(value);
 
     E1kLog(("%s At %08X write attempt (%08X) to  unimplemented register %s (%s)\n",
@@ -5834 +5858 @@
  */
 
-static int e1kRegWriteDefault(PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
-{
-    RT_NOREF_PV(offset);
+static int e1kRegWriteDefault(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offset, uint32_t index, uint32_t value)
+{
+    RT_NOREF(pDevIns, offset);
 
     AssertReturn(index < E1K_NUM_OF_32BIT_REGS, VERR_DEV_IO_ERROR);
@@ -5912 +5936 @@
  * @returns VBox status code.
  *
+ * @param   pDevIns     The device instance.
  * @param   pThis       The device state structure.
  * @param   offReg      Register offset in memory-mapped frame.
@@ -5920 +5945 @@
  *          accesses we have to take care of that ourselves.
  */
-static int e1kRegReadUnaligned(PE1KSTATE pThis, uint32_t offReg, void *pv, uint32_t cb)
+static int e1kRegReadUnaligned(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offReg, void *pv, uint32_t cb)
 {
     uint32_t    u32    = 0;
@@ -5971 +5996 @@
             //pThis->iStatIntLost += pThis->iStatIntLostOne;
             //pThis->iStatIntLostOne = 0;
-            rc = g_aE1kRegMap[index].pfnRead(pThis, offReg & 0xFFFFFFFC, index, &u32);
+            rc = g_aE1kRegMap[index].pfnRead(pDevIns, pThis, offReg & 0xFFFFFFFC, index, &u32);
             u32 &= mask;
             //e1kCsLeave(pThis);
@@ -6002 +6027 @@
  * @returns VBox status code.
  *
+ * @param   pDevIns     The device instance.
  * @param   pThis       The device state structure.
  * @param   offReg      Register offset in memory-mapped frame.
@@ -6007 +6033 @@
  * @thread  EMT
  */
-static VBOXSTRICTRC e1kRegReadAlignedU32(PE1KSTATE pThis, uint32_t offReg, uint32_t *pu32)
+static VBOXSTRICTRC e1kRegReadAlignedU32(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offReg, uint32_t *pu32)
 {
     Assert(!(offReg & 3));
@@ -6031 +6057 @@
             //pThis->iStatIntLost += pThis->iStatIntLostOne;
             //pThis->iStatIntLostOne = 0;
-            rc = g_aE1kRegMap[idxReg].pfnRead(pThis, offReg & 0xFFFFFFFC, idxReg, pu32);
+            rc = g_aE1kRegMap[idxReg].pfnRead(pDevIns, pThis, offReg & 0xFFFFFFFC, idxReg, pu32);
             //e1kCsLeave(pThis);
             Log6(("%s At %08X read  %08X          from %s (%s)\n",
@@ -6054 +6080 @@
  * @returns VBox status code.
  *
+ * @param   pDevIns     The device instance.
  * @param   pThis       The device state structure.
  * @param   offReg      Register offset in memory-mapped frame.
@@ -6059 +6086 @@
  * @thread  EMT
  */
-static VBOXSTRICTRC e1kRegWriteAlignedU32(PE1KSTATE pThis, uint32_t offReg, uint32_t u32Value)
+static VBOXSTRICTRC e1kRegWriteAlignedU32(PPDMDEVINS pDevIns, PE1KSTATE pThis, uint32_t offReg, uint32_t u32Value)
 {
     VBOXSTRICTRC rc    = VINF_SUCCESS;
@@ -6080 +6107 @@
             //pThis->iStatIntLost += pThis->iStatIntLostOne;
             //pThis->iStatIntLostOne = 0;
-            rc = g_aE1kRegMap[index].pfnWrite(pThis, offReg, index, u32Value);
+            rc = g_aE1kRegMap[index].pfnWrite(pDevIns, pThis, offReg, index, u32Value);
             //e1kCsLeave(pThis);
         }
@@ -6111 +6138 @@
     Assert(!(off & 3));
 
-    VBOXSTRICTRC rcStrict = e1kRegReadAlignedU32(pThis, (uint32_t)off, (uint32_t *)pv);
+    VBOXSTRICTRC rcStrict = e1kRegReadAlignedU32(pDevIns, pThis, (uint32_t)off, (uint32_t *)pv);
 
     STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatMMIORead), a);
@@ -6130 +6157 @@
     Assert(!(off & 3));
 
-    VBOXSTRICTRC rcStrict = e1kRegWriteAlignedU32(pThis, (uint32_t)off, *(uint32_t const *)pv);
+    VBOXSTRICTRC rcStrict = e1kRegWriteAlignedU32(pDevIns, pThis, (uint32_t)off, *(uint32_t const *)pv);
 
     STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatMMIOWrite), a);
@@ -6157 +6184 @@
             case 0x04: /* IODATA */
                 if (!(pThis->uSelectedReg & 3))
-                    rc = e1kRegReadAlignedU32(pThis, pThis->uSelectedReg, pu32);
+                    rc = e1kRegReadAlignedU32(pDevIns, pThis, pThis->uSelectedReg, pu32);
                 else /** @todo r=bird: I wouldn't be surprised if this unaligned branch wasn't necessary. */
-                    rc = e1kRegReadUnaligned(pThis, pThis->uSelectedReg, pu32, cb);
+                    rc = e1kRegReadUnaligned(pDevIns, pThis, pThis->uSelectedReg, pu32, cb);
                 if (rc == VINF_IOM_R3_MMIO_READ)
                     rc = VINF_IOM_R3_IOPORT_READ;
@@ -6167 +6194 @@
             default:
                 E1kLog(("%s e1kIOPortIn: invalid port %#010x\n", pThis->szPrf, offPort));
+                /** @todo r=bird: Check what real hardware returns here. */
                 //rc = VERR_IOM_IOPORT_UNUSED; /* Why not? */
-                rc = VINF_SUCCESS;
+                rc = VINF_IOM_MMIO_UNUSED_00;  /* used to return VINF_SUCCESS and not touch *pu32, which amounted to this. */
+                break;
         }
     else
@@ -6174 +6203 @@
         E1kLog(("%s e1kIOPortIn: invalid op size: offPort=%RTiop cb=%08x", pThis->szPrf, offPort, cb));
         rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "%s e1kIOPortIn: invalid op size: offPort=%RTiop cb=%08x\n", pThis->szPrf, offPort, cb);
+        *pu32 = 0; /** @todo r=bird: Check what real hardware returns here.  (Didn't used to set a value here, picked zero as that's what we'd end up in most cases.) */
     }
     STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatIORead), a);
@@ -6205 +6235 @@
                 if (RT_LIKELY(!(pThis->uSelectedReg & 3)))
                 {
-                    rc = e1kRegWriteAlignedU32(pThis, pThis->uSelectedReg, u32);
+                    rc = e1kRegWriteAlignedU32(pDevIns, pThis, pThis->uSelectedReg, u32);
                     if (rc == VINF_IOM_R3_MMIO_WRITE)
                         rc = VINF_IOM_R3_IOPORT_WRITE;
@@ -6652 +6682 @@
     if (fPassed)
     {
-        rc = e1kHandleRxPacket(pThis, pvBuf, cb, status);
+        rc = e1kHandleRxPacket(pThis->pDevInsR3, pThis, pvBuf, cb, status);
     }
     //e1kCsLeave(pThis);
@@ -6717 +6747 @@
             /* If link was down, bring it up after a while. */
             if (!(STATUS & STATUS_LU))
-                e1kBringLinkUpDelayed(pThis);
+                e1kBringLinkUpDelayed(pThis->pDevInsR3, pThis);
             break;
         case PDMNETWORKLINKSTATE_DOWN:
@@ -6726 +6756 @@
             /* If link was up, bring it down. */
             if (STATUS & STATUS_LU)
-                e1kR3LinkDown(pThis);
+                e1kR3LinkDown(pThis->pDevInsR3, pThis);
             break;
         case PDMNETWORKLINKSTATE_DOWN_RESUME:
@@ -6734 +6764 @@
              */
             if (STATUS & STATUS_LU)
-                e1kR3LinkDownTemp(pThis);
+                e1kR3LinkDownTemp(pThis->pDevInsR3, pThis);
             break;
         default:
@@ -7037 +7067 @@
         && pThis->cMsLinkUpDelay)
     {
-        e1kR3LinkDownTemp(pThis);
+        e1kR3LinkDownTemp(pDevIns, pThis);
     }
     return VINF_SUCCESS;
@@ -7445 +7475 @@
      */
     if ((STATUS & STATUS_LU) && RT_SUCCESS(rc))
-        e1kR3LinkDownTemp(pThis);
+        e1kR3LinkDownTemp(pDevIns, pThis);
 
     PDMCritSectLeave(&pThis->cs);
@@ -7468 +7498 @@
     PE1KSTATE pThis = PDMINS_2_DATA(pDevIns, E1KSTATE*);
 #ifdef E1K_TX_DELAY
-    e1kCancelTimer(pThis, pThis->CTX_SUFF(pTXDTimer));
+    e1kCancelTimer(pDevIns, pThis, pThis->hTXDTimer);
 #endif /* E1K_TX_DELAY */
-    e1kCancelTimer(pThis, pThis->CTX_SUFF(pIntTimer));
-    e1kCancelTimer(pThis, pThis->CTX_SUFF(pLUTimer));
+    e1kCancelTimer(pDevIns, pThis, pThis->hIntTimer);
+    e1kCancelTimer(pDevIns, pThis, pThis->hLUTimer);
     e1kXmitFreeBuf(pThis);
     pThis->u16TxPktLen  = 0;
@@ -7480 +7510 @@
     pThis->fLocked      = false;
     pThis->u64AckedAt   = 0;
-    e1kHardReset(pThis);
+    e1kHardReset(pDevIns, pThis);
 }
 
@@ -7515 +7545 @@
     pThis->pTxQueueRC    = PDMQueueRCPtr(pThis->pTxQueueR3);
     pThis->pCanRxQueueRC = PDMQueueRCPtr(pThis->pCanRxQueueR3);
-#ifdef E1K_USE_RX_TIMERS
-    pThis->pRIDTimerRC   = TMTimerRCPtr(pThis->pRIDTimerR3);
-    pThis->pRADTimerRC   = TMTimerRCPtr(pThis->pRADTimerR3);
-#endif /* E1K_USE_RX_TIMERS */
-//#ifdef E1K_USE_TX_TIMERS
-    if (pThis->fTidEnabled)
-    {
-        pThis->pTIDTimerRC   = TMTimerRCPtr(pThis->pTIDTimerR3);
-# ifndef E1K_NO_TAD
-        pThis->pTADTimerRC   = TMTimerRCPtr(pThis->pTADTimerR3);
-# endif /* E1K_NO_TAD */
-    }
-//#endif /* E1K_USE_TX_TIMERS */
-#ifdef E1K_TX_DELAY
-    pThis->pTXDTimerRC   = TMTimerRCPtr(pThis->pTXDTimerR3);
-#endif /* E1K_TX_DELAY */
-    pThis->pIntTimerRC   = TMTimerRCPtr(pThis->pIntTimerR3);
-    pThis->pLUTimerRC    = TMTimerRCPtr(pThis->pLUTimerR3);
 }
 
@@ -7837 +7849 @@
 
     /* Map our registers to IO space (region 2, see e1kR3ConfigurePciDev) */
+    static IOMIOPORTDESC const s_aExtDescs[] =
+    {
+        { "IOADDR", "IOADDR", NULL, NULL }, { "unused", "unused", NULL, NULL }, { "unused", "unused", NULL, NULL }, { "unused", "unused", NULL, NULL },
+        { "IODATA", "IODATA", NULL, NULL }, { "unused", "unused", NULL, NULL }, { "unused", "unused", NULL, NULL }, { "unused", "unused", NULL, NULL },
+        { NULL, NULL, NULL, NULL }
+    };
     rc = PDMDevHlpIoPortCreate(pDevIns, E1K_IOPORT_SIZE, pDevIns->apPciDevs[0], 2 /*iPciRegion*/,
-                               e1kIOPortOut, e1kIOPortIn, NULL /*pvUser*/, "E1000", NULL /*paExtDescs*/, &pThis->hIoPorts);
+                               e1kIOPortOut, e1kIOPortIn, NULL /*pvUser*/, "E1000", s_aExtDescs, &pThis->hIoPorts);
     AssertRCReturn(rc, rc);
     rc = PDMDevHlpPCIIORegionRegisterIo(pDevIns, 2, E1K_IOPORT_SIZE, pThis->hIoPorts, e1kR3Map);
@@ -7860 +7878 @@
 #ifdef E1K_TX_DELAY
     /* Create Transmit Delay Timer */
-    rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kTxDelayTimer, pThis,
-                                TMTIMER_FLAGS_NO_CRIT_SECT,
-                                "E1000 Transmit Delay Timer", &pThis->pTXDTimerR3);
+    rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kTxDelayTimer, pThis, TMTIMER_FLAGS_NO_CRIT_SECT,
+                              "E1000 Transmit Delay Timer", &pThis->hTXDTimer);
     AssertRCReturn(rc, rc);
-    pThis->pTXDTimerR0 = TMTimerR0Ptr(pThis->pTXDTimerR3);
-    pThis->pTXDTimerRC = TMTimerRCPtr(pThis->pTXDTimerR3);
-    TMR3TimerSetCritSect(pThis->pTXDTimerR3, &pThis->csTx);
+    rc = PDMDevHlpTimerSetCritSect(pDevIns, pThis->hTXDTimer, &pThis->csTx);
+    AssertRCReturn(rc, rc);
 #endif /* E1K_TX_DELAY */
 
@@ -7873 +7889 @@
     {
         /* Create Transmit Interrupt Delay Timer */
-        rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kTxIntDelayTimer, pThis,
-                                    TMTIMER_FLAGS_NO_CRIT_SECT,
-                                    "E1000 Transmit Interrupt Delay Timer", &pThis->pTIDTimerR3);
-        if (RT_FAILURE(rc))
-            return rc;
-        pThis->pTIDTimerR0 = TMTimerR0Ptr(pThis->pTIDTimerR3);
-        pThis->pTIDTimerRC = TMTimerRCPtr(pThis->pTIDTimerR3);
+        rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kTxIntDelayTimer, pThis, TMTIMER_FLAGS_NO_CRIT_SECT,
+                                  "E1000 Transmit Interrupt Delay Timer", &pThis->hTIDTimer);
+        AssertRCReturn(rc, rc);
 
 # ifndef E1K_NO_TAD
         /* Create Transmit Absolute Delay Timer */
-        rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kTxAbsDelayTimer, pThis,
-                                    TMTIMER_FLAGS_NO_CRIT_SECT,
-                                    "E1000 Transmit Absolute Delay Timer", &pThis->pTADTimerR3);
-        if (RT_FAILURE(rc))
-            return rc;
-        pThis->pTADTimerR0 = TMTimerR0Ptr(pThis->pTADTimerR3);
-        pThis->pTADTimerRC = TMTimerRCPtr(pThis->pTADTimerR3);
+        rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kTxAbsDelayTimer, pThis, TMTIMER_FLAGS_NO_CRIT_SECT,
+                                  "E1000 Transmit Absolute Delay Timer", &pThis->hTADTimer);
+        AssertRCReturn(rc, rc);
 # endif /* E1K_NO_TAD */
     }
@@ -7896 +7904 @@
 #ifdef E1K_USE_RX_TIMERS
     /* Create Receive Interrupt Delay Timer */
-    rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kRxIntDelayTimer, pThis,
-                                TMTIMER_FLAGS_NO_CRIT_SECT,
-                                "E1000 Receive Interrupt Delay Timer", &pThis->pRIDTimerR3);
-    if (RT_FAILURE(rc))
-        return rc;
-    pThis->pRIDTimerR0 = TMTimerR0Ptr(pThis->pRIDTimerR3);
-    pThis->pRIDTimerRC = TMTimerRCPtr(pThis->pRIDTimerR3);
+    rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kRxIntDelayTimer, pThis, TMTIMER_FLAGS_NO_CRIT_SECT,
+                              "E1000 Receive Interrupt Delay Timer", &pThis->hRIDTimer);
+    AssertRCReturn(rc, rc);
 
     /* Create Receive Absolute Delay Timer */
-    rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kRxAbsDelayTimer, pThis,
-                                TMTIMER_FLAGS_NO_CRIT_SECT,
-                                "E1000 Receive Absolute Delay Timer", &pThis->pRADTimerR3);
-    if (RT_FAILURE(rc))
-        return rc;
-    pThis->pRADTimerR0 = TMTimerR0Ptr(pThis->pRADTimerR3);
-    pThis->pRADTimerRC = TMTimerRCPtr(pThis->pRADTimerR3);
+    rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kRxAbsDelayTimer, pThis, TMTIMER_FLAGS_NO_CRIT_SECT,
+                              "E1000 Receive Absolute Delay Timer", &pThis->hRADTimer);
+    AssertRCReturn(rc, rc);
 #endif /* E1K_USE_RX_TIMERS */
 
     /* Create Late Interrupt Timer */
-    rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kLateIntTimer, pThis,
-                                TMTIMER_FLAGS_NO_CRIT_SECT,
-                                "E1000 Late Interrupt Timer", &pThis->pIntTimerR3);
-    if (RT_FAILURE(rc))
-        return rc;
-    pThis->pIntTimerR0 = TMTimerR0Ptr(pThis->pIntTimerR3);
-    pThis->pIntTimerRC = TMTimerRCPtr(pThis->pIntTimerR3);
+    rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kLateIntTimer, pThis, TMTIMER_FLAGS_NO_CRIT_SECT,
+                              "E1000 Late Interrupt Timer", &pThis->hIntTimer);
+    AssertRCReturn(rc, rc);
 
     /* Create Link Up Timer */
-    rc = PDMDevHlpTMTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kLinkUpTimer, pThis,
-                                TMTIMER_FLAGS_NO_CRIT_SECT,
-                                "E1000 Link Up Timer", &pThis->pLUTimerR3);
-    if (RT_FAILURE(rc))
-        return rc;
-    pThis->pLUTimerR0 = TMTimerR0Ptr(pThis->pLUTimerR3);
-    pThis->pLUTimerRC = TMTimerRCPtr(pThis->pLUTimerR3);
+    rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, e1kLinkUpTimer, pThis, TMTIMER_FLAGS_NO_CRIT_SECT,
+                              "E1000 Link Up Timer", &pThis->hLUTimer);
+    AssertRCReturn(rc, rc);
 
     /* Register the info item */
@@ -7974 +7966 @@
         return rc;
 
-    e1kHardReset(pThis);
+    e1kHardReset(pDevIns, pThis);
 
     PDMDevHlpSTAMRegisterF(pDevIns, &pThis->StatReceiveBytes,       STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_BYTES,          "Amount of data received",            "/Public/Net/E1k%u/BytesReceived", iInstance);