- Timestamp:
- Oct 22, 2019 7:27:02 AM (5 years ago)
- svn:sync-xref-src-repo-rev:
- 134154
- Location:
- trunk/src/VBox/VMM/VMMR3
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/IOM.cpp
r81433 r81436 1913 1913 Log5(("IOM: Dispatching pending MMIO write: %RGp LB %#x\n", 1914 1914 pVCpu->iom.s.PendingMmioWrite.GCPhys, pVCpu->iom.s.PendingMmioWrite.cbValue)); 1915 1916 /* Use new MMIO handle hint and bypass PGM if it still looks right. */ 1917 size_t idxMmioRegionHint = pVCpu->iom.s.PendingMmioWrite.idxMmioRegionHint; 1918 if (idxMmioRegionHint < pVM->iom.s.cMmioRegs) 1919 { 1920 PIOMMMIOENTRYR3 pRegEntry = &pVM->iom.s.paMmioRegs[idxMmioRegionHint]; 1921 RTGCPHYS const GCPhysMapping = pRegEntry->GCPhysMapping; 1922 RTGCPHYS const offRegion = pVCpu->iom.s.PendingMmioWrite.GCPhys - GCPhysMapping; 1923 if (offRegion < pRegEntry->cbRegion && GCPhysMapping != NIL_RTGCPHYS) 1924 { 1925 rcStrict = iomMmioDoWrite(pVM, pVCpu, pRegEntry, GCPhysFault, offRegion, pvBuf, (uint32_t)cbBuf IOM_MMIO_STATS_COMMA_ARG); 1926 PDMCritSectLeave(pDevIns->CTX_SUFF(pCritSectRo)); 1927 #ifndef IN_RING3 1928 if (rcStrict == VINF_IOM_R3_MMIO_WRITE) 1929 rcStrict = iomMmioRing3WritePending(pVCpu, GCPhysFault, pvBuf, cbBuf, pRegEntry->idxSelf); 1930 if (rcStrict == VINF_IOM_R3_MMIO_WRITE) 1931 { 1932 STAM_COUNTER_INC(&pStats->WriteRZToR3); 1933 STAM_COUNTER_INC(&pVM->iom.s.StatRZMMIOWritesToR3); 1934 } 1935 else if (rcStrict == VINF_IOM_R3_MMIO_COMMIT_WRITE) 1936 { 1937 STAM_COUNTER_INC(&pStats->CommitRZToR3); 1938 STAM_COUNTER_INC(&pVM->iom.s.StatRZMMIOCommitsToR3); 1939 } 1940 else 1941 #endif 1942 STAM_COUNTER_INC(&pStats->Writes); 1943 STAM_PROFILE_STOP(&pStats->CTX_SUFF_Z(ProfWrite), Prf); 1944 } 1945 } 1946 1915 1947 /** @todo Try optimize this some day? Currently easier and more correct to 1916 1948 * involve PGM here since we never know if the MMIO area is still mapped -
trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp
r81153 r81436 4236 4236 rc = NEMR3NotifyPhysRomRegisterEarly(pVM, GCPhys, cb, fNemNotify); 4237 4237 4238 /* 4239 * !HACK ALERT! REM + (Shadowed) ROM ==> mess. 4240 * 4241 * If it's shadowed we'll register the handler after the ROM notification 4242 * so we get the access handler callbacks that we should. If it isn't 4243 * shadowed we'll do it the other way around to make REM use the built-in 4244 * ROM behavior and not the handler behavior (which is to route all access 4245 * to PGM atm). 4246 */ 4247 if (fFlags & PGMPHYS_ROM_FLAGS_SHADOWED) 4248 { 4249 if (RT_SUCCESS(rc)) 4250 rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, pVM->pgm.s.hRomPhysHandlerType, 4251 pRomNew, MMHyperCCToR0(pVM, pRomNew), MMHyperCCToRC(pVM, pRomNew), 4252 pszDesc); 4253 } 4254 else 4255 { 4256 if (RT_SUCCESS(rc)) 4257 rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, pVM->pgm.s.hRomPhysHandlerType, 4258 pRomNew, MMHyperCCToR0(pVM, pRomNew), MMHyperCCToRC(pVM, pRomNew), 4259 pszDesc); 4260 } 4238 /* Register the ROM access handler. */ 4239 if (RT_SUCCESS(rc)) 4240 rc = PGMHandlerPhysicalRegister(pVM, GCPhys, GCPhysLast, pVM->pgm.s.hRomPhysHandlerType, 4241 pRomNew, MMHyperCCToR0(pVM, pRomNew), MMHyperCCToRC(pVM, pRomNew), 4242 pszDesc); 4261 4243 if (RT_SUCCESS(rc)) 4262 4244 {
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