bootsectors

Timestamp:

Oct 31, 2019 2:29:46 PM (5 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

134362

Message:

VMM (and related changes): Add support for Hygon Dhyana CPUs. Modified and improved contribution by Hongyong Zang submitted under MIT license. Thank you!

Location:

trunk/src/VBox/ValidationKit/bootsectors

Files:

: 6 edited

bs3-cpu-decoding-1.c32 (modified) (1 diff)
bs3-cpu-generated-1-template.c (modified) (1 diff)
bs3-cpu-generated-1.h (modified) (1 diff)
bs3-cpu-weird-1-x0.c (modified) (2 diffs)
bs3kit/bs3-cmn-GetCpuVendor.c (modified) (1 diff)
bs3kit/bs3kit.h (modified) (1 diff)

Legend:

: Unmodified
: Added
: Removed

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-decoding-1.c32

r76553	r81605
882	882	bool fIsAmd = false;
883	883	if (g_uBs3CpuDetected & BS3CPU_F_CPUID)
884		fIsAmd = ASMIsAmdCpu();
	884	fIsAmd = ASMIsAmdCpu() \|\| ASMIsHygonCpu();
885	885	Bs3TestPrintf("fIsAmd=%d\n", fIsAmd);
886	886

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1-template.c

r76886	r81605
4748	4748	CASE_PRED(BS3CG1PRED_VENDOR_VIA, pThis->bCpuVendor == BS3CPUVENDOR_VIA);
4749	4749	CASE_PRED(BS3CG1PRED_VENDOR_SHANGHAI, pThis->bCpuVendor == BS3CPUVENDOR_SHANGHAI);
	4750	CASE_PRED(BS3CG1PRED_VENDOR_HYGON, pThis->bCpuVendor == BS3CPUVENDOR_HYGON);
4750	4751
4751	4752	#undef CASE_PRED

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-generated-1.h

r76886	r81605
776	776	BS3CG1PRED_VENDOR_VIA,
777	777	BS3CG1PRED_VENDOR_SHANGHAI,
	778	BS3CG1PRED_VENDOR_HYGON,
778	779
779	780	BS3CG1PRED_END

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-weird-1-x0.c

-              r76553
+              r81605
         Bs3TrapSetJmpAndRestore(&Ctx, &TrapCtx);
         Bs3RegSetDr7(0);
         if (g_enmCpuVendor == BS3CPUVENDOR_AMD)
+        if (g_enmCpuVendor == BS3CPUVENDOR_AMD || g_enmCpuVendor == BS3CPUVENDOR_HYGON)
             bs3CpuWeird1_CompareDbgInhibitRingXfer(&TrapCtx, &Ctx, X86_XCPT_DB, offTestLabel, cbSpAdjust,
                                                    X86_DR6_INIT_VAL | X86_DR6_B0, cbIretFrameInt, uHandlerRspInt);
 …
         Bs3TrapSetJmpAndRestore(&Ctx, &TrapCtx);
         if (g_enmCpuVendor == BS3CPUVENDOR_AMD)
+        if (g_enmCpuVendor == BS3CPUVENDOR_AMD || g_enmCpuVendor ==  BS3CPUVENDOR_HYGON)
             bs3CpuWeird1_CompareDbgInhibitRingXfer(&TrapCtx, &Ctx, X86_XCPT_DB, offTestLabel, cbSpAdjust,
                                                    X86_DR6_INIT_VAL | X86_DR6_B0, cbIretFrameInt, uHandlerRspInt);

trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-GetCpuVendor.c

r76886	r81605
45	45	if (ASMIsShanghaiCpuEx(uEbx, uEcx, uEdx))
46	46	return BS3CPUVENDOR_SHANGHAI;
	47	if (ASMIsHygonCpuEx(uEbx, uEcx, uEdx))
	48	return BS3CPUVENDOR_HYGON;
47	49	return BS3CPUVENDOR_UNKNOWN;
48	50	}

trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3kit.h

r76886	r81605
1538	1538	BS3CPUVENDOR_CYRIX,
1539	1539	BS3CPUVENDOR_SHANGHAI,
	1540	BS3CPUVENDOR_HYGON,
1540	1541	BS3CPUVENDOR_UNKNOWN,
1541	1542	BS3CPUVENDOR_END

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