Changeset 81624 in vbox for trunk/include/VBox
- Timestamp:
- Nov 1, 2019 8:46:49 PM (5 years ago)
- Location:
- trunk/include/VBox
- Files:
-
- 6 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/types.h
r81369 r81624 378 378 /** A NIL MMIO handle. */ 379 379 #define NIL_IOMMMIOHANDLE ((uint64_t)UINT64_MAX) 380 381 /** A cross context MMIO2 range handle. */ 382 typedef uint64_t PGMMMIO2HANDLE; 383 /** Pointer to a cross context MMIO2 handle. */ 384 typedef PGMMMIO2HANDLE *PPGMMMIO2HANDLE; 385 /** A NIL MMIO2 handle. */ 386 #define NIL_PGMMMIO2HANDLE ((uint64_t)UINT64_MAX) 380 387 381 388 /** Pointer to a PDM Base Interface. */ -
trunk/include/VBox/vmm/iom.h
r81564 r81624 539 539 #endif 540 540 VMMR3_INT_DECL(int) IOMR3MmioDeregister(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange); 541 VMMR3_INT_DECL(int) IOMR3MmioExPreRegister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cbRange,542 uint32_t fFlags, const char *pszDesc,543 RTR3PTR pvUserR3,544 R3PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallbackR3,545 R3PTRTYPE(PFNIOMMMIOREAD) pfnReadCallbackR3,546 R3PTRTYPE(PFNIOMMMIOFILL) pfnFillCallbackR3,547 RTR0PTR pvUserR0,548 R0PTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallbackR0,549 R0PTRTYPE(PFNIOMMMIOREAD) pfnReadCallbackR0,550 R0PTRTYPE(PFNIOMMMIOFILL) pfnFillCallbackR0,551 RTRCPTR pvUserRC,552 RCPTRTYPE(PFNIOMMMIOWRITE) pfnWriteCallbackRC,553 RCPTRTYPE(PFNIOMMMIOREAD) pfnReadCallbackRC,554 RCPTRTYPE(PFNIOMMMIOFILL) pfnFillCallbackRC);555 541 VMMR3_INT_DECL(int) IOMR3MmioExNotifyMapped(PVM pVM, void *pvUser, RTGCPHYS GCPhys); 556 542 VMMR3_INT_DECL(void) IOMR3MmioExNotifyUnmapped(PVM pVM, void *pvUser, RTGCPHYS GCPhys); -
trunk/include/VBox/vmm/pdmdev.h
r81616 r81624 868 868 * @a fFlags, UINT64_MAX if no handle is passed 869 869 * (old style). 870 * @param pfn CallbackCallback for doing the mapping. Optional if a handle870 * @param pfnMapUnmap Callback for doing the mapping. Optional if a handle 871 871 * is given. 872 872 * @remarks Caller enters the PDM critical section. … … 874 874 DECLR3CALLBACKMEMBER(int, pfnIORegionRegisterR3,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, 875 875 RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags, 876 uint64_t hHandle, PFNPCIIOREGIONMAP pfn Callback));876 uint64_t hHandle, PFNPCIIOREGIONMAP pfnMapUnmap)); 877 877 878 878 /** … … 2247 2247 /** Handle type mask. */ 2248 2248 #define PDMPCIDEV_IORGN_F_HANDLE_MASK UINT32_C(0x00000003) 2249 /** New-style (mostly wrt callbacks). */ 2250 #define PDMPCIDEV_IORGN_F_NEW_STYLE UINT32_C(0x00000004) 2249 2251 /** Mask of valid flags. */ 2250 #define PDMPCIDEV_IORGN_F_VALID_MASK UINT32_C(0x0000000 3)2252 #define PDMPCIDEV_IORGN_F_VALID_MASK UINT32_C(0x00000007) 2251 2253 /** @} */ 2252 2254 … … 2276 2278 2277 2279 /** Current PDMDEVHLPR3 version number. */ 2278 #define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE_PP(0xffe7, 3 0, 0)2280 #define PDM_DEVHLPR3_VERSION PDM_VERSION_MAKE_PP(0xffe7, 31, 0) 2279 2281 2280 2282 /** … … 2286 2288 uint32_t u32Version; 2287 2289 2290 /** @name I/O ports 2291 * @{ */ 2288 2292 /** 2289 2293 * Creates a range of I/O ports for a device. … … 2358 2362 */ 2359 2363 DECLR3CALLBACKMEMBER(uint32_t, pfnIoPortGetMappingAddress,(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts)); 2364 /** @} */ 2360 2365 2361 2366 /** … … 2447 2452 DECLR3CALLBACKMEMBER(int, pfnIOPortDeregister,(PPDMDEVINS pDevIns, RTIOPORT Port, RTIOPORT cPorts)); 2448 2453 2454 /** @name MMIO 2455 * @{ */ 2449 2456 /** 2450 2457 * Creates a memory mapped I/O (MMIO) region for a device. … … 2483 2490 2484 2491 /** 2485 * Maps a memory mapped I/O (MMIO) region .2492 * Maps a memory mapped I/O (MMIO) region (into the guest physical address space). 2486 2493 * 2487 2494 * @returns VBox status. … … 2489 2496 * @param hRegion The MMIO region handle. 2490 2497 * @param GCPhys Where to map the region. 2498 * @note An MMIO range may overlap with base memory if a lot of RAM is 2499 * configured for the VM, in which case we'll drop the base memory 2500 * pages. Presently we will make no attempt to preserve anything that 2501 * happens to be present in the base memory that is replaced, this is 2502 * technically incorrect but it's just not worth the effort to do 2503 * right, at least not at this point. 2491 2504 * @sa PDMDevHlpMmioUnmap, PDMDevHlpMmioCreate, PDMDevHlpMmioCreateEx, 2492 2505 * PDMDevHlpMmioSetUpContext … … 2495 2508 2496 2509 /** 2497 * Maps a memory mapped I/O (MMIO) region.2510 * Unmaps a memory mapped I/O (MMIO) region. 2498 2511 * 2499 2512 * @returns VBox status. … … 2531 2544 */ 2532 2545 DECLR3CALLBACKMEMBER(RTGCPHYS, pfnMmioGetMappingAddress,(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion)); 2546 /** @} */ 2533 2547 2534 2548 /** … … 2614 2628 DECLR3CALLBACKMEMBER(int, pfnMMIODeregister,(PPDMDEVINS pDevIns, RTGCPHYS GCPhysStart, RTGCPHYS cbRange)); 2615 2629 2630 /** @name MMIO2 2631 * @{ */ 2632 /** 2633 * Creates a MMIO2 region. 2634 * 2635 * As mentioned elsewhere, MMIO2 is just RAM spelled differently. It's RAM 2636 * associated with a device. It is also non-shared memory with a permanent 2637 * ring-3 mapping and page backing (presently). 2638 * 2639 * @returns VBox status. 2640 * @param pDevIns The device instance. 2641 * @param pPciDev The PCI device the region is associated with, or 2642 * NULL if no PCI device association. 2643 * @param iPciRegion The region number. Use the PCI region number as 2644 * this must be known to the PCI bus device too. If 2645 * it's not associated with the PCI device, then 2646 * any number up to UINT8_MAX is fine. 2647 * @param cb The size (in bytes) of the region. 2648 * @param fFlags Reserved for future use, must be zero. 2649 * @param ppvMapping Where to store the address of the ring-3 mapping 2650 * of the memory. 2651 * @param pszDesc Pointer to description string. This must not be 2652 * freed. 2653 * @param phRegion Where to return the MMIO2 region handle. 2654 * 2655 * @thread EMT(0) 2656 */ 2657 DECLR3CALLBACKMEMBER(int, pfnMmio2Create,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iPciRegion, RTGCPHYS cbRegion, 2658 uint32_t fFlags, const char *pszDesc, void **ppvMapping, PPGMMMIO2HANDLE phRegion)); 2659 2660 /** 2661 * Destroys a MMIO2 region, unmapping it and freeing the memory. 2662 * 2663 * Any physical access handlers registered for the region must be deregistered 2664 * before calling this function. 2665 * 2666 * @returns VBox status code. 2667 * @param pDevIns The device instance. 2668 * @param hRegion The MMIO2 region handle. 2669 * @thread EMT. 2670 */ 2671 DECLR3CALLBACKMEMBER(int, pfnMmio2Destroy,(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion)); 2672 2673 /** 2674 * Maps a MMIO2 region (into the guest physical address space). 2675 * 2676 * @returns VBox status. 2677 * @param pDevIns The device instance the region is associated with. 2678 * @param hRegion The MMIO2 region handle. 2679 * @param GCPhys Where to map the region. 2680 * @note A MMIO2 region overlap with base memory if a lot of RAM is 2681 * configured for the VM, in which case we'll drop the base memory 2682 * pages. Presently we will make no attempt to preserve anything that 2683 * happens to be present in the base memory that is replaced, this is 2684 * technically incorrect but it's just not worth the effort to do 2685 * right, at least not at this point. 2686 * @sa PDMDevHlpMmio2Unmap, PDMDevHlpMmio2Create, PDMDevHlpMmio2SetUpContext 2687 */ 2688 DECLR3CALLBACKMEMBER(int, pfnMmio2Map,(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion, RTGCPHYS GCPhys)); 2689 2690 /** 2691 * Unmaps a MMIO2 region. 2692 * 2693 * @returns VBox status. 2694 * @param pDevIns The device instance the region is associated with. 2695 * @param hRegion The MMIO2 region handle. 2696 * @sa PDMDevHlpMmio2Map, PDMDevHlpMmio2Create, PDMDevHlpMmio2SetUpContext 2697 */ 2698 DECLR3CALLBACKMEMBER(int, pfnMmio2Unmap,(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion)); 2699 2700 /** 2701 * Reduces the length of a MMIO range. 2702 * 2703 * This is for implementations of PDMPCIDEV::pfnRegionLoadChangeHookR3 and will 2704 * only work during saved state restore. It will not call the PCI bus code, as 2705 * that is expected to restore the saved resource configuration. 2706 * 2707 * It just adjusts the mapping length of the region so that when pfnMmioMap is 2708 * called it will only map @a cbRegion bytes and not the value set during 2709 * registration. 2710 * 2711 * @return VBox status code. 2712 * @param pDevIns The device owning the range. 2713 * @param hRegion The MMIO2 region handle. 2714 * @param cbRegion The new size, must be smaller. 2715 */ 2716 DECLR3CALLBACKMEMBER(int, pfnMmio2Reduce,(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion, RTGCPHYS cbRegion)); 2717 2718 /** 2719 * Gets the mapping address of the MMIO region @a hRegion. 2720 * 2721 * @returns Mapping address, NIL_RTGCPHYS if not mapped (or invalid parameters). 2722 * @param pDevIns The device instance to register the ports with. 2723 * @param hRegion The MMIO2 region handle. 2724 */ 2725 DECLR3CALLBACKMEMBER(RTGCPHYS, pfnMmio2GetMappingAddress,(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion)); 2726 2727 /** 2728 * Changes the number of an MMIO2 or pre-registered MMIO region. 2729 * 2730 * This should only be used to deal with saved state problems, so there is no 2731 * convenience inline wrapper for this method. 2732 * 2733 * @returns VBox status code. 2734 * @param pDevIns The device instance. 2735 * @param hRegion The MMIO2 region handle. 2736 * @param iNewRegion The new region index. 2737 * 2738 * @sa @bugref{9359} 2739 */ 2740 DECLR3CALLBACKMEMBER(int, pfnMmio2ChangeRegionNo,(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion, uint32_t iNewRegion)); 2741 /** @} */ 2742 2616 2743 /** 2617 2744 * Allocate and register a MMIO2 region. … … 2636 2763 * freed. 2637 2764 * @thread EMT. 2765 * @deprecated 2638 2766 */ 2639 2767 DECLR3CALLBACKMEMBER(int, pfnMMIO2Register,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cb, 2640 2768 uint32_t fFlags, void **ppv, const char *pszDesc)); 2641 2642 /**2643 * Pre-register a Memory Mapped I/O (MMIO) region.2644 *2645 * This API must be used for large PCI MMIO regions, as it handles these much2646 * more efficiently and with greater flexibility when it comes to heap usage.2647 * It is only available during device construction.2648 *2649 * To map and unmap the pre-registered region into and our of guest address2650 * space, use the PDMDevHlpMMIOExMap and PDMDevHlpMMIOExUnmap helpers.2651 *2652 * You may call PDMDevHlpMMIOExDeregister from the destructor to free the region2653 * for reasons of symmetry, but it will be automatically deregistered by PDM2654 * once the destructor returns.2655 *2656 * @returns VBox status.2657 * @param pDevIns The device instance to register the MMIO with.2658 * @param pPciDev The PCI device to associate the region with, use2659 * NULL to not associate it with any device.2660 * @param iRegion The PCI region number. When @a pPciDev is NULL,2661 * this is a unique number between 0 and UINT8_MAX.2662 * @param cbRegion The size of the range (in bytes).2663 * @param fFlags Flags, IOMMMIO_FLAGS_XXX.2664 * @param pszDesc Pointer to description string. This must not be freed.2665 * @param pvUser Ring-3 user argument.2666 * @param pfnWrite Pointer to function which is gonna handle Write operations.2667 * @param pfnRead Pointer to function which is gonna handle Read operations.2668 * @param pfnFill Pointer to function which is gonna handle Fill/memset operations. (optional)2669 * @param pvUserR0 Ring-0 user argument. Optional.2670 * @param pszWriteR0 The name of the ring-0 write handler method. Optional.2671 * @param pszReadR0 The name of the ring-0 read handler method. Optional.2672 * @param pszFillR0 The name of the ring-0 fill/memset handler method. Optional.2673 * @param pvUserRC Raw-mode context user argument. Optional. If2674 * unsigned value is 0x10000 or higher, it will be2675 * automatically relocated with the hypervisor2676 * guest mapping.2677 * @param pszWriteRC The name of the raw-mode context write handler method. Optional.2678 * @param pszReadRC The name of the raw-mode context read handler method. Optional.2679 * @param pszFillRC The name of the raw-mode context fill/memset handler method. Optional.2680 * @thread EMT2681 *2682 * @remarks Caller enters the device critical section prior to invoking the2683 * registered callback methods.2684 * @sa PDMDevHlpMMIOExMap, PDMDevHlpMMIOExUnmap, PDMDevHlpMMIOExDeregister,2685 * PDMDevHlpMMIORegisterEx2686 * @deprecated2687 */2688 DECLR3CALLBACKMEMBER(int, pfnMMIOExPreRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion,2689 uint32_t fFlags, const char *pszDesc, RTHCPTR pvUser,2690 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,2691 RTR0PTR pvUserR0, const char *pszWriteR0, const char *pszReadR0, const char *pszFillR0,2692 RTRCPTR pvUserRC, const char *pszWriteRC, const char *pszReadRC, const char *pszFillRC));2693 2769 2694 2770 /** … … 2704 2780 * @param iRegion The region number used during registration. 2705 2781 * @thread EMT. 2706 * @deprecated for MMIO2782 * @deprecated 2707 2783 */ 2708 2784 DECLR3CALLBACKMEMBER(int, pfnMMIOExDeregister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion)); … … 3502 3578 * @a fFlags, UINT64_MAX if no handle is passed 3503 3579 * (old style). 3504 * @param pfn CallbackCallback for doing the mapping, optional when a3580 * @param pfnMapUnmap Callback for doing the mapping, optional when a 3505 3581 * handle is specified. The callback will be 3506 3582 * invoked holding only the PDM lock. The device … … 3509 3585 DECLR3CALLBACKMEMBER(int, pfnPCIIORegionRegister,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, 3510 3586 RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, uint32_t fFlags, 3511 uint64_t hHandle, PFNPCIIOREGIONMAP pfn Callback));3587 uint64_t hHandle, PFNPCIIOREGIONMAP pfnMapUnmap)); 3512 3588 3513 3589 /** … … 4513 4589 uint32_t u32TheEnd; 4514 4590 } PDMDEVHLPR3; 4515 #endif /* !IN_RING3 */4591 #endif /* !IN_RING3 || DOXYGEN_RUNNING */ 4516 4592 /** Pointer to the R3 PDM Device API. */ 4517 4593 typedef R3PTRTYPE(struct PDMDEVHLPR3 *) PPDMDEVHLPR3; … … 4583 4659 DECLRCCALLBACKMEMBER(int, pfnMmioSetUpContextEx,(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, PFNIOMMMIONEWWRITE pfnWrite, 4584 4660 PFNIOMMMIONEWREAD pfnRead, PFNIOMMMIONEWFILL pfnFill, void *pvUser)); 4661 4662 /** 4663 * Sets up a raw-mode mapping for an MMIO2 region. 4664 * 4665 * The region must have been created in ring-3 first using 4666 * PDMDevHlpMmio2Create(). 4667 * 4668 * @returns VBox status. 4669 * @param pDevIns The device instance to register the ports with. 4670 * @param hRegion The MMIO2 region handle. 4671 * @param offSub Start of what to map into raw-mode. Must be page aligned. 4672 * @param cbSub Number of bytes to map into raw-mode. Must be page 4673 * aligned. Zero is an alias for everything. 4674 * @param ppvMapping Where to return the mapping corresponding to @a offSub. 4675 * @thread EMT(0) 4676 * @note Only available at VM creation time. 4677 * 4678 * @sa PDMDevHlpMmio2Create(). 4679 */ 4680 DECLRCCALLBACKMEMBER(int, pfnMmio2SetUpContext,(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion, 4681 size_t offSub, size_t cbSub, void **ppvMapping)); 4585 4682 4586 4683 /** … … 4873 4970 4874 4971 /** Current PDMDEVHLP version number. */ 4875 #define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 8, 0)4972 #define PDM_DEVHLPRC_VERSION PDM_VERSION_MAKE(0xffe6, 9, 0) 4876 4973 4877 4974 … … 4887 4984 * Sets up ring-0 callback handlers for an I/O port range. 4888 4985 * 4889 * The range must have been registered in ring-3 first using4986 * The range must have been created in ring-3 first using 4890 4987 * PDMDevHlpIoPortCreate() or PDMDevHlpIoPortCreateEx(). 4891 4988 * … … 4906 5003 * registered callback methods. 4907 5004 * 4908 * @sa PDMDevHlpIoPortCreate , PDMDevHlpIoPortCreateEx, PDMDevHlpIoPortMap,4909 * PDMDevHlpIoPort Unmap.5005 * @sa PDMDevHlpIoPortCreate(), PDMDevHlpIoPortCreateEx(), 5006 * PDMDevHlpIoPortMap(), PDMDevHlpIoPortUnmap(). 4910 5007 */ 4911 5008 DECLR0CALLBACKMEMBER(int, pfnIoPortSetUpContextEx,(PPDMDEVINS pDevIns, IOMIOPORTHANDLE hIoPorts, … … 4917 5014 * Sets up ring-0 callback handlers for an MMIO region. 4918 5015 * 4919 * The region must have been registered in ring-3 first using 4920 * PDMDevHlpMmioCreate() or PDMDevHlpMmioCreateEx(). 5016 * The region must have been created in ring-3 first using 5017 * PDMDevHlpMmioCreate(), PDMDevHlpMmioCreateEx(), PDMDevHlpMmioCreateAndMap(), 5018 * PDMDevHlpMmioCreateExAndMap() or PDMDevHlpPCIIORegionCreateMmio(). 4921 5019 * 4922 5020 * @returns VBox status. … … 4934 5032 * registered callback methods. 4935 5033 * 4936 * @sa PDMDevHlpMmioCreate , PDMDevHlpMmioCreateEx, PDMDevHlpMmioMap,4937 * PDMDevHlpMmioUnmap .5034 * @sa PDMDevHlpMmioCreate(), PDMDevHlpMmioCreateEx(), PDMDevHlpMmioMap(), 5035 * PDMDevHlpMmioUnmap(). 4938 5036 */ 4939 5037 DECLR0CALLBACKMEMBER(int, pfnMmioSetUpContextEx,(PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, PFNIOMMMIONEWWRITE pfnWrite, 4940 5038 PFNIOMMMIONEWREAD pfnRead, PFNIOMMMIONEWFILL pfnFill, void *pvUser)); 5039 5040 /** 5041 * Sets up a ring-0 mapping for an MMIO2 region. 5042 * 5043 * The region must have been created in ring-3 first using 5044 * PDMDevHlpMmio2Create(). 5045 * 5046 * @returns VBox status. 5047 * @param pDevIns The device instance to register the ports with. 5048 * @param hRegion The MMIO2 region handle. 5049 * @param offSub Start of what to map into ring-0. Must be page aligned. 5050 * @param cbSub Number of bytes to map into ring-0. Must be page 5051 * aligned. Zero is an alias for everything. 5052 * @param ppvMapping Where to return the mapping corresponding to @a offSub. 5053 * 5054 * @thread EMT(0) 5055 * @note Only available at VM creation time. 5056 * 5057 * @sa PDMDevHlpMmio2Create(). 5058 */ 5059 DECLR0CALLBACKMEMBER(int, pfnMmio2SetUpContext,(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion, size_t offSub, size_t cbSub, 5060 void **ppvMapping)); 4941 5061 4942 5062 /** … … 5314 5434 5315 5435 /** Current PDMDEVHLP version number. */ 5316 #define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 1 0, 0)5436 #define PDM_DEVHLPR0_VERSION PDM_VERSION_MAKE(0xffe5, 11, 0) 5317 5437 5318 5438 … … 5867 5987 5868 5988 #endif /* IN_RING3 */ 5869 #if ndef IN_RING35989 #if !defined(IN_RING3) || defined(DOXYGEN_RUNNING) 5870 5990 5871 5991 /** … … 5888 6008 } 5889 6009 5890 #endif /* !IN_RING3 */6010 #endif /* !IN_RING3 || DOXYGEN_RUNNING */ 5891 6011 #ifdef IN_RING3 5892 5893 6012 5894 6013 /** … … 5919 6038 */ 5920 6039 DECLINLINE(int) PDMDevHlpMmioCreateAndMap(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, RTGCPHYS cbRegion, 5921 P PDMPCIDEV pPciDev, uint32_t iPciRegion, PFNIOMMMIONEWWRITE pfnWrite,5922 PFNIOMMMIONEWREAD pfnRead, void *pvUser, const char *pszDesc, PIOMMMIOHANDLE phRegion)5923 { 5924 int rc = pDevIns->pHlpR3->pfnMmioCreateEx(pDevIns, cbRegion, 0, pPciDev, iPciRegion,5925 pfnWrite, pfnRead, NULL , pvUser, pszDesc, phRegion);6040 PFNIOMMMIONEWWRITE pfnWrite, PFNIOMMMIONEWREAD pfnRead, 6041 uint32_t fFlags, const char *pszDesc, PIOMMMIOHANDLE phRegion) 6042 { 6043 int rc = pDevIns->pHlpR3->pfnMmioCreateEx(pDevIns, cbRegion, fFlags, NULL /*pPciDev*/, UINT32_MAX /*iPciRegion*/, 6044 pfnWrite, pfnRead, NULL /*pfnFill*/, NULL /*pvUser*/, pszDesc, phRegion); 5926 6045 if (RT_SUCCESS(rc)) 5927 6046 rc = pDevIns->pHlpR3->pfnMmioMap(pDevIns, *phRegion, GCPhys); … … 5977 6096 5978 6097 #endif /* IN_RING3 */ 5979 #if ndef IN_RING36098 #if !defined(IN_RING3) || defined(DOXYGEN_RUNNING) 5980 6099 5981 6100 /** … … 5997 6116 } 5998 6117 5999 #endif /* !IN_RING3 */6118 #endif /* !IN_RING3 || DOXYGEN_RUNNING */ 6000 6119 #ifdef IN_RING3 6001 6120 … … 6106 6225 6107 6226 /** 6227 * @copydoc PDMDEVHLPR3::pfnMmio2Create 6228 */ 6229 DECLINLINE(int) PDMDevHlpMmio2Create(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iPciRegion, RTGCPHYS cbRegion, 6230 uint32_t fFlags, const char *pszDesc, void **ppvMapping, PPGMMMIO2HANDLE phRegion) 6231 { 6232 return pDevIns->pHlpR3->pfnMmio2Create(pDevIns, pPciDev, iPciRegion, cbRegion, fFlags, pszDesc, ppvMapping, phRegion); 6233 } 6234 6235 /** 6236 * @copydoc PDMDEVHLPR3::pfnMmio2Map 6237 */ 6238 DECLINLINE(int) PDMDevHlpMmio2Map(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion, RTGCPHYS GCPhys) 6239 { 6240 return pDevIns->pHlpR3->pfnMmio2Map(pDevIns, hRegion, GCPhys); 6241 } 6242 6243 /** 6244 * @copydoc PDMDEVHLPR3::pfnMmio2Unmap 6245 */ 6246 DECLINLINE(int) PDMDevHlpMmio2Unmap(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion) 6247 { 6248 return pDevIns->pHlpR3->pfnMmio2Unmap(pDevIns, hRegion); 6249 } 6250 6251 /** 6252 * @copydoc PDMDEVHLPR3::pfnMmio2Reduce 6253 */ 6254 DECLINLINE(int) PDMDevHlpMmio2Reduce(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion, RTGCPHYS cbRegion) 6255 { 6256 return pDevIns->pHlpR3->pfnMmio2Reduce(pDevIns, hRegion, cbRegion); 6257 } 6258 6259 /** 6260 * @copydoc PDMDEVHLPR3::pfnMmio2GetMappingAddress 6261 */ 6262 DECLINLINE(RTGCPHYS) PDMDevHlpMmio2GetMappingAddress(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion) 6263 { 6264 return pDevIns->pHlpR3->pfnMmio2GetMappingAddress(pDevIns, hRegion); 6265 } 6266 6267 #endif /* IN_RING3 */ 6268 #if !defined(IN_RING3) || defined(DOXYGEN_RUNNING) 6269 6270 /** 6271 * @copydoc PDMDEVHLPR0::pfnMmio2SetUpContext 6272 */ 6273 DECLINLINE(int) PDMDevHlpMmio2SetUpContext(PPDMDEVINS pDevIns, PGMMMIO2HANDLE hRegion, 6274 size_t offSub, size_t cbSub, void **ppvMapping) 6275 { 6276 return pDevIns->CTX_SUFF(pHlp)->pfnMmio2SetUpContext(pDevIns, hRegion, offSub, cbSub, ppvMapping); 6277 } 6278 6279 #endif /* !IN_RING3 || DOXYGEN_RUNNING */ 6280 #ifdef IN_RING3 6281 6282 /** 6108 6283 * @copydoc PDMDEVHLPR3::pfnMMIO2Register 6109 6284 */ … … 6112 6287 { 6113 6288 return pDevIns->pHlpR3->pfnMMIO2Register(pDevIns, pPciDev, iRegion, cb, fFlags, ppv, pszDesc); 6114 }6115 6116 /**6117 * @copydoc PDMDEVHLPR3::pfnMMIOExPreRegister6118 */6119 DECLINLINE(int) PDMDevHlpMMIOExPreRegister(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion,6120 uint32_t fFlags, const char *pszDesc, RTHCPTR pvUser,6121 PFNIOMMMIOWRITE pfnWrite, PFNIOMMMIOREAD pfnRead, PFNIOMMMIOFILL pfnFill,6122 RTR0PTR pvUserR0, const char *pszWriteR0, const char *pszReadR0, const char *pszFillR0,6123 RTRCPTR pvUserRC, const char *pszWriteRC, const char *pszReadRC, const char *pszFillRC)6124 {6125 return pDevIns->pHlpR3->pfnMMIOExPreRegister(pDevIns, pPciDev, iRegion, cbRegion, fFlags, pszDesc,6126 pvUser, pfnWrite, pfnRead, pfnFill,6127 pvUserR0, pszWriteR0, pszReadR0, pszFillR0,6128 pvUserRC, pszWriteRC, pszReadRC, pszFillRC);6129 6289 } 6130 6290 … … 6768 6928 * @param cbRegion Size of the region. 6769 6929 * @param enmType PCI_ADDRESS_SPACE_MEM, PCI_ADDRESS_SPACE_IO or PCI_ADDRESS_SPACE_MEM_PREFETCH. 6770 * @param pfn CallbackCallback for doing the mapping.6930 * @param pfnMapUnmap Callback for doing the mapping. 6771 6931 * @remarks The callback will be invoked holding the PDM lock. The device lock 6772 6932 * is NOT take because that is very likely be a lock order violation. 6933 * @remarks Old callback style, won't get unmap calls. 6773 6934 */ 6774 6935 DECLINLINE(int) PDMDevHlpPCIIORegionRegister(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cbRegion, 6775 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfn Callback)6936 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnMapUnmap) 6776 6937 { 6777 6938 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, NULL, iRegion, cbRegion, enmType, 6778 PDMPCIDEV_IORGN_F_NO_HANDLE, UINT64_MAX, pfn Callback);6939 PDMPCIDEV_IORGN_F_NO_HANDLE, UINT64_MAX, pfnMapUnmap); 6779 6940 } 6780 6941 6781 6942 /** 6782 6943 * @sa PDMDEVHLPR3::pfnPCIIORegionRegister 6944 * @remarks Old callback style, won't get unmap calls. 6783 6945 */ 6784 6946 DECLINLINE(int) PDMDevHlpPCIIORegionRegisterEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, RTGCPHYS cbRegion, 6785 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfn Callback)6947 PCIADDRESSSPACE enmType, PFNPCIIOREGIONMAP pfnMapUnmap) 6786 6948 { 6787 6949 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, pPciDev, iRegion, cbRegion, enmType, 6788 PDMPCIDEV_IORGN_F_NO_HANDLE, UINT64_MAX, pfn Callback);6950 PDMPCIDEV_IORGN_F_NO_HANDLE, UINT64_MAX, pfnMapUnmap); 6789 6951 } 6790 6952 … … 6797 6959 * @param cbRegion Size of the region. 6798 6960 * @param hIoPorts Handle to the I/O port region. 6799 * @param pfnCallback Callback for doing the mapping, optional. The 6961 */ 6962 DECLINLINE(int) PDMDevHlpPCIIORegionRegisterIo(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cbRegion, IOMIOPORTHANDLE hIoPorts) 6963 { 6964 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, NULL, iRegion, cbRegion, PCI_ADDRESS_SPACE_IO, 6965 PDMPCIDEV_IORGN_F_IOPORT_HANDLE | PDMPCIDEV_IORGN_F_NEW_STYLE, hIoPorts, NULL); 6966 } 6967 6968 /** 6969 * Registers a I/O port region for the default PCI device, custom map/unmap. 6970 * 6971 * @returns VBox status code. 6972 * @param pDevIns The device instance. 6973 * @param iRegion The region number. 6974 * @param cbRegion Size of the region. 6975 * @param hIoPorts Handle to the I/O port region. 6976 * @param pfnMapUnmap Callback for doing the mapping, optional. The 6800 6977 * callback will be invoked holding only the PDM lock. 6801 6978 * The device lock will _not_ be taken (due to lock 6802 6979 * order). 6803 6980 */ 6804 DECLINLINE(int) PDMDevHlpPCIIORegionRegisterIo (PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cbRegion,6805 IOMIOPORTHANDLE hIoPorts, PFNPCIIOREGIONMAP pfnCallback)6981 DECLINLINE(int) PDMDevHlpPCIIORegionRegisterIoCustom(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cbRegion, 6982 PFNPCIIOREGIONMAP pfnMapUnmap) 6806 6983 { 6807 6984 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, NULL, iRegion, cbRegion, PCI_ADDRESS_SPACE_IO, 6808 PDMPCIDEV_IORGN_F_ IOPORT_HANDLE, hIoPorts, pfnCallback);6809 } 6810 6985 PDMPCIDEV_IORGN_F_NO_HANDLE | PDMPCIDEV_IORGN_F_NEW_STYLE, 6986 UINT64_MAX, pfnMapUnmap); 6987 } 6811 6988 6812 6989 /** … … 6838 7015 if (RT_SUCCESS(rc)) 6839 7016 rc = pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, pDevIns->apPciDevs[0], iPciRegion, cbPorts, PCI_ADDRESS_SPACE_IO, 6840 PDMPCIDEV_IORGN_F_IOPORT_HANDLE, *phIoPorts, NULL /*pfnCallback*/); 7017 PDMPCIDEV_IORGN_F_IOPORT_HANDLE | PDMPCIDEV_IORGN_F_NEW_STYLE, 7018 *phIoPorts, NULL /*pfnMapUnmap*/); 6841 7019 return rc; 6842 7020 } 6843 6844 7021 6845 7022 /** … … 6854 7031 * PCI_ADDRESS_SPACE_BAR64 or PCI_ADDRESS_SPACE_BAR32. 6855 7032 * @param hMmioRegion Handle to the MMIO region. 6856 * @param pfn CallbackCallback for doing the mapping, optional. The7033 * @param pfnMapUnmap Callback for doing the mapping, optional. The 6857 7034 * callback will be invoked holding only the PDM lock. 6858 7035 * The device lock will _not_ be taken (due to lock … … 6860 7037 */ 6861 7038 DECLINLINE(int) PDMDevHlpPCIIORegionRegisterMmio(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, 6862 IOMMMIOHANDLE hMmioRegion, PFNPCIIOREGIONMAP pfn Callback)7039 IOMMMIOHANDLE hMmioRegion, PFNPCIIOREGIONMAP pfnMapUnmap) 6863 7040 { 6864 7041 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, NULL, iRegion, cbRegion, enmType, 6865 PDMPCIDEV_IORGN_F_MMIO_HANDLE, hMmioRegion, pfnCallback); 7042 PDMPCIDEV_IORGN_F_MMIO_HANDLE | PDMPCIDEV_IORGN_F_NEW_STYLE, 7043 hMmioRegion, pfnMapUnmap); 6866 7044 } 6867 7045 … … 6878 7056 * PCI_ADDRESS_SPACE_BAR64 or PCI_ADDRESS_SPACE_BAR32. 6879 7057 * @param hMmioRegion Handle to the MMIO region. 6880 * @param pfn CallbackCallback for doing the mapping, optional. The7058 * @param pfnMapUnmap Callback for doing the mapping, optional. The 6881 7059 * callback will be invoked holding only the PDM lock. 6882 7060 * The device lock will _not_ be taken (due to lock … … 6885 7063 DECLINLINE(int) PDMDevHlpPCIIORegionRegisterMmioEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, 6886 7064 RTGCPHYS cbRegion, PCIADDRESSSPACE enmType, IOMMMIOHANDLE hMmioRegion, 6887 PFNPCIIOREGIONMAP pfn Callback)7065 PFNPCIIOREGIONMAP pfnMapUnmap) 6888 7066 { 6889 7067 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, pPciDev, iRegion, cbRegion, enmType, 6890 PDMPCIDEV_IORGN_F_MMIO_HANDLE, hMmioRegion, pfnCallback); 7068 PDMPCIDEV_IORGN_F_MMIO_HANDLE | PDMPCIDEV_IORGN_F_NEW_STYLE, 7069 hMmioRegion, pfnMapUnmap); 6891 7070 } 6892 7071 … … 6921 7100 if (RT_SUCCESS(rc)) 6922 7101 rc = pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, pDevIns->apPciDevs[0], iPciRegion, cbRegion, enmType, 6923 PDMPCIDEV_IORGN_F_MMIO_HANDLE, *phRegion, NULL /*pfnCallback*/); 7102 PDMPCIDEV_IORGN_F_MMIO_HANDLE | PDMPCIDEV_IORGN_F_NEW_STYLE, 7103 *phRegion, NULL /*pfnMapUnmap*/); 6924 7104 return rc; 6925 7105 } 6926 7106 7107 7108 /** 7109 * Registers an MMIO2 region for the default PCI device. 7110 * 7111 * @returns VBox status code. 7112 * @param pDevIns The device instance. 7113 * @param iRegion The region number. 7114 * @param cbRegion Size of the region. 7115 * @param enmType PCI_ADDRESS_SPACE_MEM or 7116 * PCI_ADDRESS_SPACE_MEM_PREFETCH, optionally or-ing in 7117 * PCI_ADDRESS_SPACE_BAR64 or PCI_ADDRESS_SPACE_BAR32. 7118 * @param hMmio2Region Handle to the MMIO2 region. 7119 */ 7120 DECLINLINE(int) PDMDevHlpPCIIORegionRegisterMmio2(PPDMDEVINS pDevIns, uint32_t iRegion, RTGCPHYS cbRegion, 7121 PCIADDRESSSPACE enmType, PGMMMIO2HANDLE hMmio2Region) 7122 { 7123 return pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, NULL, iRegion, cbRegion, enmType, 7124 PDMPCIDEV_IORGN_F_MMIO2_HANDLE | PDMPCIDEV_IORGN_F_NEW_STYLE, 7125 hMmio2Region, NULL); 7126 } 7127 7128 /** 7129 * Combines PDMDevHlpMmio2Create and PDMDevHlpPCIIORegionRegisterMmio2, creating 7130 * and registering an MMIO2 region for the default PCI device, extended edition. 7131 * 7132 * @returns VBox status code. 7133 * @param pDevIns The device instance to register the ports with. 7134 * @param cbRegion The size of the region in bytes. 7135 * @param iPciRegion The PCI device region. 7136 * @param enmType PCI_ADDRESS_SPACE_MEM or 7137 * PCI_ADDRESS_SPACE_MEM_PREFETCH, optionally or-ing in 7138 * PCI_ADDRESS_SPACE_BAR64 or PCI_ADDRESS_SPACE_BAR32. 7139 * @param pszDesc Pointer to description string. This must not be freed. 7140 * @param ppvMapping Where to store the address of the ring-3 mapping of 7141 * the memory. 7142 * @param phRegion Where to return the MMIO2 region handle. 7143 * 7144 */ 7145 DECLINLINE(int) PDMDevHlpPCIIORegionCreateMmio2(PPDMDEVINS pDevIns, uint32_t iPciRegion, RTGCPHYS cbRegion, 7146 PCIADDRESSSPACE enmType, const char *pszDesc, 7147 void **ppvMapping, PPGMMMIO2HANDLE phRegion) 7148 7149 { 7150 int rc = pDevIns->pHlpR3->pfnMmio2Create(pDevIns, pDevIns->apPciDevs[0], iPciRegion << 16, cbRegion, 0 /*fFlags*/, 7151 pszDesc, ppvMapping, phRegion); 7152 if (RT_SUCCESS(rc)) 7153 rc = pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, pDevIns->apPciDevs[0], iPciRegion, cbRegion, enmType, 7154 PDMPCIDEV_IORGN_F_MMIO2_HANDLE, *phRegion, NULL /*pfnCallback*/); 7155 return rc; 7156 } 7157 7158 /** 7159 * Combines PDMDevHlpMmio2Create and PDMDevHlpPCIIORegionRegisterMmio2, creating 7160 * and registering an MMIO2 region for the default PCI device. 7161 * 7162 * @returns VBox status code. 7163 * @param pDevIns The device instance to register the ports with. 7164 * @param cbRegion The size of the region in bytes. 7165 * @param iPciRegion The PCI device region. 7166 * @param enmType PCI_ADDRESS_SPACE_MEM or 7167 * PCI_ADDRESS_SPACE_MEM_PREFETCH, optionally or-ing in 7168 * PCI_ADDRESS_SPACE_BAR64 or PCI_ADDRESS_SPACE_BAR32. 7169 * @param fMmio2Flags To be defined, must be zero. 7170 * @param pfnMapUnmap Callback for doing the mapping, optional. The 7171 * callback will be invoked holding only the PDM lock. 7172 * The device lock will _not_ be taken (due to lock 7173 * order). 7174 * @param pszDesc Pointer to description string. This must not be freed. 7175 * @param ppvMapping Where to store the address of the ring-3 mapping of 7176 * the memory. 7177 * @param phRegion Where to return the MMIO2 region handle. 7178 * 7179 */ 7180 DECLINLINE(int) PDMDevHlpPCIIORegionCreateMmio2Ex(PPDMDEVINS pDevIns, uint32_t iPciRegion, RTGCPHYS cbRegion, 7181 PCIADDRESSSPACE enmType, uint32_t fMmio2Flags, PFNPCIIOREGIONMAP pfnMapUnmap, 7182 const char *pszDesc, void **ppvMapping, PPGMMMIO2HANDLE phRegion) 7183 7184 { 7185 int rc = pDevIns->pHlpR3->pfnMmio2Create(pDevIns, pDevIns->apPciDevs[0], iPciRegion << 16, cbRegion, fMmio2Flags, 7186 pszDesc, ppvMapping, phRegion); 7187 if (RT_SUCCESS(rc)) 7188 rc = pDevIns->pHlpR3->pfnPCIIORegionRegister(pDevIns, pDevIns->apPciDevs[0], iPciRegion, cbRegion, enmType, 7189 PDMPCIDEV_IORGN_F_MMIO2_HANDLE, *phRegion, pfnMapUnmap); 7190 return rc; 7191 } 6927 7192 6928 7193 /** … … 7658 7923 } 7659 7924 7660 #endif /* !IN_RING3 */7925 #endif /* !IN_RING3 || DOXYGEN_RUNNING */ 7661 7926 7662 7927 /** -
trunk/include/VBox/vmm/pgm.h
r81475 r81624 677 677 VMMR0_INT_DECL(int) PGMR0PhysFlushHandyPages(PGVM pGVM, VMCPUID idCpu); 678 678 VMMR0_INT_DECL(int) PGMR0PhysAllocateLargeHandyPage(PGVM pGVM, VMCPUID idCpu); 679 VMMR0_INT_DECL(int) PGMR0PhysMMIO2MapKernel(PGVM pGVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, 680 size_t offSub, size_t cbSub, void **ppvMapping); 679 681 VMMR0_INT_DECL(int) PGMR0PhysSetupIoMmu(PGVM pGVM); 680 682 VMMR0DECL(int) PGMR0SharedModuleCheck(PVMCC pVM, PGVM pGVM, VMCPUID idCpu, PGMMSHAREDMODULE pModule, PCRTGCPTR64 paRegionsGCPtrs); … … 723 725 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc); 724 726 VMMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb); 725 VMMR3DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, void **ppv, const char *pszDesc); 726 VMMR3DECL(int) PGMR3PhysMMIOExPreRegister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cbRegion, PGMPHYSHANDLERTYPE hType, 727 RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc); 728 VMMR3DECL(int) PGMR3PhysMMIOExDeregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion); 729 VMMR3DECL(int) PGMR3PhysMMIOExMap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS GCPhys); 730 VMMR3DECL(int) PGMR3PhysMMIOExUnmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS GCPhys); 731 VMMR3_INT_DECL(int) PGMR3PhysMMIOExReduce(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cbRegion); 727 VMMR3_INT_DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb, 728 uint32_t fFlags, const char *pszDesc, void **ppv, PGMMMIO2HANDLE *phRegion); 729 VMMR3_INT_DECL(int) PGMR3PhysMMIOExDeregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2); 730 VMMR3_INT_DECL(int) PGMR3PhysMMIOExMap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys); 731 VMMR3_INT_DECL(int) PGMR3PhysMMIOExUnmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys); 732 VMMR3_INT_DECL(int) PGMR3PhysMMIOExReduce(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, RTGCPHYS cbRegion); 733 VMMR3_INT_DECL(int) PGMR3PhysMmio2ValidateHandle(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2); 734 VMMR3_INT_DECL(RTGCPHYS) PGMR3PhysMMIOExGetMappingAddress(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2); 735 VMMR3_INT_DECL(int) PGMR3PhysMMIOExChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, uint32_t iNewRegion); 732 736 VMMR3DECL(bool) PGMR3PhysMMIOExIsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys); 733 737 VMMR3_INT_DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys); 734 738 VMMR3_INT_DECL(int) PGMR3PhysMMIO2MapKernel(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr); 735 VMMR3_INT_DECL(int) PGMR3PhysMMIOExChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, uint32_t iNewRegion);736 739 737 740 -
trunk/include/VBox/vmm/vm.h
r81391 r81624 1266 1266 struct PGM s; 1267 1267 #endif 1268 uint8_t padding[2 0800]; /* multiple of 64 */1268 uint8_t padding[21120]; /* multiple of 64 */ 1269 1269 } pgm; 1270 1270 … … 1432 1432 1433 1433 /** Padding for aligning the structure size on a page boundrary. */ 1434 uint8_t abAlignment2[ 984 + 256 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT];1434 uint8_t abAlignment2[664 + 256 - sizeof(PVMCPUR3) * VMM_MAX_CPU_COUNT]; 1435 1435 1436 1436 /* ---- end small stuff ---- */ -
trunk/include/VBox/vmm/vm.mac
r81391 r81624 121 121 .cpum resb 1536 122 122 .vmm resb 1600 123 .pgm resb 2 0800123 .pgm resb 21120 124 124 .hm resb 5440 125 125 .trpm resb 5248 … … 138 138 .cfgm resb 8 139 139 140 .abAlignment2 resb 984 + 256 - RTR0PTR_CB * VMM_MAX_CPU_COUNT140 .abAlignment2 resb 664 + 256 - RTR0PTR_CB * VMM_MAX_CPU_COUNT 141 141 142 142 alignb RTR0PTR_CB * VMM_MAX_CPU_COUNT ; ASSUMES VMM_MAX_CPU_COUNT is a power of two.
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