Changeset 81777 in vbox for trunk/src/VBox/Devices/Storage
- Timestamp:
- Nov 11, 2019 7:58:22 PM (5 years ago)
- svn:sync-xref-src-repo-rev:
- 134568
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Storage/DevLsiLogicSCSI.cpp
r81774 r81777 65 65 66 66 /** Maximum number of entries in the release log. */ 67 #define MAX_REL_LOG_ERRORS 102468 69 #define LSILOGIC_RTGCPHYS_FROM_U32(Hi, Lo) ( (RTGCPHYS)RT_MAKE_U64(Lo, Hi) )67 #define MAX_REL_LOG_ERRORS 1024 68 69 #define LSILOGIC_RTGCPHYS_FROM_U32(Hi, Lo) ( (RTGCPHYS)RT_MAKE_U64(Lo, Hi) ) 70 70 71 71 /** Upper number a buffer is freed if it was too big before. */ 72 #define LSILOGIC_MAX_ALLOC_TOO_MUCH 2072 #define LSILOGIC_MAX_ALLOC_TOO_MUCH 20 73 73 74 74 /** Maximum size of the memory regions (prevents teh guest from DOSing the host by 75 75 * allocating loadds of memory). */ 76 #define LSILOGIC_MEMORY_REGIONS_MAX (_1M)76 #define LSILOGIC_MEMORY_REGIONS_MAX _1M 77 77 78 78 … … 111 111 { 112 112 /** Lower 32 bits of the reply address in memory. */ 113 uint32_t u32HostMFALowAddress;113 uint32_t u32HostMFALowAddress; 114 114 /** Full address of the reply in guest memory. */ 115 RTGCPHYS GCPhysReplyAddress;115 RTGCPHYS GCPhysReplyAddress; 116 116 /** Size of the reply. */ 117 uint32_t cbReply;117 uint32_t cbReply; 118 118 /** Different views to the reply depending on the request type. */ 119 MptReplyUnion Reply;119 MptReplyUnion Reply; 120 120 } LSILOGICSCSIREPLY; 121 121 /** Pointer to reply data. */ … … 128 128 { 129 129 /** List node. */ 130 RTLISTNODE NodeList;130 RTLISTNODE NodeList; 131 131 /** 32bit address the region starts to describe. */ 132 uint32_t u32AddrStart;132 uint32_t u32AddrStart; 133 133 /** 32bit address the region ends (inclusive). */ 134 uint32_t u32AddrEnd;134 uint32_t u32AddrEnd; 135 135 /** Data for this region - variable. */ 136 uint32_t au32Data[1];136 uint32_t au32Data[1]; 137 137 } LSILOGICMEMREGN; 138 138 /** Pointer to a memory region. */ … … 149 149 { 150 150 /** Pointer to the owning lsilogic device instance. - R3 pointer */ 151 R3PTRTYPE(PLSILOGICSCSI) 151 R3PTRTYPE(PLSILOGICSCSI) pLsiLogicR3; 152 152 153 153 /** LUN of the device. */ 154 uint32_t 154 uint32_t iLUN; 155 155 /** Number of outstanding tasks on the port. */ 156 volatile uint32_t 156 volatile uint32_t cOutstandingRequests; 157 157 158 158 #if HC_ARCH_BITS == 64 159 uint32_t 159 uint32_t Alignment0; 160 160 #endif 161 161 162 162 /** Our base interface. */ 163 PDMIBASE 163 PDMIBASE IBase; 164 164 /** Media port interface. */ 165 PDMIMEDIAPORT 165 PDMIMEDIAPORT IMediaPort; 166 166 /** Extended media port interface. */ 167 PDMIMEDIAEXPORT 167 PDMIMEDIAEXPORT IMediaExPort; 168 168 /** Led interface. */ 169 PDMILEDPORTS 169 PDMILEDPORTS ILed; 170 170 /** Pointer to the attached driver's base interface. */ 171 R3PTRTYPE(PPDMIBASE) 171 R3PTRTYPE(PPDMIBASE) pDrvBase; 172 172 /** Pointer to the attached driver's media interface. */ 173 R3PTRTYPE(PPDMIMEDIA) 173 R3PTRTYPE(PPDMIMEDIA) pDrvMedia; 174 174 /** Pointer to the attached driver's extended media interface. */ 175 R3PTRTYPE(PPDMIMEDIAEX) 175 R3PTRTYPE(PPDMIMEDIAEX) pDrvMediaEx; 176 176 /** The status LED state for this device. */ 177 PDMLED 177 PDMLED Led; 178 178 179 179 } LSILOGICDEVICE; … … 184 184 typedef struct LSILOGICREQ *PLSILOGICREQ; 185 185 186 /** 187 * Device instance data for the emulated SCSI controller. 186 187 /** 188 * Shared instance data for the LsiLogic emulation. 188 189 */ 189 190 typedef struct LSILOGICSCSI 190 191 { 191 192 /** Pointer to the device instance. - R3 ptr. */ 192 PPDMDEVINSR3 pDevInsR3;193 PPDMDEVINSR3 pDevInsR3; 193 194 /** Pointer to the device instance. - R0 ptr. */ 194 PPDMDEVINSR0 pDevInsR0;195 PPDMDEVINSR0 pDevInsR0; 195 196 /** Pointer to the device instance. - RC ptr. */ 196 PPDMDEVINSRC pDevInsRC;197 PPDMDEVINSRC pDevInsRC; 197 198 198 199 /** Flag whether the GC part of the device is enabled. */ 199 bool fGCEnabled;200 bool fGCEnabled; 200 201 /** Flag whether the R0 part of the device is enabled. */ 201 bool fR0Enabled;202 bool afPaddingMinus1[2+4];202 bool fR0Enabled; 203 bool afPaddingMinus1[2+4]; 203 204 204 205 /** The state the controller is currently in. */ 205 LSILOGICSTATE enmState;206 LSILOGICSTATE enmState; 206 207 /** Who needs to init the driver to get into operational state. */ 207 LSILOGICWHOINIT enmWhoInit;208 LSILOGICWHOINIT enmWhoInit; 208 209 /** Flag whether we are in doorbell function. */ 209 LSILOGICDOORBELLSTATE enmDoorbellState;210 LSILOGICDOORBELLSTATE enmDoorbellState; 210 211 /** Flag whether diagnostic access is enabled. */ 211 bool fDiagnosticEnabled;212 bool fDiagnosticEnabled; 212 213 /** Flag whether a notification was send to R3. */ 213 bool fNotificationSent;214 bool fNotificationSent; 214 215 /** Flag whether the guest enabled event notification from the IOC. */ 215 bool fEventNotificationEnabled;216 bool fEventNotificationEnabled; 216 217 /** Flag whether the diagnostic address and RW registers are enabled. */ 217 bool fDiagRegsEnabled;218 bool fDiagRegsEnabled; 218 219 219 220 /** Number of device states allocated. */ 220 uint32_t cDeviceStates;221 uint32_t cDeviceStates; 221 222 222 223 /** States for attached devices. */ 223 R3PTRTYPE(PLSILOGICDEVICE) paDeviceStates;224 R3PTRTYPE(PLSILOGICDEVICE) paDeviceStates; 224 225 #if HC_ARCH_BITS == 32 225 RTR3PTR R3PtrPadding0;226 RTR3PTR R3PtrPadding0; 226 227 #endif 227 228 228 229 /** Interrupt mask. */ 229 volatile uint32_t uInterruptMask;230 volatile uint32_t uInterruptMask; 230 231 /** Interrupt status register. */ 231 volatile uint32_t uInterruptStatus;232 volatile uint32_t uInterruptStatus; 232 233 233 234 /** Buffer for messages which are passed through the doorbell using the 234 235 * handshake method. */ 235 uint32_t aMessage[sizeof(MptConfigurationRequest)]; /** @todo r=bird: Looks like 4 tims the required size? Please explain in comment if this correct... */236 uint32_t aMessage[sizeof(MptConfigurationRequest)]; /** @todo r=bird: Looks like 4 times the required size? Please explain in comment if this correct... */ 236 237 /** Actual position in the buffer. */ 237 uint32_t iMessage;238 uint32_t iMessage; 238 239 /** Size of the message which is given in the doorbell message in dwords. */ 239 uint32_t cMessage;240 uint32_t cMessage; 240 241 241 242 /** Reply buffer. 242 243 * @note 60 bytes */ 243 MptReplyUnion ReplyBuffer;244 MptReplyUnion ReplyBuffer; 244 245 /** Next entry to read. */ 245 uint32_t uNextReplyEntryRead;246 uint32_t uNextReplyEntryRead; 246 247 /** Size of the reply in the buffer in 16bit words. */ 247 uint32_t cReplySize;248 uint32_t cReplySize; 248 249 249 250 /** The fault code of the I/O controller if we are in the fault state. */ 250 uint16_t u16IOCFaultCode; 251 uint16_t u16Padding0b; 252 253 /** MMIO address the device is mapped to. */ 254 RTGCPHYS GCPhysMMIOBase; 251 uint16_t u16IOCFaultCode; 252 uint16_t u16Padding0b; 255 253 256 254 /** Upper 32 bits of the message frame address to locate requests in guest memory. */ 257 uint32_t u32HostMFAHighAddr;255 uint32_t u32HostMFAHighAddr; 258 256 /** Upper 32 bits of the sense buffer address. */ 259 uint32_t u32SenseBufferHighAddr;257 uint32_t u32SenseBufferHighAddr; 260 258 /** Maximum number of devices the driver reported he can handle. */ 261 uint8_t cMaxDevices;262 /** Maximum number of buses the driver reported he can handle. */263 uint8_t cMaxBuses;259 uint8_t cMaxDevices; 260 /** Maximum number of buses the driver reported he can handle. */ 261 uint8_t cMaxBuses; 264 262 /** Current size of reply message frames in the guest. */ 265 uint16_t cbReplyFrame;263 uint16_t cbReplyFrame; 266 264 267 265 /** Next key to write in the sequence to get access 268 266 * to diagnostic memory. */ 269 uint32_t iDiagnosticAccess;267 uint32_t iDiagnosticAccess; 270 268 271 269 /** Number entries configured for the reply queue. */ 272 uint32_t cReplyQueueEntries;270 uint32_t cReplyQueueEntries; 273 271 /** Number entries configured for the outstanding request queue. */ 274 uint32_t cRequestQueueEntries;272 uint32_t cRequestQueueEntries; 275 273 276 274 /** Critical section protecting the reply post queue. */ 277 PDMCRITSECT ReplyPostQueueCritSect;275 PDMCRITSECT ReplyPostQueueCritSect; 278 276 /** Critical section protecting the reply free queue. */ 279 PDMCRITSECT ReplyFreeQueueCritSect;277 PDMCRITSECT ReplyFreeQueueCritSect; 280 278 /** Critical section protecting the request queue against 281 279 * concurrent access from the guest. */ 282 PDMCRITSECT RequestQueueCritSect;280 PDMCRITSECT RequestQueueCritSect; 283 281 /** Critical section protecting the reply free queue against 284 282 * concurrent write access from the guest. */ 285 PDMCRITSECT ReplyFreeQueueWriteCritSect;283 PDMCRITSECT ReplyFreeQueueWriteCritSect; 286 284 287 285 /** The reply free qeueue (only the first cReplyQueueEntries are used). */ 288 uint32_t volatile aReplyFreeQueue[LSILOGICSCSI_REPLY_QUEUE_DEPTH_MAX];286 uint32_t volatile aReplyFreeQueue[LSILOGICSCSI_REPLY_QUEUE_DEPTH_MAX]; 289 287 /** The reply post qeueue (only the first cReplyQueueEntries are used). */ 290 uint32_t volatile aReplyPostQueue[LSILOGICSCSI_REPLY_QUEUE_DEPTH_MAX];288 uint32_t volatile aReplyPostQueue[LSILOGICSCSI_REPLY_QUEUE_DEPTH_MAX]; 291 289 /** The request qeueue (only the first cRequestQueueEntries are used). */ 292 uint32_t volatile aRequestQueue[LSILOGICSCSI_REQUEST_QUEUE_DEPTH_MAX];290 uint32_t volatile aRequestQueue[LSILOGICSCSI_REQUEST_QUEUE_DEPTH_MAX]; 293 291 294 292 /** Next free entry in the reply queue the guest can write a address to. */ 295 volatile uint32_t 293 volatile uint32_t uReplyFreeQueueNextEntryFreeWrite; 296 294 /** Next valid entry the controller can read a valid address for reply frames from. */ 297 volatile uint32_t 295 volatile uint32_t uReplyFreeQueueNextAddressRead; 298 296 299 297 /** Next free entry in the reply queue the guest can write a address to. */ 300 volatile uint32_t 298 volatile uint32_t uReplyPostQueueNextEntryFreeWrite; 301 299 /** Next valid entry the controller can read a valid address for reply frames from. */ 302 volatile uint32_t 300 volatile uint32_t uReplyPostQueueNextAddressRead; 303 301 304 302 /** Next free entry the guest can write a address to a request frame to. */ 305 volatile uint32_t 303 volatile uint32_t uRequestQueueNextEntryFreeWrite; 306 304 /** Next valid entry the controller can read a valid address for request frames from. */ 307 volatile uint32_t 305 volatile uint32_t uRequestQueueNextAddressRead; 308 306 309 307 /** Emulated controller type */ 310 LSILOGICCTRLTYPE 308 LSILOGICCTRLTYPE enmCtrlType; 311 309 /** Handle counter */ 312 uint16_t 310 uint16_t u16NextHandle; 313 311 314 312 /** Number of ports this controller has. */ 315 uint8_t 313 uint8_t cPorts; 316 314 317 315 /** BIOS emulation. */ 318 VBOXSCSI 316 VBOXSCSI VBoxSCSI; 319 317 320 318 /** Status LUN: The base interface. */ 321 PDMIBASE 319 PDMIBASE IBase; 322 320 /** Status LUN: Leds interface. */ 323 PDMILEDPORTS 321 PDMILEDPORTS ILeds; 324 322 /** Status LUN: Partner of ILeds. */ 325 R3PTRTYPE(PPDMILEDCONNECTORS) 323 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector; 326 324 /** Status LUN: Media Notifys. */ 327 R3PTRTYPE(PPDMIMEDIANOTIFY) 325 R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify; 328 326 /** Pointer to the configuration page area. */ 329 327 R3PTRTYPE(PMptConfigurationPagesSupported) pConfigurationPages; … … 331 329 /** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when 332 330 * a port is entering the idle state. */ 333 bool volatile 331 bool volatile fSignalIdle; 334 332 /** Flag whether we have tasks which need to be processed again- */ 335 bool volatile 333 bool volatile fRedo; 336 334 /** Flag whether the worker thread is sleeping. */ 337 volatile bool 335 volatile bool fWrkThreadSleeping; 338 336 /** Flag whether a request from the BIOS is pending which the 339 337 * worker thread needs to process. */ 340 volatile bool 338 volatile bool fBiosReqPending; 341 339 #if HC_ARCH_BITS == 64 342 340 /** Alignment padding. */ 343 bool 341 bool afPadding2[4]; 344 342 #endif 345 343 /** List of tasks which can be redone. */ … … 347 345 348 346 /** Current address to read from or write to in the diagnostic memory region. */ 349 uint32_t 347 uint32_t u32DiagMemAddr; 350 348 /** Current size of the memory regions. */ 351 uint32_t 349 uint32_t cbMemRegns; 352 350 353 351 #if HC_ARCH_BITS ==32 354 uint32_t 352 uint32_t u32Padding3; 355 353 #endif 356 354 … … 358 356 { 359 357 /** List of memory regions - PLSILOGICMEMREGN. */ 360 RTLISTANCHOR 361 uint8_t 358 RTLISTANCHOR ListMemRegns; 359 uint8_t u8Padding[2 * sizeof(RTUINTPTR)]; 362 360 }; 363 361 364 362 /** Worker thread. */ 365 R3PTRTYPE(PPDMTHREAD) 363 R3PTRTYPE(PPDMTHREAD) pThreadWrk; 366 364 /** The event semaphore the processing thread waits on. */ 367 SUPSEMEVENT 365 SUPSEMEVENT hEvtProcess; 368 366 369 367 /** PCI Region \#0: I/O ports register access. */ 370 IOMIOPORTHANDLE 368 IOMIOPORTHANDLE hIoPortsReg; 371 369 /** PCI Region \#1: MMIO register access. */ 372 IOMMMIOHANDLE 370 IOMMMIOHANDLE hMmioReg; 373 371 /** PCI Region \#2: MMIO diag. */ 374 IOMMMIOHANDLE 372 IOMMMIOHANDLE hMmioDiag; 375 373 /** ISA Ports for the BIOS (when booting is configured). */ 376 IOMIOPORTHANDLE 374 IOMIOPORTHANDLE hIoPortsBios; 377 375 } LSILOGISCSI; 376 378 377 379 378 /** … … 384 383 { 385 384 /** I/O request handle. */ 386 PDMMEDIAEXIOREQ hIoReq;385 PDMMEDIAEXIOREQ hIoReq; 387 386 /** Next in the redo list. */ 388 PLSILOGICREQ pRedoNext;387 PLSILOGICREQ pRedoNext; 389 388 /** Target device. */ 390 PLSILOGICDEVICE pTargetDevice;389 PLSILOGICDEVICE pTargetDevice; 391 390 /** The message request from the guest. */ 392 MptRequestUnion GuestRequest;391 MptRequestUnion GuestRequest; 393 392 /** Address of the message request frame in guests memory. 394 393 * Used to read the S/G entries in the second step. */ 395 RTGCPHYS GCPhysMessageFrameAddr;394 RTGCPHYS GCPhysMessageFrameAddr; 396 395 /** Physical start address of the S/G list. */ 397 RTGCPHYS GCPhysSgStart;396 RTGCPHYS GCPhysSgStart; 398 397 /** Chain offset */ 399 uint32_t cChainOffset;398 uint32_t cChainOffset; 400 399 /** Pointer to the sense buffer. */ 401 uint8_t abSenseBuffer[18];400 uint8_t abSenseBuffer[18]; 402 401 /** Flag whether the request was issued from the BIOS. */ 403 bool fBIOS;402 bool fBIOS; 404 403 /** SCSI status code. */ 405 uint8_t u8ScsiSts;404 uint8_t u8ScsiSts; 406 405 } LSILOGICREQ; 407 406
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