VirtualBox

Changeset 81860 in vbox


Ignore:
Timestamp:
Nov 15, 2019 3:45:18 AM (5 years ago)
Author:
vboxsync
Message:

DevATA: Split up the state structures. Marked device as new-style. bugref:9218

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Storage/DevATA.cpp

    r81859 r81860  
    156156/** @} */
    157157
     158#define ATADEVSTATE_2_DEVINS(pIf)              ( (pIf)->CTX_SUFF(pDevIns) )
     159#define CONTROLLER_2_DEVINS(pController)       ( (pController)->CTX_SUFF(pDevIns) )
     160
    158161
    159162/*********************************************************************************************************************************
     
    167170{
    168171    /** Command register. */
    169     uint8_t    u8Cmd;
     172    uint8_t     u8Cmd;
    170173    /** Status register. */
    171     uint8_t    u8Status;
     174    uint8_t     u8Status;
     175    /** Explicit alignment padding.   */
     176    uint8_t     abAlignment[2];
    172177    /** Address of the MMIO region in the guest's memory space. */
    173     RTGCPHYS32 GCPhysAddr;
     178    RTGCPHYS32  GCPhysAddr;
    174179} BMDMAState;
    175180
     
    186191
    187192/**
    188  * The state of an ATA device.
    189  *
    190  * @implements PDMIBASE
    191  * @implements PDMIBLOCKPORT
    192  * @implements PDMIMOUNTNOTIFY
     193 * The shared state of an ATA device.
    193194 */
    194195typedef struct ATADevState
     
    354355    uint64_t                            u64CmdTS;
    355356
     357    /** The LUN number. */
     358    uint32_t                            iLUN;
     359    /** The controller number. */
     360    uint8_t                             iCtl;
     361    /** The device number. */
     362    uint8_t                             iDev;
     363    /** Set if the device is present. */
     364    bool                                fPresent;
     365    /** Explicit alignment. */
     366    uint8_t                             bAlignment2;
     367
     368    /** The serial number to use for IDENTIFY DEVICE commands. */
     369    char                                szSerialNumber[ATA_SERIAL_NUMBER_LENGTH+1];
     370    /** The firmware revision to use for IDENTIFY DEVICE commands. */
     371    char                                szFirmwareRevision[ATA_FIRMWARE_REVISION_LENGTH+1];
     372    /** The model number to use for IDENTIFY DEVICE commands. */
     373    char                                szModelNumber[ATA_MODEL_NUMBER_LENGTH+1];
     374    /** The vendor identification string for SCSI INQUIRY commands. */
     375    char                                szInquiryVendorId[SCSI_INQUIRY_VENDOR_ID_LENGTH+1];
     376    /** The product identification string for SCSI INQUIRY commands. */
     377    char                                szInquiryProductId[SCSI_INQUIRY_PRODUCT_ID_LENGTH+1];
     378    /** The revision string for SCSI INQUIRY commands. */
     379    char                                szInquiryRevision[SCSI_INQUIRY_REVISION_LENGTH+1];
     380
     381    /** Padding the structure to a multiple of 4096 for better I/O buffer alignment. */
     382    uint8_t                             abAlignment4[7 + 3544];
     383} ATADEVSTATE, ATADevState;
     384AssertCompileMemberAlignment(ATADEVSTATE, cTotalSectors, 8);
     385AssertCompileMemberAlignment(ATADEVSTATE, StatATADMA, 8);
     386AssertCompileMemberAlignment(ATADEVSTATE, u64CmdTS, 8);
     387AssertCompileMemberAlignment(ATADEVSTATE, szSerialNumber, 8);
     388AssertCompileSizeAlignment(ATADEVSTATE, 4096); /* To align the buffer on a page boundrary. */
     389/** Pointer to the shared state of an ATA device. */
     390typedef ATADEVSTATE *PATADEVSTATE;
     391
     392
     393/**
     394 * The ring-3 state of an ATA device.
     395 *
     396 * @implements PDMIBASE
     397 * @implements PDMIBLOCKPORT
     398 * @implements PDMIMOUNTNOTIFY
     399 */
     400typedef struct ATADEVSTATER3
     401{
    356402    /** Pointer to the attached driver's base interface. */
    357403    R3PTRTYPE(PPDMIBASE)                pDrvBase;
     
    367413    /** The mount notify interface. */
    368414    PDMIMOUNTNOTIFY                     IMountNotify;
    369     /** The LUN #. */
    370     RTUINT                              iLUN;
    371 
    372     RTUINT                              Alignment2; /**< Align pDevInsR3 correctly. */
    373 
    374     /** Pointer to device instance. */
    375     PPDMDEVINSR3                        pDevInsR3;
    376     /** Pointer to controller instance. */
    377     R3PTRTYPE(struct ATACONTROLLER *)   pControllerR3;
    378     /** Pointer to device instance. */
    379     PPDMDEVINSR0                        pDevInsR0;
    380     /** Pointer to controller instance. */
    381     R0PTRTYPE(struct ATACONTROLLER *)   pControllerR0;
    382     /** Pointer to device instance. */
    383     PPDMDEVINSRC                        pDevInsRC;
    384     /** Pointer to controller instance. */
    385     RCPTRTYPE(struct ATACONTROLLER *)   pControllerRC;
    386 
    387     /** The serial number to use for IDENTIFY DEVICE commands. */
    388     char                                szSerialNumber[ATA_SERIAL_NUMBER_LENGTH+1];
    389     /** The firmware revision to use for IDENTIFY DEVICE commands. */
    390     char                                szFirmwareRevision[ATA_FIRMWARE_REVISION_LENGTH+1];
    391     /** The model number to use for IDENTIFY DEVICE commands. */
    392     char                                szModelNumber[ATA_MODEL_NUMBER_LENGTH+1];
    393     /** The vendor identification string for SCSI INQUIRY commands. */
    394     char                                szInquiryVendorId[SCSI_INQUIRY_VENDOR_ID_LENGTH+1];
    395     /** The product identification string for SCSI INQUIRY commands. */
    396     char                                szInquiryProductId[SCSI_INQUIRY_PRODUCT_ID_LENGTH+1];
    397     /** The revision string for SCSI INQUIRY commands. */
    398     char                                szInquiryRevision[SCSI_INQUIRY_REVISION_LENGTH+1];
     415
     416    /** The LUN number. */
     417    uint32_t                            iLUN;
     418    /** The controller number. */
     419    uint8_t                             iCtl;
     420    /** The device number. */
     421    uint8_t                             iDev;
     422    /** Explicit alignment. */
     423    uint8_t                             abAlignment2[2];
     424    /** The device instance so we can get our bearings from an interface method. */
     425    PPDMDEVINSR3                        pDevIns;
     426
    399427    /** The current tracklist of the loaded medium if passthrough is used. */
    400428    R3PTRTYPE(PTRACKLIST)               pTrackList;
    401 
    402     uint8_t                             abAlignment4[HC_ARCH_BITS == 64 ? 7 + 3432 : 3 + 3432 + 13*4];
    403 } ATADevState;
    404 AssertCompileMemberAlignment(ATADevState, cTotalSectors, 8);
    405 AssertCompileMemberAlignment(ATADevState, StatATADMA, 8);
    406 AssertCompileMemberAlignment(ATADevState, u64CmdTS, 8);
    407 AssertCompileMemberAlignment(ATADevState, pDevInsR3, 8);
    408 AssertCompileMemberAlignment(ATADevState, szSerialNumber, 8);
    409 AssertCompileSizeAlignment(ATADevState, 4096); /* To align the buffer on a page boundrary. */
     429} ATADEVSTATER3;
     430/** Pointer to the ring-3 state of an ATA device. */
     431typedef ATADEVSTATER3 *PATADEVSTATER3;
    410432
    411433
     
    421443    /** The index of the source sink callback to call for doing the transfer. */
    422444    uint8_t  iSourceSink;
     445    /** Transfer direction. */
     446    uint8_t  uTxDir;
    423447    /** How many bytes to transfer. */
    424448    uint32_t cbTotalTransfer;
    425     /** Transfer direction. */
    426     uint8_t  uTxDir;
    427449} ATATransferRequest;
    428450
     
    480502
    481503/**
    482  * The state of an ATA controller containing to devices (master and slave).
     504 * The shared state of an ATA controller.
     505 *
     506 * Has two devices, the master (0) and the slave (1).
    483507 */
    484508typedef struct ATACONTROLLER
     
    492516    RTIOPORT            IOPortBase2;
    493517    /** The assigned IRQ. */
    494     RTUINT              irq;
     518    uint32_t            irq;
    495519    /** Access critical section */
    496520    PDMCRITSECT         lock;
     
    523547    uint32_t            cbRedoDMABuffer;
    524548
    525     /** Pointer to device instance. */
    526     PPDMDEVINSR3        pDevInsR3;
    527     /** Pointer to device instance. */
    528     PPDMDEVINSR0        pDevInsR0;
    529     /** Pointer to device instance. */
    530     PPDMDEVINSRC        pDevInsRC;
    531 
    532     /** Set when the destroying the device instance and the thread must exit. */
    533     uint32_t volatile   fShutdown;
    534     /** The async I/O thread handle. NIL_RTTHREAD if no thread. */
    535     RTTHREAD            AsyncIOThread;
    536549    /** The event semaphore the thread is waiting on for requests. */
    537550    SUPSEMEVENT         hAsyncIOSem;
     
    542555    /** The position at which to get a new request for the AIO thread. */
    543556    volatile uint8_t    AsyncIOReqTail;
    544     /** Whether to call PDMDevHlpAsyncNotificationCompleted when idle. */
    545     bool volatile       fSignalIdle;
    546     uint8_t             Alignment3[1]; /**< Explicit padding of the 1 byte gap. */
     557    /** The controller number. */
     558    uint8_t             iCtl;
    547559    /** Magic delay before triggering interrupts in DMA mode. */
    548560    uint32_t            msDelayIRQ;
    549     /** The event semaphore the thread is waiting on during suspended I/O. */
    550     RTSEMEVENT          SuspendIOSem;
    551561    /** The lock protecting the request queue. */
    552562    PDMCRITSECT         AsyncIORequestLock;
     
    573583    STAMPROFILEADV      StatAsyncTime;
    574584    STAMPROFILE         StatLockWait;
    575     uint8_t             abAlignment4[3400];
    576 } ATACONTROLLER, *PATACONTROLLER;
     585    uint8_t             abAlignment4[3456];
     586} ATACONTROLLER;
    577587AssertCompileMemberAlignment(ATACONTROLLER, lock, 8);
    578588AssertCompileMemberAlignment(ATACONTROLLER, aIfs, 8);
     
    580590AssertCompileMemberAlignment(ATACONTROLLER, StatAsyncOps, 8);
    581591AssertCompileMemberAlignment(ATACONTROLLER, AsyncIORequestLock, 8);
    582 AssertCompileSizeAlignment(ATACONTROLLER, 8);
    583592AssertCompileSizeAlignment(ATACONTROLLER, 4096); /* To align the controllers, devices and I/O buffers on page boundaries. */
    584593
    585 
     594/** Pointer to the shared state of an ATA controller. */
     595typedef ATACONTROLLER *PATACONTROLLER;
     596
     597
     598/**
     599 * The ring-3 state of an ATA controller.
     600 */
     601typedef struct ATACONTROLLERR3
     602{
     603    /** The ATA/ATAPI interfaces of this controller. */
     604    ATADEVSTATER3       aIfs[2];
     605
     606    /** Pointer to device instance. */
     607    PPDMDEVINSR3        pDevIns;
     608
     609    /** The async I/O thread handle. NIL_RTTHREAD if no thread. */
     610    RTTHREAD            hAsyncIOThread;
     611    /** The event semaphore the thread is waiting on during suspended I/O. */
     612    RTSEMEVENT          hSuspendIOSem;
     613    /** Set when the destroying the device instance and the thread must exit. */
     614    uint32_t volatile   fShutdown;
     615    /** Whether to call PDMDevHlpAsyncNotificationCompleted when idle. */
     616    bool volatile       fSignalIdle;
     617
     618    /** The controller number. */
     619    uint8_t             iCtl;
     620
     621    uint8_t             abAlignment[3];
     622} ATACONTROLLERR3;
     623/** Pointer to the ring-3 state of an ATA controller. */
     624typedef ATACONTROLLERR3 *PATACONTROLLERR3;
     625
     626
     627/** ATA chipset type.   */
    586628typedef enum CHIPSET
    587629{
     
    595637
    596638/**
    597  * The state of the ATA PCI device.
     639 * The shared state of a ATA PCI device.
     640 */
     641typedef struct PCIATAState
     642{
     643    /** The controllers. */
     644    ATACONTROLLER                   aCts[2];
     645    /** Flag indicating chipset being emulated (CHIPSET). */
     646    uint8_t                         u8Type;
     647    /** Explicit alignment padding. */
     648    uint8_t                         abAlignment1[7];
     649    /** PCI region \#4: Bus-master DMA I/O ports. */
     650    IOMIOPORTHANDLE                 hIoPortsBmDma;
     651} PCIATAState, ATASTATE;
     652/** Pointer to the shared state of an ATA PCI device. */
     653typedef ATASTATE *PATASTATE;
     654
     655
     656/**
     657 * The ring-3 state of a ATA PCI device.
    598658 *
    599659 * @implements  PDMILEDPORTS
    600660 */
    601 typedef struct PCIATAState
     661typedef struct ATASTATER3
    602662{
    603663    /** The controllers. */
    604     ATACONTROLLER                   aCts[2];
    605     /** Pointer to device instance. */
    606     PPDMDEVINSR3                    pDevIns;
     664    ATACONTROLLERR3                 aCts[2];
    607665    /** Status LUN: Base interface. */
    608666    PDMIBASE                        IBase;
     
    613671    /** Status LUN: Media Notify. */
    614672    R3PTRTYPE(PPDMIMEDIANOTIFY)     pMediaNotify;
    615     /** Flag whether RC is enabled. */
    616     bool                            fRCEnabled;
    617     /** Flag whether R0 is enabled. */
    618     bool                            fR0Enabled;
    619     /** Flag indicating chipset being emulated. */
    620     uint8_t                         u8Type;
    621     bool                            Alignment0[HC_ARCH_BITS == 64 ? 5 : 1 ]; /**< Align the struct size. */
    622     /** PCI region \#4: Bus-master DMA I/O ports. */
    623     IOMIOPORTHANDLE                 hIoPortsBmDma;
    624 } PCIATAState;
    625 
    626 #define ATACONTROLLER_IDX(pController) ( (pController) - PDMDEVINS_2_DATA(CONTROLLER_2_DEVINS(pController), PCIATAState *)->aCts )
    627 
    628 #define ATADEVSTATE_2_CONTROLLER(pIf)          ( (pIf)->CTX_SUFF(pController) )
    629 #define ATADEVSTATE_2_DEVINS(pIf)              ( (pIf)->CTX_SUFF(pDevIns) )
    630 #define CONTROLLER_2_DEVINS(pController)       ( (pController)->CTX_SUFF(pDevIns) )
     673    /** Pointer to device instance (for getting our bearings in interface methods). */
     674    PPDMDEVINSR3                    pDevIns;
     675} ATASTATER3;
     676/** Pointer to the ring-3 state of an ATA PCI device. */
     677typedef ATASTATER3 *PATASTATER3;
     678
     679
     680/**
     681 * The ring-0 state of the ATA PCI device.
     682 */
     683typedef struct ATASTATER0
     684{
     685    uint64_t                        uUnused;
     686} ATASTATER0;
     687/** Pointer to the ring-0 state of an ATA PCI device. */
     688typedef ATASTATER0 *PATASTATER0;
     689
     690
     691/**
     692 * The raw-mode state of the ATA PCI device.
     693 */
     694typedef struct ATASTATERC
     695{
     696    uint64_t                        uUnused;
     697} ATASTATERC;
     698/** Pointer to the raw-mode state of an ATA PCI device. */
     699typedef ATASTATERC *PATASTATERC;
     700
     701
     702/** The current context state of an ATA PCI device. */
     703typedef CTX_SUFF(ATASTATE) ATASTATECC;
     704/** Pointer to the current context state of an ATA PCI device. */
     705typedef CTX_SUFF(PATASTATE) PATASTATECC;
     706
    631707
    632708#ifndef VBOX_DEVICE_STRUCT_TESTCASE
     
    634710
    635711#ifdef IN_RING3
    636 DECLINLINE(void) ataSetStatusValue(ATADevState *s, uint8_t stat)
    637 {
    638     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    639 
     712DECLINLINE(void) ataSetStatusValue(PATACONTROLLER pCtl, ATADevState *s, uint8_t stat)
     713{
    640714    /* Freeze status register contents while processing RESET. */
    641715    if (!pCtl->fReset)
     
    648722
    649723
    650 DECLINLINE(void) ataSetStatus(ATADevState *s, uint8_t stat)
    651 {
    652     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    653 
     724DECLINLINE(void) ataSetStatus(PATACONTROLLER pCtl, ATADevState *s, uint8_t stat)
     725{
    654726    /* Freeze status register contents while processing RESET. */
    655727    if (!pCtl->fReset)
     
    661733
    662734
    663 DECLINLINE(void) ataUnsetStatus(ATADevState *s, uint8_t stat)
    664 {
    665     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    666 
     735DECLINLINE(void) ataUnsetStatus(PATACONTROLLER pCtl, ATADevState *s, uint8_t stat)
     736{
    667737    /* Freeze status register contents while processing RESET. */
    668738    if (!pCtl->fReset)
     
    676746
    677747# ifdef IN_RING3
    678 typedef void (*PFNBEGINTRANSFER)(ATADevState *);
    679 typedef bool (*PFNSOURCESINK)(ATADevState *);
    680 
    681 static void ataR3ReadWriteSectorsBT(ATADevState *);
    682 static void ataR3PacketBT(ATADevState *);
    683 static void atapiR3CmdBT(ATADevState *);
    684 static void atapiR3PassthroughCmdBT(ATADevState *);
    685 
    686 static bool ataR3IdentifySS(ATADevState *);
    687 static bool ataR3FlushSS(ATADevState *);
    688 static bool ataR3ReadSectorsSS(ATADevState *);
    689 static bool ataR3WriteSectorsSS(ATADevState *);
    690 static bool ataR3ExecuteDeviceDiagnosticSS(ATADevState *);
    691 static bool ataR3TrimSS(ATADevState *);
    692 static bool ataR3PacketSS(ATADevState *);
    693 static bool ataR3InitDevParmSS(ATADevState *);
    694 static bool ataR3RecalibrateSS(ATADevState *);
    695 static bool atapiR3GetConfigurationSS(ATADevState *);
    696 static bool atapiR3GetEventStatusNotificationSS(ATADevState *);
    697 static bool atapiR3IdentifySS(ATADevState *);
    698 static bool atapiR3InquirySS(ATADevState *);
    699 static bool atapiR3MechanismStatusSS(ATADevState *);
    700 static bool atapiR3ModeSenseErrorRecoverySS(ATADevState *);
    701 static bool atapiR3ModeSenseCDStatusSS(ATADevState *);
    702 static bool atapiR3ReadSS(ATADevState *);
    703 static bool atapiR3ReadCapacitySS(ATADevState *);
    704 static bool atapiR3ReadDiscInformationSS(ATADevState *);
    705 static bool atapiR3ReadTOCNormalSS(ATADevState *);
    706 static bool atapiR3ReadTOCMultiSS(ATADevState *);
    707 static bool atapiR3ReadTOCRawSS(ATADevState *);
    708 static bool atapiR3ReadTrackInformationSS(ATADevState *);
    709 static bool atapiR3RequestSenseSS(ATADevState *);
    710 static bool atapiR3PassthroughSS(ATADevState *);
    711 static bool atapiR3ReadDVDStructureSS(ATADevState *);
     748typedef void FNBEGINTRANSFER(PATACONTROLLER pCtl, PATADEVSTATE s);
     749typedef FNBEGINTRANSFER *PFNBEGINTRANSFER;
     750typedef bool FNSOURCESINK(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3);
     751typedef FNSOURCESINK *PFNSOURCESINK;
     752
     753static FNBEGINTRANSFER ataR3ReadWriteSectorsBT;
     754static FNBEGINTRANSFER ataR3PacketBT;
     755static FNBEGINTRANSFER atapiR3CmdBT;
     756static FNBEGINTRANSFER atapiR3PassthroughCmdBT;
     757
     758static FNSOURCESINK ataR3IdentifySS;
     759static FNSOURCESINK ataR3FlushSS;
     760static FNSOURCESINK ataR3ReadSectorsSS;
     761static FNSOURCESINK ataR3WriteSectorsSS;
     762static FNSOURCESINK ataR3ExecuteDeviceDiagnosticSS;
     763static FNSOURCESINK ataR3TrimSS;
     764static FNSOURCESINK ataR3PacketSS;
     765static FNSOURCESINK ataR3InitDevParmSS;
     766static FNSOURCESINK ataR3RecalibrateSS;
     767static FNSOURCESINK atapiR3GetConfigurationSS;
     768static FNSOURCESINK atapiR3GetEventStatusNotificationSS;
     769static FNSOURCESINK atapiR3IdentifySS;
     770static FNSOURCESINK atapiR3InquirySS;
     771static FNSOURCESINK atapiR3MechanismStatusSS;
     772static FNSOURCESINK atapiR3ModeSenseErrorRecoverySS;
     773static FNSOURCESINK atapiR3ModeSenseCDStatusSS;
     774static FNSOURCESINK atapiR3ReadSS;
     775static FNSOURCESINK atapiR3ReadCapacitySS;
     776static FNSOURCESINK atapiR3ReadDiscInformationSS;
     777static FNSOURCESINK atapiR3ReadTOCNormalSS;
     778static FNSOURCESINK atapiR3ReadTOCMultiSS;
     779static FNSOURCESINK atapiR3ReadTOCRawSS;
     780static FNSOURCESINK atapiR3ReadTrackInformationSS;
     781static FNSOURCESINK atapiR3RequestSenseSS;
     782static FNSOURCESINK atapiR3PassthroughSS;
     783static FNSOURCESINK atapiR3ReadDVDStructureSS;
    712784# endif /* IN_RING3 */
    713785
     
    821893
    822894# ifdef IN_RING3
    823 static void ataR3AsyncIOClearRequests(PATACONTROLLER pCtl)
    824 {
    825     int rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock, VINF_SUCCESS);
     895static void ataR3AsyncIOClearRequests(PPDMDEVINS pDevIns, PATACONTROLLER pCtl)
     896{
     897    int rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->AsyncIORequestLock, VINF_SUCCESS);
    826898    AssertRC(rc);
    827899
     
    829901    pCtl->AsyncIOReqTail = 0;
    830902
    831     rc = PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock);
     903    rc = PDMDevHlpCritSectLeave(pDevIns, &pCtl->AsyncIORequestLock);
    832904    AssertRC(rc);
    833905}
    834906# endif /* IN_RING3 */
    835907
    836 static void ataHCAsyncIOPutRequest(PATACONTROLLER pCtl, const ATARequest *pReq)
    837 {
    838     int rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock, VINF_SUCCESS);
     908static void ataHCAsyncIOPutRequest(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, const ATARequest *pReq)
     909{
     910    int rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->AsyncIORequestLock, VINF_SUCCESS);
    839911    AssertRC(rc);
    840912
    841     Assert((pCtl->AsyncIOReqHead + 1) % RT_ELEMENTS(pCtl->aAsyncIORequests) != pCtl->AsyncIOReqTail);
    842     memcpy(&pCtl->aAsyncIORequests[pCtl->AsyncIOReqHead], pReq, sizeof(*pReq));
    843     pCtl->AsyncIOReqHead++;
    844     pCtl->AsyncIOReqHead %= RT_ELEMENTS(pCtl->aAsyncIORequests);
    845 
    846     rc = PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock);
     913    uint8_t const iAsyncIORequest = pCtl->AsyncIOReqHead % RT_ELEMENTS(pCtl->aAsyncIORequests);
     914    Assert((iAsyncIORequest + 1) % RT_ELEMENTS(pCtl->aAsyncIORequests) != pCtl->AsyncIOReqTail);
     915    memcpy(&pCtl->aAsyncIORequests[iAsyncIORequest], pReq, sizeof(*pReq));
     916    pCtl->AsyncIOReqHead = (iAsyncIORequest + 1) % RT_ELEMENTS(pCtl->aAsyncIORequests);
     917
     918    rc = PDMDevHlpCritSectLeave(pDevIns, &pCtl->AsyncIORequestLock);
    847919    AssertRC(rc);
    848920
    849     rc = PDMDevHlpCritSectScheduleExitEvent(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, pCtl->hAsyncIOSem);
     921    rc = PDMDevHlpCritSectScheduleExitEvent(pDevIns, &pCtl->lock, pCtl->hAsyncIOSem);
    850922    if (RT_FAILURE(rc))
    851923    {
    852         rc = PDMDevHlpSUPSemEventSignal(pCtl->CTX_SUFF(pDevIns), pCtl->hAsyncIOSem);
     924        rc = PDMDevHlpSUPSemEventSignal(pDevIns, pCtl->hAsyncIOSem);
    853925        AssertRC(rc);
    854926    }
     
    857929# ifdef IN_RING3
    858930
    859 static const ATARequest *ataR3AsyncIOGetCurrentRequest(PATACONTROLLER pCtl)
     931static const ATARequest *ataR3AsyncIOGetCurrentRequest(PPDMDEVINS pDevIns, PATACONTROLLER pCtl)
    860932{
    861933    const ATARequest *pReq;
    862934
    863     int rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock, VINF_SUCCESS);
     935    int rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->AsyncIORequestLock, VINF_SUCCESS);
    864936    AssertRC(rc);
    865937
     
    869941        pReq = NULL;
    870942
    871     rc = PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock);
     943    rc = PDMDevHlpCritSectLeave(pDevIns, &pCtl->AsyncIORequestLock);
    872944    AssertRC(rc);
    873945    return pReq;
     
    883955 * @param ReqType   Type of the request to remove.
    884956 */
    885 static void ataR3AsyncIORemoveCurrentRequest(PATACONTROLLER pCtl, ATAAIO ReqType)
    886 {
    887     int rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock, VINF_SUCCESS);
     957static void ataR3AsyncIORemoveCurrentRequest(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATAAIO ReqType)
     958{
     959    int rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->AsyncIORequestLock, VINF_SUCCESS);
    888960    AssertRC(rc);
    889961
     
    894966    }
    895967
    896     rc = PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock);
     968    rc = PDMDevHlpCritSectLeave(pDevIns, &pCtl->AsyncIORequestLock);
    897969    AssertRC(rc);
    898970}
     
    906978 * @param pCtl      Controller for which to dump the queue.
    907979 */
    908 static void ataR3AsyncIODumpRequests(PATACONTROLLER pCtl)
    909 {
    910     int rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock, VINF_SUCCESS);
     980static void ataR3AsyncIODumpRequests(PPDMDEVINS pDevIns, PATACONTROLLER pCtl)
     981{
     982    int rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->AsyncIORequestLock, VINF_SUCCESS);
    911983    AssertRC(rc);
    912984
    913     LogRel(("PIIX3 ATA: Ctl#%d: request queue dump (topmost is current):\n", ATACONTROLLER_IDX(pCtl)));
     985    LogRel(("PIIX3 ATA: Ctl#%d: request queue dump (topmost is current):\n", pCtl->iCtl));
    914986    uint8_t curr = pCtl->AsyncIOReqTail;
    915987    do
    916988    {
    917989        if (curr == pCtl->AsyncIOReqHead)
    918             LogRel(("PIIX3 ATA: Ctl#%d: processed requests (topmost is oldest):\n", ATACONTROLLER_IDX(pCtl)));
     990            LogRel(("PIIX3 ATA: Ctl#%d: processed requests (topmost is oldest):\n", pCtl->iCtl));
    919991        switch (pCtl->aAsyncIORequests[curr].ReqType)
    920992        {
     
    9471019    } while (curr != pCtl->AsyncIOReqTail);
    9481020
    949     rc = PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock);
     1021    rc = PDMDevHlpCritSectLeave(pDevIns, &pCtl->AsyncIORequestLock);
    9501022    AssertRC(rc);
    9511023}
     
    9591031 * @param fStrict   If set then the controller is checked to be idle.
    9601032 */
    961 static bool ataR3AsyncIOIsIdle(PATACONTROLLER pCtl, bool fStrict)
    962 {
    963     int rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock, VINF_SUCCESS);
     1033static bool ataR3AsyncIOIsIdle(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, bool fStrict)
     1034{
     1035    int rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->AsyncIORequestLock, VINF_SUCCESS);
    9641036    AssertRC(rc);
    9651037
     
    9701042        fIdle &= (pCtl->uAsyncIOState == ATA_AIO_NEW);
    9711043
    972     rc = PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock);
     1044    rc = PDMDevHlpCritSectLeave(pDevIns, &pCtl->AsyncIORequestLock);
    9731045    AssertRC(rc);
    9741046    return fIdle;
     
    9791051 * Send a transfer request to the async I/O thread.
    9801052 *
     1053 * @param   pDevIns             The device instance.
     1054 * @param   pCtl                The ATA controller.
    9811055 * @param   s                   Pointer to the ATA device state data.
    9821056 * @param   cbTotalTransfer     Data transfer size.
     
    9861060 * @param   fChainedTransfer    Whether this is a transfer that is part of the previous command/transfer.
    9871061 */
    988 static void ataR3StartTransfer(ATADevState *s, uint32_t cbTotalTransfer, uint8_t uTxDir, ATAFNBT iBeginTransfer,
     1062static void ataR3StartTransfer(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s,
     1063                               uint32_t cbTotalTransfer, uint8_t uTxDir, ATAFNBT iBeginTransfer,
    9891064                               ATAFNSS iSourceSink, bool fChainedTransfer)
    9901065{
    991     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    9921066    ATARequest Req;
    9931067
    994     Assert(PDMDevHlpCritSectIsOwner(pCtl->CTX_SUFF(pDevIns), &pCtl->lock));
     1068    Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pCtl->lock));
    9951069
    9961070    /* Do not issue new requests while the RESET line is asserted. */
    9971071    if (pCtl->fReset)
    9981072    {
    999         Log2(("%s: Ctl#%d: suppressed new request as RESET is active\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
     1073        Log2(("%s: Ctl#%d: suppressed new request as RESET is active\n", __FUNCTION__, pCtl->iCtl));
    10001074        return;
    10011075    }
     
    10041078     * the command that is being submitted. Some broken guests issue commands
    10051079     * twice (e.g. the Linux kernel that comes with Acronis True Image 8). */
    1006     if (!fChainedTransfer && !ataR3AsyncIOIsIdle(pCtl, true /*fStrict*/))
    1007     {
    1008         Log(("%s: Ctl#%d: ignored command %#04x, controller state %d\n",
    1009              __FUNCTION__, ATACONTROLLER_IDX(pCtl), s->uATARegCommand, pCtl->uAsyncIOState));
     1080    if (!fChainedTransfer && !ataR3AsyncIOIsIdle(pDevIns, pCtl, true /*fStrict*/))
     1081    {
     1082        Log(("%s: Ctl#%d: ignored command %#04x, controller state %d\n", __FUNCTION__, pCtl->iCtl, s->uATARegCommand, pCtl->uAsyncIOState));
    10101083        LogRel(("PIIX3 IDE: guest issued command %#04x while controller busy\n", s->uATARegCommand));
    10111084        return;
     
    10211094    Req.u.t.iBeginTransfer = iBeginTransfer;
    10221095    Req.u.t.iSourceSink = iSourceSink;
    1023     ataSetStatusValue(s, ATA_STAT_BUSY);
     1096    ataSetStatusValue(pCtl, s, ATA_STAT_BUSY);
    10241097    pCtl->fChainedTransfer = fChainedTransfer;
    10251098
     
    10271100     * Kick the worker thread into action.
    10281101     */
    1029     Log2(("%s: Ctl#%d: message to async I/O thread, new request\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
    1030     ataHCAsyncIOPutRequest(pCtl, &Req);
     1102    Log2(("%s: Ctl#%d: message to async I/O thread, new request\n", __FUNCTION__, pCtl->iCtl));
     1103    ataHCAsyncIOPutRequest(pDevIns, pCtl, &Req);
    10311104}
    10321105
     
    10351108 * Send an abort command request to the async I/O thread.
    10361109 *
     1110 * @param   pDevIns     The device instance.
     1111 * @param   pCtl        The ATA controller.
    10371112 * @param   s           Pointer to the ATA device state data.
    10381113 * @param   fResetDrive Whether to reset the drive or just abort a command.
    10391114 */
    1040 static void ataR3AbortCurrentCommand(ATADevState *s, bool fResetDrive)
    1041 {
    1042     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
     1115static void ataR3AbortCurrentCommand(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s, bool fResetDrive)
     1116{
    10431117    ATARequest Req;
    10441118
    1045     Assert(PDMDevHlpCritSectIsOwner(pCtl->CTX_SUFF(pDevIns), &pCtl->lock));
     1119    Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pCtl->lock));
    10461120
    10471121    /* Do not issue new requests while the RESET line is asserted. */
    10481122    if (pCtl->fReset)
    10491123    {
    1050         Log2(("%s: Ctl#%d: suppressed aborting command as RESET is active\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
     1124        Log2(("%s: Ctl#%d: suppressed aborting command as RESET is active\n", __FUNCTION__, pCtl->iCtl));
    10511125        return;
    10521126    }
     
    10551129    Req.u.a.iIf = pCtl->iSelectedIf;
    10561130    Req.u.a.fResetDrive = fResetDrive;
    1057     ataSetStatus(s, ATA_STAT_BUSY);
    1058     Log2(("%s: Ctl#%d: message to async I/O thread, abort command on LUN#%d\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), s->iLUN));
    1059     ataHCAsyncIOPutRequest(pCtl, &Req);
    1060 }
     1131    ataSetStatus(pCtl, s, ATA_STAT_BUSY);
     1132    Log2(("%s: Ctl#%d: message to async I/O thread, abort command on LUN#%d\n", __FUNCTION__, pCtl->iCtl, s->iLUN));
     1133    ataHCAsyncIOPutRequest(pDevIns, pCtl, &Req);
     1134}
     1135
    10611136# endif /* IN_RING3 */
    10621137
     
    10641139 * Set the internal interrupt pending status, update INTREQ as appropriate.
    10651140 *
     1141 * @param   pDevIns     The device instance.
     1142 * @param   pCtl        The ATA controller.
    10661143 * @param   s           Pointer to the ATA device state data.
    10671144 */
    1068 static void ataHCSetIRQ(ATADevState *s)
    1069 {
    1070     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    1071     PPDMDEVINS pDevIns = ATADEVSTATE_2_DEVINS(s);
    1072 
    1073     if (!s->fIrqPending) {
     1145static void ataHCSetIRQ(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s)
     1146{
     1147    if (!s->fIrqPending)
     1148    {
    10741149        if (!(s->uATARegDevCtl & ATA_DEVCTL_DISABLE_IRQ))
    10751150        {
     
    10981173 * Clear the internal interrupt pending status, update INTREQ as appropriate.
    10991174 *
     1175 * @param   pDevIns     The device instance.
     1176 * @param   pCtl        The ATA controller.
    11001177 * @param   s           Pointer to the ATA device state data.
    11011178 */
    1102 static void ataUnsetIRQ(ATADevState *s)
    1103 {
    1104     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    1105     PPDMDEVINS pDevIns = ATADEVSTATE_2_DEVINS(s);
    1106 
    1107     if (s->fIrqPending) {
     1179static void ataUnsetIRQ(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s)
     1180{
     1181    if (s->fIrqPending)
     1182    {
    11081183        if (!(s->uATARegDevCtl & ATA_DEVCTL_DISABLE_IRQ))
    11091184        {
     
    11241199#if defined(IN_RING0) || defined(IN_RING3)
    11251200
    1126 static void ataHCPIOTransferStart(ATADevState *s, uint32_t start, uint32_t size)
     1201static void ataHCPIOTransferStart(PATACONTROLLER pCtl, ATADevState *s, uint32_t start, uint32_t size)
    11271202{
    11281203    Log2(("%s: LUN#%d start %d size %d\n", __FUNCTION__, s->iLUN, start, size));
    11291204    s->iIOBufferPIODataStart = start;
    11301205    s->iIOBufferPIODataEnd = start + size;
    1131     ataSetStatus(s, ATA_STAT_DRQ | ATA_STAT_SEEK);
    1132     ataUnsetStatus(s, ATA_STAT_BUSY);
    1133 }
    1134 
    1135 
    1136 static void ataHCPIOTransferStop(ATADevState *s)
     1206    ataSetStatus(pCtl, s, ATA_STAT_DRQ | ATA_STAT_SEEK);
     1207    ataUnsetStatus(pCtl, s, ATA_STAT_BUSY);
     1208}
     1209
     1210
     1211static void ataHCPIOTransferStop(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s)
    11371212{
    11381213    Log2(("%s: LUN#%d\n", __FUNCTION__, s->iLUN));
     
    11411216        s->uATARegNSector = (s->uATARegNSector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
    11421217        Log2(("%s: interrupt reason %#04x\n", __FUNCTION__, s->uATARegNSector));
    1143         ataHCSetIRQ(s);
     1218        ataHCSetIRQ(pDevIns, pCtl, s);
    11441219        s->fATAPITransfer = false;
    11451220    }
     
    11831258 *
    11841259 * @returns nothing.
     1260 * @param   pDevIns     The device instance.
    11851261 * @param   pCtl        The controller to lock.
    11861262 */
    1187 DECLINLINE(void) ataR3LockEnter(PATACONTROLLER pCtl)
     1263DECLINLINE(void) ataR3LockEnter(PPDMDEVINS pDevIns, PATACONTROLLER pCtl)
    11881264{
    11891265    STAM_PROFILE_START(&pCtl->StatLockWait, a);
    1190     PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_SUCCESS);
     1266    PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_SUCCESS);
    11911267    STAM_PROFILE_STOP(&pCtl->StatLockWait, a);
    11921268}
     
    11961272 *
    11971273 * @returns nothing.
     1274 * @param   pDevIns     The device instance.
    11981275 * @param   pCtl        The controller to unlock.
    11991276 */
    1200 DECLINLINE(void) ataR3LockLeave(PATACONTROLLER pCtl)
    1201 {
    1202     PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     1277DECLINLINE(void) ataR3LockLeave(PPDMDEVINS pDevIns, PATACONTROLLER pCtl)
     1278{
     1279    PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    12031280}
    12041281
     
    12651342#endif /* unused */
    12661343
    1267 static void ataR3CmdOK(ATADevState *s, uint8_t status)
     1344static void ataR3CmdOK(PATACONTROLLER pCtl, ATADevState *s, uint8_t status)
    12681345{
    12691346    s->uATARegError = 0; /* Not needed by ATA spec, but cannot hurt. */
    1270     ataSetStatusValue(s, ATA_STAT_READY | status);
    1271 }
    1272 
    1273 
    1274 static void ataR3CmdError(ATADevState *s, uint8_t uErrorCode)
     1347    ataSetStatusValue(pCtl, s, ATA_STAT_READY | status);
     1348}
     1349
     1350
     1351static void ataR3CmdError(PATACONTROLLER pCtl, ATADevState *s, uint8_t uErrorCode)
    12751352{
    12761353    Log(("%s: code=%#x\n", __FUNCTION__, uErrorCode));
    12771354    Assert(uErrorCode);
    12781355    s->uATARegError = uErrorCode;
    1279     ataSetStatusValue(s, ATA_STAT_READY | ATA_STAT_ERR);
     1356    ataSetStatusValue(pCtl, s, ATA_STAT_READY | ATA_STAT_ERR);
    12801357    s->cbTotalTransfer = 0;
    12811358    s->cbElementaryTransfer = 0;
     
    13001377}
    13011378
    1302 static bool ataR3IdentifySS(ATADevState *s)
     1379/**
     1380 * Sink/Source: IDENTIFY
     1381 */
     1382static bool ataR3IdentifySS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    13031383{
    13041384    uint16_t *p;
     1385    RT_NOREF(pDevIns);
    13051386
    13061387    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    13581439    p[67] = RT_H2LE_U16(120); /* minimum PIO cycle time without flow control */
    13591440    p[68] = RT_H2LE_U16(120); /* minimum PIO cycle time with IORDY flow control */
    1360     if (   s->pDrvMedia->pfnDiscard
     1441    if (   pDevR3->pDrvMedia->pfnDiscard
    13611442        || s->cbSector != 512
    1362         || s->pDrvMedia->pfnIsNonRotational(s->pDrvMedia))
     1443        || pDevR3->pDrvMedia->pfnIsNonRotational(pDevR3->pDrvMedia))
    13631444    {
    13641445        p[80] = RT_H2LE_U16(0x1f0); /* support everything up to ATA/ATAPI-8 ACS */
     
    14011482    }
    14021483
    1403     if (s->pDrvMedia->pfnDiscard) /** @todo Set bit 14 in word 69 too? (Deterministic read after TRIM). */
     1484    if (pDevR3->pDrvMedia->pfnDiscard) /** @todo Set bit 14 in word 69 too? (Deterministic read after TRIM). */
    14041485        p[169] = RT_H2LE_U16(1); /* DATA SET MANAGEMENT command supported. */
    1405     if (s->pDrvMedia->pfnIsNonRotational(s->pDrvMedia))
     1486    if (pDevR3->pDrvMedia->pfnIsNonRotational(pDevR3->pDrvMedia))
    14061487        p[217] = RT_H2LE_U16(1); /* Non-rotational medium */
    14071488    uint32_t uCsum = ataR3Checksum(p, 510);
    14081489    p[255] = RT_H2LE_U16(0xa5 | (uCsum << 8)); /* Integrity word */
    14091490    s->iSourceSink = ATAFN_SS_NULL;
    1410     ataR3CmdOK(s, ATA_STAT_SEEK);
     1491    ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
    14111492    return false;
    14121493}
    14131494
    14141495
    1415 static bool ataR3FlushSS(ATADevState *s)
    1416 {
    1417     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
     1496/**
     1497 * Sink/Source: FLUSH
     1498 */
     1499static bool ataR3FlushSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
     1500{
    14181501    int rc;
    14191502
     
    14211504    Assert(!s->cbElementaryTransfer);
    14221505
    1423     ataR3LockLeave(pCtl);
     1506    ataR3LockLeave(pDevIns, pCtl);
    14241507
    14251508    STAM_PROFILE_START(&s->StatFlushes, f);
    1426     rc = s->pDrvMedia->pfnFlush(s->pDrvMedia);
     1509    rc = pDevR3->pDrvMedia->pfnFlush(pDevR3->pDrvMedia);
    14271510    AssertRC(rc);
    14281511    STAM_PROFILE_STOP(&s->StatFlushes, f);
    14291512
    1430     ataR3LockEnter(pCtl);
    1431     ataR3CmdOK(s, 0);
     1513    ataR3LockEnter(pDevIns, pCtl);
     1514    ataR3CmdOK(pCtl, s, 0);
    14321515    return false;
    14331516}
    14341517
    1435 static bool atapiR3IdentifySS(ATADevState *s)
     1518/**
     1519 * Sink/Source: ATAPI IDENTIFY
     1520 */
     1521static bool atapiR3IdentifySS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    14361522{
    14371523    uint16_t *p;
     1524    RT_NOREF(pDevIns, pDevR3);
    14381525
    14391526    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    14901577
    14911578    s->iSourceSink = ATAFN_SS_NULL;
    1492     ataR3CmdOK(s, ATA_STAT_SEEK);
     1579    ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
    14931580    return false;
    14941581}
     
    15231610        {
    15241611            /* LBA48 */
    1525             iLBA = ((uint64_t)s->uATARegHCylHOB << 40) |
    1526                 ((uint64_t)s->uATARegLCylHOB << 32) |
    1527                 ((uint64_t)s->uATARegSectorHOB << 24) |
    1528                 ((uint64_t)s->uATARegHCyl << 16) |
    1529                 ((uint64_t)s->uATARegLCyl << 8) |
    1530                 s->uATARegSector;
     1612            iLBA = ((uint64_t)s->uATARegHCylHOB << 40)
     1613                 | ((uint64_t)s->uATARegLCylHOB << 32)
     1614                 | ((uint64_t)s->uATARegSectorHOB << 24)
     1615                 | ((uint64_t)s->uATARegHCyl << 16)
     1616                 | ((uint64_t)s->uATARegLCyl << 8)
     1617                 | s->uATARegSector;
    15311618        }
    15321619        else
    15331620        {
    15341621            /* LBA */
    1535             iLBA = ((s->uATARegSelect & 0x0f) << 24) | (s->uATARegHCyl << 16) |
    1536                 (s->uATARegLCyl << 8) | s->uATARegSector;
     1622            iLBA = ((uint32_t)(s->uATARegSelect & 0x0f) << 24)
     1623                 | ((uint32_t)s->uATARegHCyl << 16)
     1624                 | ((uint32_t)s->uATARegLCyl << 8)
     1625                 | s->uATARegSector;
    15371626        }
    15381627    }
     
    15401629    {
    15411630        /* CHS */
    1542         iLBA = ((s->uATARegHCyl << 8) | s->uATARegLCyl) * s->PCHSGeometry.cHeads * s->PCHSGeometry.cSectors +
    1543             (s->uATARegSelect & 0x0f) * s->PCHSGeometry.cSectors +
    1544             (s->uATARegSector - 1);
    1545         LogFlowFunc(("CHS %u/%u/%u -> LBA %llu\n", (s->uATARegHCyl << 8) | s->uATARegLCyl, s->uATARegSelect & 0x0f, s->uATARegSector, iLBA));
     1631        iLBA = (((uint32_t)s->uATARegHCyl << 8) | s->uATARegLCyl) * s->PCHSGeometry.cHeads * s->PCHSGeometry.cSectors
     1632             + (s->uATARegSelect & 0x0f) * s->PCHSGeometry.cSectors
     1633             + (s->uATARegSector - 1);
     1634        LogFlowFunc(("CHS %u/%u/%u -> LBA %llu\n", ((uint32_t)s->uATARegHCyl << 8) | s->uATARegLCyl, s->uATARegSelect & 0x0f, s->uATARegSector, iLBA));
    15461635    }
    15471636    return iLBA;
     
    16141703}
    16151704
    1616 static bool ataR3IsRedoSetWarning(ATADevState *s, int rc)
    1617 {
    1618     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    1619     Assert(!PDMDevHlpCritSectIsOwner(pCtl->CTX_SUFF(pDevIns), &pCtl->lock));
     1705static bool ataR3IsRedoSetWarning(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, int rc)
     1706{
     1707    Assert(!PDMDevHlpCritSectIsOwner(pDevIns, &pCtl->lock));
    16201708    if (rc == VERR_DISK_FULL)
    16211709    {
    16221710        pCtl->fRedoIdle = true;
    1623         ataR3WarningDiskFull(ATADEVSTATE_2_DEVINS(s));
     1711        ataR3WarningDiskFull(pDevIns);
    16241712        return true;
    16251713    }
     
    16271715    {
    16281716        pCtl->fRedoIdle = true;
    1629         ataR3WarningFileTooBig(ATADEVSTATE_2_DEVINS(s));
     1717        ataR3WarningFileTooBig(pDevIns);
    16301718        return true;
    16311719    }
     
    16351723        /* iSCSI connection abort (first error) or failure to reestablish
    16361724         * connection (second error). Pause VM. On resume we'll retry. */
    1637         ataR3WarningISCSI(ATADEVSTATE_2_DEVINS(s));
     1725        ataR3WarningISCSI(pDevIns);
    16381726        return true;
    16391727    }
     
    16491737
    16501738
    1651 static int ataR3ReadSectors(ATADevState *s, uint64_t u64Sector, void *pvBuf,
    1652                             uint32_t cSectors, bool *pfRedo)
    1653 {
    1654     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
     1739static int ataR3ReadSectors(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s, PATADEVSTATER3 pDevR3,
     1740                            uint64_t u64Sector, void *pvBuf, uint32_t cSectors, bool *pfRedo)
     1741{
    16551742    int rc;
    16561743    uint32_t const cbSector = s->cbSector;
     
    16591746    AssertReturnStmt(cbToRead <= sizeof(s->abIOBuffer), *pfRedo = false, VERR_BUFFER_OVERFLOW);
    16601747
    1661     ataR3LockLeave(pCtl);
     1748    ataR3LockLeave(pDevIns, pCtl);
    16621749
    16631750    STAM_PROFILE_ADV_START(&s->StatReads, r);
    16641751    s->Led.Asserted.s.fReading = s->Led.Actual.s.fReading = 1;
    1665     rc = s->pDrvMedia->pfnRead(s->pDrvMedia, u64Sector * cbSector, pvBuf, cbToRead);
     1752    rc = pDevR3->pDrvMedia->pfnRead(pDevR3->pDrvMedia, u64Sector * cbSector, pvBuf, cbToRead);
    16661753    s->Led.Actual.s.fReading = 0;
    16671754    STAM_PROFILE_ADV_STOP(&s->StatReads, r);
     
    16741761        *pfRedo = false;
    16751762    else
    1676         *pfRedo = ataR3IsRedoSetWarning(s, rc);
    1677 
    1678     ataR3LockEnter(pCtl);
     1763        *pfRedo = ataR3IsRedoSetWarning(pDevIns, pCtl, rc);
     1764
     1765    ataR3LockEnter(pDevIns, pCtl);
    16791766    return rc;
    16801767}
    16811768
    16821769
    1683 static int ataR3WriteSectors(ATADevState *s, uint64_t u64Sector,
    1684                              const void *pvBuf, uint32_t cSectors, bool *pfRedo)
    1685 {
    1686     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
     1770static int ataR3WriteSectors(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s, PATADEVSTATER3 pDevR3,
     1771                             uint64_t u64Sector, const void *pvBuf, uint32_t cSectors, bool *pfRedo)
     1772{
    16871773    int rc;
    16881774    uint32_t const cbSector = s->cbSector;
     
    16911777    AssertReturnStmt(cbToWrite <= sizeof(s->abIOBuffer), *pfRedo = false, VERR_BUFFER_OVERFLOW);
    16921778
    1693     ataR3LockLeave(pCtl);
     1779    ataR3LockLeave(pDevIns, pCtl);
    16941780
    16951781    STAM_PROFILE_ADV_START(&s->StatWrites, w);
     
    16991785        STAM_PROFILE_ADV_START(&s->StatInstrVDWrites, vw);
    17001786# endif
    1701     rc = s->pDrvMedia->pfnWrite(s->pDrvMedia, u64Sector * cbSector, pvBuf, cbToWrite);
     1787    rc = pDevR3->pDrvMedia->pfnWrite(pDevR3->pDrvMedia, u64Sector * cbSector, pvBuf, cbToWrite);
    17021788# ifdef VBOX_INSTRUMENT_DMA_WRITES
    17031789    if (s->fDMA)
     
    17141800        *pfRedo = false;
    17151801    else
    1716         *pfRedo = ataR3IsRedoSetWarning(s, rc);
    1717 
    1718     ataR3LockEnter(pCtl);
     1802        *pfRedo = ataR3IsRedoSetWarning(pDevIns, pCtl, rc);
     1803
     1804    ataR3LockEnter(pDevIns, pCtl);
    17191805    return rc;
    17201806}
    17211807
    17221808
    1723 static void ataR3ReadWriteSectorsBT(ATADevState *s)
     1809/**
     1810 * Begin Transfer: READ/WRITE SECTORS
     1811 */
     1812static void ataR3ReadWriteSectorsBT(PATACONTROLLER pCtl, ATADevState *s)
    17241813{
    17251814    uint32_t const cbSector = RT_MAX(s->cbSector, 1);
     
    17321821        s->cbElementaryTransfer = cSectors * cbSector;
    17331822    if (s->uTxDir == PDMMEDIATXDIR_TO_DEVICE)
    1734         ataR3CmdOK(s, 0);
    1735 }
    1736 
    1737 
    1738 static bool ataR3ReadSectorsSS(ATADevState *s)
     1823        ataR3CmdOK(pCtl, s, 0);
     1824}
     1825
     1826
     1827/**
     1828 * Sink/Source: READ SECTORS
     1829 */
     1830static bool ataR3ReadSectorsSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    17391831{
    17401832    uint32_t const cbSector = RT_MAX(s->cbSector, 1);
     
    17481840    iLBA = ataR3GetSector(s);
    17491841    Log(("%s: %d sectors at LBA %d\n", __FUNCTION__, cSectors, iLBA));
    1750     rc = ataR3ReadSectors(s, iLBA, s->abIOBuffer, cSectors, &fRedo);
     1842    rc = ataR3ReadSectors(pDevIns, pCtl, s, pDevR3, iLBA, s->abIOBuffer, cSectors, &fRedo);
    17511843    if (RT_SUCCESS(rc))
    17521844    {
     
    17541846        if (s->cbElementaryTransfer == s->cbTotalTransfer)
    17551847            s->iSourceSink = ATAFN_SS_NULL;
    1756         ataR3CmdOK(s, ATA_STAT_SEEK);
     1848        ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
    17571849    }
    17581850    else
     
    17691861         */
    17701862        if (rc != VERR_INTERRUPTED)
    1771             ataR3CmdError(s, ID_ERR);
     1863            ataR3CmdError(pCtl, s, ID_ERR);
    17721864    }
    17731865    return false;
     
    17751867
    17761868
    1777 static bool ataR3WriteSectorsSS(ATADevState *s)
     1869/**
     1870 * Sink/Source: WRITE SECTOR
     1871 */
     1872static bool ataR3WriteSectorsSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    17781873{
    17791874    uint32_t const cbSector = RT_MAX(s->cbSector, 1);
     
    17871882    iLBA = ataR3GetSector(s);
    17881883    Log(("%s: %d sectors at LBA %d\n", __FUNCTION__, cSectors, iLBA));
    1789     rc = ataR3WriteSectors(s, iLBA, s->abIOBuffer, cSectors, &fRedo);
     1884    rc = ataR3WriteSectors(pDevIns, pCtl, s, pDevR3, iLBA, s->abIOBuffer, cSectors, &fRedo);
    17901885    if (RT_SUCCESS(rc))
    17911886    {
     
    17931888        if (!s->cbTotalTransfer)
    17941889            s->iSourceSink = ATAFN_SS_NULL;
    1795         ataR3CmdOK(s, ATA_STAT_SEEK);
     1890        ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
    17961891    }
    17971892    else
     
    18081903         */
    18091904        if (rc != VERR_INTERRUPTED)
    1810             ataR3CmdError(s, ID_ERR);
     1905            ataR3CmdError(pCtl, s, ID_ERR);
    18111906    }
    18121907    return false;
     
    18141909
    18151910
    1816 static void atapiR3CmdOK(ATADevState *s)
     1911static void atapiR3CmdOK(PATACONTROLLER pCtl, ATADevState *s)
    18171912{
    18181913    s->uATARegError = 0;
    1819     ataSetStatusValue(s, ATA_STAT_READY);
     1914    ataSetStatusValue(pCtl, s, ATA_STAT_READY);
    18201915    s->uATARegNSector = (s->uATARegNSector & ~7)
    18211916        | ((s->uTxDir != PDMMEDIATXDIR_TO_DEVICE) ? ATAPI_INT_REASON_IO : 0)
     
    18291924
    18301925
    1831 static void atapiR3CmdError(ATADevState *s, const uint8_t *pabATAPISense, size_t cbATAPISense)
     1926static void atapiR3CmdError(PATACONTROLLER pCtl, ATADevState *s, const uint8_t *pabATAPISense, size_t cbATAPISense)
    18321927{
    18331928    Log(("%s: sense=%#x (%s) asc=%#x ascq=%#x (%s)\n", __FUNCTION__, pabATAPISense[2] & 0x0f, SCSISenseText(pabATAPISense[2] & 0x0f),
    1834              pabATAPISense[12], pabATAPISense[13], SCSISenseExtText(pabATAPISense[12], pabATAPISense[13])));
     1929         pabATAPISense[12], pabATAPISense[13], SCSISenseExtText(pabATAPISense[12], pabATAPISense[13])));
    18351930    s->uATARegError = pabATAPISense[2] << 4;
    1836     ataSetStatusValue(s, ATA_STAT_READY | ATA_STAT_ERR);
     1931    ataSetStatusValue(pCtl, s, ATA_STAT_READY | ATA_STAT_ERR);
    18371932    s->uATARegNSector = (s->uATARegNSector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
    18381933    Log2(("%s: interrupt reason %#04x\n", __FUNCTION__, s->uATARegNSector));
     
    18521947/** @todo deprecated function - doesn't provide enough info. Replace by direct
    18531948 * calls to atapiR3CmdError()  with full data. */
    1854 static void atapiR3CmdErrorSimple(ATADevState *s, uint8_t uATAPISenseKey, uint8_t uATAPIASC)
     1949static void atapiR3CmdErrorSimple(PATACONTROLLER pCtl, ATADevState *s, uint8_t uATAPISenseKey, uint8_t uATAPIASC)
    18551950{
    18561951    uint8_t abATAPISense[ATAPI_SENSE_SIZE];
     
    18601955    abATAPISense[7] = 10;
    18611956    abATAPISense[12] = uATAPIASC;
    1862     atapiR3CmdError(s, abATAPISense, sizeof(abATAPISense));
    1863 }
    1864 
    1865 
    1866 static void atapiR3CmdBT(ATADevState *s)
     1957    atapiR3CmdError(pCtl, s, abATAPISense, sizeof(abATAPISense));
     1958}
     1959
     1960
     1961/**
     1962 * Begin Transfer: ATAPI command
     1963 */
     1964static void atapiR3CmdBT(PATACONTROLLER pCtl, ATADevState *s)
    18671965{
    18681966    s->fATAPITransfer = true;
     
    18711969    s->cbPIOTransferLimit = s->uATARegLCyl | (s->uATARegHCyl << 8);
    18721970    if (s->uTxDir == PDMMEDIATXDIR_TO_DEVICE)
    1873         atapiR3CmdOK(s);
    1874 }
    1875 
    1876 
    1877 static void atapiR3PassthroughCmdBT(ATADevState *s)
    1878 {
    1879     atapiR3CmdBT(s);
    1880 }
    1881 
    1882 static bool atapiR3ReadSS(ATADevState *s)
    1883 {
    1884     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
     1971        atapiR3CmdOK(pCtl, s);
     1972}
     1973
     1974
     1975/**
     1976 * Begin Transfer: ATAPI Passthrough command
     1977 */
     1978static void atapiR3PassthroughCmdBT(PATACONTROLLER pCtl, ATADevState *s)
     1979{
     1980    atapiR3CmdBT(pCtl, s);
     1981}
     1982
     1983
     1984/**
     1985 * Sink/Source: READ
     1986 */
     1987static bool atapiR3ReadSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
     1988{
    18851989    int rc;
    18861990    uint64_t cbBlockRegion = 0;
     
    18951999    AssertLogRelReturn(cSectors * cbATAPISector <= sizeof(s->abIOBuffer), false);
    18962000
    1897     ataR3LockLeave(pCtl);
    1898 
    1899     rc = s->pDrvMedia->pfnQueryRegionPropertiesForLba(s->pDrvMedia, iATAPILBA, NULL, NULL,
     2001    ataR3LockLeave(pDevIns, pCtl);
     2002
     2003    rc = pDevR3->pDrvMedia->pfnQueryRegionPropertiesForLba(pDevR3->pDrvMedia, iATAPILBA, NULL, NULL,
    19002004                                                      &cbBlockRegion, NULL);
    19012005    if (RT_SUCCESS(rc))
     
    19062010        /* If the region block size and requested sector matches we can just pass the request through. */
    19072011        if (cbBlockRegion == cbATAPISector)
    1908             rc = s->pDrvMedia->pfnRead(s->pDrvMedia, (uint64_t)iATAPILBA * cbATAPISector,
     2012            rc = pDevR3->pDrvMedia->pfnRead(pDevR3->pDrvMedia, (uint64_t)iATAPILBA * cbATAPISector,
    19092013                                       s->abIOBuffer, cbATAPISector * cSectors);
    19102014        else
     
    19292033                    *pbBuf++ = 0x01; /* mode 1 data */
    19302034                    /* data */
    1931                     rc = s->pDrvMedia->pfnRead(s->pDrvMedia, (uint64_t)i * 2048, pbBuf, 2048);
     2035                    rc = pDevR3->pDrvMedia->pfnRead(pDevR3->pDrvMedia, (uint64_t)i * 2048, pbBuf, 2048);
    19322036                    if (RT_FAILURE(rc))
    19332037                        break;
     
    19512055                {
    19522056                    uint8_t abTmp[2352];
    1953                     rc = s->pDrvMedia->pfnRead(s->pDrvMedia, (uint64_t)i * 2352, &abTmp[0], 2352);
     2057                    rc = pDevR3->pDrvMedia->pfnRead(pDevR3->pDrvMedia, (uint64_t)i * 2352, &abTmp[0], 2352);
    19542058                    if (RT_FAILURE(rc))
    19552059                        break;
     
    19662070    }
    19672071
    1968     ataR3LockEnter(pCtl);
     2072    ataR3LockEnter(pDevIns, pCtl);
    19692073
    19702074    if (RT_SUCCESS(rc))
     
    19782082        if (cbTransfer >= s->cbTotalTransfer)
    19792083            s->iSourceSink = ATAFN_SS_NULL;
    1980         atapiR3CmdOK(s);
     2084        atapiR3CmdOK(pCtl, s);
    19812085        s->iATAPILBA = iATAPILBA + cSectors;
    19822086    }
     
    19912095         */
    19922096        if (rc != VERR_INTERRUPTED)
    1993             atapiR3CmdErrorSimple(s, SCSI_SENSE_MEDIUM_ERROR, SCSI_ASC_READ_ERROR);
     2097            atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_MEDIUM_ERROR, SCSI_ASC_READ_ERROR);
    19942098    }
    19952099    return false;
     
    20042108}
    20052109
    2006 static bool atapiR3PassthroughSS(ATADevState *s)
    2007 {
    2008     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
     2110
     2111/**
     2112 * Sink/Source: Passthrough
     2113 */
     2114static bool atapiR3PassthroughSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
     2115{
    20092116    int rc = VINF_SUCCESS;
    20102117    uint8_t abATAPISense[ATAPI_SENSE_SIZE];
     
    20332140    }
    20342141
    2035     ataR3LockLeave(pCtl);
     2142    ataR3LockLeave(pDevIns, pCtl);
    20362143
    20372144# if defined(LOG_ENABLED)
     
    21092216                if (s->cErrors++ < MAX_LOG_REL_ERRORS)
    21102217                    LogRel(("PIIX3 ATA: LUN#%d: CD-ROM passthrough split error\n", s->iLUN));
    2111                 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);
    2112                 ataR3LockEnter(pCtl);
     2218                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);
     2219                ataR3LockEnter(pDevIns, pCtl);
    21132220                return false;
    21142221        }
     
    21462253            }
    21472254            AssertLogRelReturn((uintptr_t)(pbBuf - &s->abIOBuffer[0]) + cbCurrTX <= sizeof(s->abIOBuffer), false);
    2148             rc = s->pDrvMedia->pfnSendCmd(s->pDrvMedia, abATAPICmd, ATAPI_PACKET_SIZE, (PDMMEDIATXDIR)s->uTxDir,
     2255            rc = pDevR3->pDrvMedia->pfnSendCmd(pDevR3->pDrvMedia, abATAPICmd, ATAPI_PACKET_SIZE, (PDMMEDIATXDIR)s->uTxDir,
    21492256                                          pbBuf, &cbCurrTX, abATAPISense, sizeof(abATAPISense), 30000 /**< @todo timeout */);
    21502257            if (rc != VINF_SUCCESS)
     
    21822289                    if (s->cErrors++ < MAX_LOG_REL_ERRORS)
    21832290                        LogRel(("PIIX3 ATA: LUN#%d: CD-ROM passthrough split error\n", s->iLUN));
    2184                     atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);
     2291                    atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);
    21852292                    return false;
    21862293            }
     
    21902297    {
    21912298        AssertLogRelReturn(cbTransfer <= sizeof(s->abIOBuffer), false);
    2192         rc = s->pDrvMedia->pfnSendCmd(s->pDrvMedia, s->abATAPICmd, ATAPI_PACKET_SIZE, (PDMMEDIATXDIR)s->uTxDir,
     2299        rc = pDevR3->pDrvMedia->pfnSendCmd(pDevR3->pDrvMedia, s->abATAPICmd, ATAPI_PACKET_SIZE, (PDMMEDIATXDIR)s->uTxDir,
    21932300                                      s->abIOBuffer, &cbTransfer, abATAPISense, sizeof(abATAPISense), 30000 /**< @todo timeout */);
    21942301    }
    21952302    if (pProf) { STAM_PROFILE_ADV_STOP(pProf, b); }
    21962303
    2197     ataR3LockEnter(pCtl);
     2304    ataR3LockEnter(pDevIns, pCtl);
    21982305
    21992306    /* Update the LEDs and the read/write statistics. */
     
    22202327            case SCSI_READ_TOC_PMA_ATIP:
    22212328            {
    2222                 if (!s->pTrackList)
    2223                     rc = ATAPIPassthroughTrackListCreateEmpty(&s->pTrackList);
     2329                if (!pDevR3->pTrackList)
     2330                    rc = ATAPIPassthroughTrackListCreateEmpty(&pDevR3->pTrackList);
    22242331
    22252332                if (RT_SUCCESS(rc))
    2226                     rc = ATAPIPassthroughTrackListUpdate(s->pTrackList, s->abATAPICmd, s->abIOBuffer, sizeof(s->abIOBuffer));
     2333                    rc = ATAPIPassthroughTrackListUpdate(pDevR3->pTrackList, s->abATAPICmd, s->abIOBuffer, sizeof(s->abIOBuffer));
    22272334
    22282335                if (   RT_FAILURE(rc)
     
    22342341            case SCSI_SYNCHRONIZE_CACHE:
    22352342            {
    2236                 if (s->pTrackList)
    2237                     ATAPIPassthroughTrackListClear(s->pTrackList);
     2343                if (pDevR3->pTrackList)
     2344                    ATAPIPassthroughTrackListClear(pDevR3->pTrackList);
    22382345                break;
    22392346            }
     
    22742381        {
    22752382            s->iSourceSink = ATAFN_SS_NULL;
    2276             atapiR3CmdOK(s);
     2383            atapiR3CmdOK(pCtl, s);
    22772384        }
    22782385    }
     
    22962403            } while (0);
    22972404        }
    2298         atapiR3CmdError(s, abATAPISense, sizeof(abATAPISense));
     2405        atapiR3CmdError(pCtl, s, abATAPISense, sizeof(abATAPISense));
    22992406    }
    23002407    return false;
    23012408}
    23022409
    2303 static bool atapiR3ReadDVDStructureSS(ATADevState *s)
     2410
     2411/**
     2412 * Begin Transfer: Read DVD structures
     2413 */
     2414static bool atapiR3ReadDVDStructureSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    23042415{
    23052416    uint8_t *buf = s->abIOBuffer;
    23062417    int media = s->abATAPICmd[1];
    23072418    int format = s->abATAPICmd[7];
     2419    RT_NOREF(pDevIns, pDevR3);
    23082420
    23092421    AssertCompile(sizeof(s->abIOBuffer) > UINT16_MAX /* want a RT_MIN() below, but clang takes offence at always false stuff */);
     
    24322544                {
    24332545                    s->iSourceSink = ATAFN_SS_NULL;
    2434                     atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, -uASC);
     2546                    atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, -uASC);
    24352547                    return false;
    24362548                }
     
    24492561        default:
    24502562            s->iSourceSink = ATAFN_SS_NULL;
    2451             atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
     2563            atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
    24522564            return false;
    24532565    }
    24542566
    24552567    s->iSourceSink = ATAFN_SS_NULL;
    2456     atapiR3CmdOK(s);
     2568    atapiR3CmdOK(pCtl, s);
    24572569    return false;
    24582570}
    24592571
    2460 static bool atapiR3ReadSectors(ATADevState *s, uint32_t iATAPILBA, uint32_t cSectors, uint32_t cbSector)
     2572
     2573static bool atapiR3ReadSectors(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s,
     2574                               uint32_t iATAPILBA, uint32_t cSectors, uint32_t cbSector)
    24612575{
    24622576    Assert(cSectors > 0);
    24632577    s->iATAPILBA = iATAPILBA;
    24642578    s->cbATAPISector = cbSector;
    2465     ataR3StartTransfer(s, cSectors * cbSector, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ, true);
     2579    ataR3StartTransfer(pDevIns, pCtl, s, cSectors * cbSector,
     2580                       PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ, true);
    24662581    return false;
    24672582}
    24682583
    24692584
    2470 static bool atapiR3ReadCapacitySS(ATADevState *s)
     2585/**
     2586 * Sink/Source: ATAPI READ CAPACITY
     2587 */
     2588static bool atapiR3ReadCapacitySS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    24712589{
    24722590    uint8_t *pbBuf = s->abIOBuffer;
     2591    RT_NOREF(pDevIns, pDevR3);
    24732592
    24742593    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    24772596    scsiH2BE_U32(pbBuf + 4, 2048);
    24782597    s->iSourceSink = ATAFN_SS_NULL;
    2479     atapiR3CmdOK(s);
     2598    atapiR3CmdOK(pCtl, s);
    24802599    return false;
    24812600}
    24822601
    24832602
    2484 static bool atapiR3ReadDiscInformationSS(ATADevState *s)
     2603/**
     2604 * Sink/Source: ATAPI READ DISCK INFORMATION
     2605 */
     2606static bool atapiR3ReadDiscInformationSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    24852607{
    24862608    uint8_t *pbBuf = s->abIOBuffer;
     2609    RT_NOREF(pDevIns, pDevR3);
    24872610
    24882611    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    24942617    pbBuf[4] = 1; /* number of sessions (LSB) */
    24952618    pbBuf[5] = 1; /* first track number in last session (LSB) */
    2496     pbBuf[6] = (uint8_t)s->pDrvMedia->pfnGetRegionCount(s->pDrvMedia); /* last track number in last session (LSB) */
     2619    pbBuf[6] = (uint8_t)pDevR3->pDrvMedia->pfnGetRegionCount(pDevR3->pDrvMedia); /* last track number in last session (LSB) */
    24972620    pbBuf[7] = (0 << 7) | (0 << 6) | (1 << 5) | (0 << 2) | (0 << 0); /* disc id not valid, disc bar code not valid, unrestricted use, not dirty, not RW medium */
    24982621    pbBuf[8] = 0; /* disc type = CD-ROM */
     
    25032626    scsiH2BE_U32(pbBuf + 20, 0xffffffff); /* last possible start time for lead-out is not available */
    25042627    s->iSourceSink = ATAFN_SS_NULL;
    2505     atapiR3CmdOK(s);
     2628    atapiR3CmdOK(pCtl, s);
    25062629    return false;
    25072630}
    25082631
    25092632
    2510 static bool atapiR3ReadTrackInformationSS(ATADevState *s)
     2633/**
     2634 * Sink/Source: ATAPI READ TRACK INFORMATION
     2635 */
     2636static bool atapiR3ReadTrackInformationSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    25112637{
    25122638    uint8_t *pbBuf = s->abIOBuffer;
    25132639    uint32_t u32LogAddr = scsiBE2H_U32(&s->abATAPICmd[2]);
    25142640    uint8_t u8LogAddrType = s->abATAPICmd[1] & 0x03;
     2641    RT_NOREF(pDevIns);
    25152642
    25162643    int rc;
     
    25292656    {
    25302657        case 0x00:
    2531             rc = s->pDrvMedia->pfnQueryRegionPropertiesForLba(s->pDrvMedia, u32LogAddr, &uRegion,
    2532                                                               NULL, NULL, NULL);
     2658            rc = pDevR3->pDrvMedia->pfnQueryRegionPropertiesForLba(pDevR3->pDrvMedia, u32LogAddr, &uRegion,
     2659                                                                   NULL, NULL, NULL);
    25332660            if (RT_SUCCESS(rc))
    2534                 rc = s->pDrvMedia->pfnQueryRegionProperties(s->pDrvMedia, uRegion, &u64LbaStart,
    2535                                                             &cBlocks, &cbBlock, &enmDataForm);
     2661                rc = pDevR3->pDrvMedia->pfnQueryRegionProperties(pDevR3->pDrvMedia, uRegion, &u64LbaStart,
     2662                                                                 &cBlocks, &cbBlock, &enmDataForm);
    25362663            break;
    25372664        case 0x01:
     
    25402667            {
    25412668                uRegion = u32LogAddr - 1;
    2542                 rc = s->pDrvMedia->pfnQueryRegionProperties(s->pDrvMedia, uRegion, &u64LbaStart,
    2543                                                             &cBlocks, &cbBlock, &enmDataForm);
     2669                rc = pDevR3->pDrvMedia->pfnQueryRegionProperties(pDevR3->pDrvMedia, uRegion, &u64LbaStart,
     2670                                                                 &cBlocks, &cbBlock, &enmDataForm);
    25442671            }
    25452672            else
     
    25492676        case 0x02:
    25502677        default:
    2551             atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
     2678            atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
    25522679            return false;
    25532680    }
     
    25552682    if (RT_FAILURE(rc))
    25562683    {
    2557         atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
     2684        atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
    25582685        return false;
    25592686    }
     
    25952722    pbBuf[33] = 0;                                                     /* session number (MSB) */
    25962723    s->iSourceSink = ATAFN_SS_NULL;
    2597     atapiR3CmdOK(s);
     2724    atapiR3CmdOK(pCtl, s);
    25982725    return false;
    25992726}
     
    26012728static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureListProfiles(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
    26022729{
    2603     RT_NOREF1(s);
     2730    RT_NOREF(s);
    26042731    if (cbBuf < 3*4)
    26052732        return 0;
     
    26202747static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureCore(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
    26212748{
    2622     RT_NOREF1(s);
     2749    RT_NOREF(s);
    26232750    if (cbBuf < 12)
    26242751        return 0;
     
    26362763static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureMorphing(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
    26372764{
    2638     RT_NOREF1(s);
     2765    RT_NOREF(s);
    26392766    if (cbBuf < 8)
    26402767        return 0;
     
    26512778static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureRemovableMedium(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
    26522779{
    2653     RT_NOREF1(s);
     2780    RT_NOREF(s);
    26542781    if (cbBuf < 8)
    26552782        return 0;
     
    26672794static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureRandomReadable (ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
    26682795{
    2669     RT_NOREF1(s);
     2796    RT_NOREF(s);
    26702797    if (cbBuf < 12)
    26712798        return 0;
     
    26842811static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureCDRead(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
    26852812{
    2686     RT_NOREF1(s);
     2813    RT_NOREF(s);
    26872814    if (cbBuf < 8)
    26882815        return 0;
     
    26992826static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeaturePowerManagement(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
    27002827{
    2701     RT_NOREF1(s);
     2828    RT_NOREF(s);
    27022829    if (cbBuf < 4)
    27032830        return 0;
     
    27122839static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureTimeout(ATADevState *s, uint8_t *pbBuf, size_t cbBuf)
    27132840{
    2714     RT_NOREF1(s);
     2841    RT_NOREF(s);
    27152842    if (cbBuf < 8)
    27162843        return 0;
     
    27622889};
    27632890
    2764 static bool atapiR3GetConfigurationSS(ATADevState *s)
     2891/**
     2892 * Sink/Source: ATAPI GET CONFIGURATION
     2893 */
     2894static bool atapiR3GetConfigurationSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    27652895{
    27662896    uint32_t const cbIOBuffer = RT_MIN(s->cbIOBuffer, ATA_MAX_IO_BUFFER_SIZE);
     
    27702900    uint16_t u16Sfn = scsiBE2H_U16(&s->abATAPICmd[2]);
    27712901    uint8_t u8Rt = s->abATAPICmd[1] & 0x03;
     2902    RT_NOREF(pDevIns, pDevR3);
    27722903
    27732904    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    27762907    if (u8Rt == 3)
    27772908    {
    2778         atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
     2909        atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
    27792910        return false;
    27802911    }
     
    28202951    /* Other profiles we might want to add in the future: 0x40 (BD-ROM) and 0x50 (HDDVD-ROM) */
    28212952    s->iSourceSink = ATAFN_SS_NULL;
    2822     atapiR3CmdOK(s);
     2953    atapiR3CmdOK(pCtl, s);
    28232954    return false;
    28242955}
    28252956
    28262957
    2827 static bool atapiR3GetEventStatusNotificationSS(ATADevState *s)
     2958/**
     2959 * Sink/Source: ATAPI GET EVENT STATUS NOTIFICATION
     2960 */
     2961static bool atapiR3GetEventStatusNotificationSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    28282962{
    28292963    uint8_t *pbBuf = s->abIOBuffer;
     2964    RT_NOREF(pDevIns, pDevR3);
    28302965
    28312966    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    28352970    {
    28362971        /* no asynchronous operation supported */
    2837         atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
     2972        atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
    28382973        return false;
    28392974    }
     
    28953030
    28963031    s->iSourceSink = ATAFN_SS_NULL;
    2897     atapiR3CmdOK(s);
     3032    atapiR3CmdOK(pCtl, s);
    28983033    return false;
    28993034}
    29003035
    29013036
    2902 static bool atapiR3InquirySS(ATADevState *s)
     3037/**
     3038 * Sink/Source: ATAPI INQUIRY
     3039 */
     3040static bool atapiR3InquirySS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    29033041{
    29043042    uint8_t *pbBuf = s->abIOBuffer;
     3043    RT_NOREF(pDevIns, pDevR3);
    29053044
    29063045    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    29233062    scsiPadStr(pbBuf + 32, s->szInquiryRevision, 4);
    29243063    s->iSourceSink = ATAFN_SS_NULL;
    2925     atapiR3CmdOK(s);
     3064    atapiR3CmdOK(pCtl, s);
    29263065    return false;
    29273066}
    29283067
    29293068
    2930 static bool atapiR3ModeSenseErrorRecoverySS(ATADevState *s)
     3069/**
     3070 * Sink/Source: ATAPI MODE SENSE ERROR RECOVERY
     3071 */
     3072static bool atapiR3ModeSenseErrorRecoverySS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    29313073{
    29323074    uint8_t *pbBuf = s->abIOBuffer;
     3075    RT_NOREF(pDevIns, pDevR3);
    29333076
    29343077    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    29513094    pbBuf[15] = 0x00;
    29523095    s->iSourceSink = ATAFN_SS_NULL;
    2953     atapiR3CmdOK(s);
     3096    atapiR3CmdOK(pCtl, s);
    29543097    return false;
    29553098}
    29563099
    29573100
    2958 static bool atapiR3ModeSenseCDStatusSS(ATADevState *s)
     3101/**
     3102 * Sink/Source: ATAPI MODE SENSE CD STATUS
     3103 */
     3104static bool atapiR3ModeSenseCDStatusSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    29593105{
    29603106    uint8_t *pbBuf = s->abIOBuffer;
     3107    RT_NOREF(pDevIns);
    29613108
    29623109    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    29803127    pbBuf[13] = 0x00; /* no subchannel reads supported */
    29813128    pbBuf[14] = (1 << 0) | (1 << 3) | (1 << 5); /* lock supported, eject supported, tray type loading mechanism */
    2982     if (s->pDrvMount->pfnIsLocked(s->pDrvMount))
     3129    if (pDevR3->pDrvMount->pfnIsLocked(pDevR3->pDrvMount))
    29833130        pbBuf[14] |= 1 << 1; /* report lock state */
    29843131    pbBuf[15] = 0; /* no subchannel reads supported, no separate audio volume control, no changer etc. */
     
    29993146    scsiH2BE_U16(&pbBuf[38], 0); /* number of write speed performance descriptors */
    30003147    s->iSourceSink = ATAFN_SS_NULL;
    3001     atapiR3CmdOK(s);
     3148    atapiR3CmdOK(pCtl, s);
    30023149    return false;
    30033150}
    30043151
    30053152
    3006 static bool atapiR3RequestSenseSS(ATADevState *s)
     3153/**
     3154 * Sink/Source: ATAPI REQUEST SENSE
     3155 */
     3156static bool atapiR3RequestSenseSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    30073157{
    30083158    uint8_t *pbBuf = s->abIOBuffer;
     3159    RT_NOREF(pDevIns, pDevR3);
    30093160
    30103161    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    30133164    memcpy(pbBuf, s->abATAPISense, RT_MIN(s->cbElementaryTransfer, sizeof(s->abATAPISense)));
    30143165    s->iSourceSink = ATAFN_SS_NULL;
    3015     atapiR3CmdOK(s);
     3166    atapiR3CmdOK(pCtl, s);
    30163167    return false;
    30173168}
    30183169
    30193170
    3020 static bool atapiR3MechanismStatusSS(ATADevState *s)
     3171/**
     3172 * Sink/Source: ATAPI MECHANISM STATUS
     3173 */
     3174static bool atapiR3MechanismStatusSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    30213175{
    30223176    uint8_t *pbBuf = s->abIOBuffer;
     3177    RT_NOREF(pDevIns, pDevR3);
    30233178
    30243179    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    30323187    scsiH2BE_U16(pbBuf + 6, 0);
    30333188    s->iSourceSink = ATAFN_SS_NULL;
    3034     atapiR3CmdOK(s);
     3189    atapiR3CmdOK(pCtl, s);
    30353190    return false;
    30363191}
    30373192
    30383193
    3039 static bool atapiR3ReadTOCNormalSS(ATADevState *s)
     3194/**
     3195 * Sink/Source: ATAPI READ TOC NORMAL
     3196 */
     3197static bool atapiR3ReadTOCNormalSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    30403198{
    30413199    uint8_t *pbBuf = s->abIOBuffer;
     
    30443202    bool fMSF;
    30453203    uint32_t cbSize;
     3204    RT_NOREF(pDevIns);
    30463205
    30473206    /* Track fields are 8-bit and 1-based, so cut the track count at 255,
    30483207       avoiding any potentially buffer overflow issues below. */
    3049     uint32_t cTracks = s->pDrvMedia->pfnGetRegionCount(s->pDrvMedia);
     3208    uint32_t cTracks = pDevR3->pDrvMedia->pfnGetRegionCount(pDevR3->pDrvMedia);
    30503209    AssertStmt(cTracks <= UINT8_MAX, cTracks = UINT8_MAX);
    30513210    AssertCompile(sizeof(s->abIOBuffer) >= 2 + 256 + 8);
     
    30593218    if (iStartTrack > cTracks && iStartTrack != 0xaa)
    30603219    {
    3061         atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
     3220        atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
    30623221        return false;
    30633222    }
     
    30703229        VDREGIONDATAFORM enmDataForm = VDREGIONDATAFORM_MODE1_2048;
    30713230
    3072         int rc = s->pDrvMedia->pfnQueryRegionProperties(s->pDrvMedia, iTrack - 1, &uLbaStart,
    3073                                                         NULL, NULL, &enmDataForm);
     3231        int rc = pDevR3->pDrvMedia->pfnQueryRegionProperties(pDevR3->pDrvMedia, iTrack - 1, &uLbaStart,
     3232                                                             NULL, NULL, &enmDataForm);
    30743233        AssertRC(rc);
    30753234
     
    31063265    uint64_t cBlocks = 0;
    31073266
    3108     int rc = s->pDrvMedia->pfnQueryRegionProperties(s->pDrvMedia, cTracks - 1, &uLbaStart,
     3267    int rc = pDevR3->pDrvMedia->pfnQueryRegionProperties(pDevR3->pDrvMedia, cTracks - 1, &uLbaStart,
    31093268                                                    &cBlocks, NULL, NULL);
    31103269    AssertRC(rc);
     
    31273286        s->cbTotalTransfer = cbSize;
    31283287    s->iSourceSink = ATAFN_SS_NULL;
    3129     atapiR3CmdOK(s);
     3288    atapiR3CmdOK(pCtl, s);
    31303289    return false;
    31313290}
    31323291
    31333292
    3134 static bool atapiR3ReadTOCMultiSS(ATADevState *s)
     3293/**
     3294 * Sink/Source: ATAPI READ TOC MULTI
     3295 */
     3296static bool atapiR3ReadTOCMultiSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    31353297{
    31363298    uint8_t *pbBuf = s->abIOBuffer;
    31373299    bool fMSF;
     3300    RT_NOREF(pDevIns);
    31383301
    31393302    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    31503313
    31513314    VDREGIONDATAFORM enmDataForm = VDREGIONDATAFORM_MODE1_2048;
    3152     int rc = s->pDrvMedia->pfnQueryRegionProperties(s->pDrvMedia, 0, NULL,
    3153                                                     NULL, NULL, &enmDataForm);
     3315    int rc = pDevR3->pDrvMedia->pfnQueryRegionProperties(pDevR3->pDrvMedia, 0, NULL, NULL, NULL, &enmDataForm);
    31543316    AssertRC(rc);
    31553317
     
    31713333    }
    31723334    s->iSourceSink = ATAFN_SS_NULL;
    3173     atapiR3CmdOK(s);
     3335    atapiR3CmdOK(pCtl, s);
    31743336    return false;
    31753337}
    31763338
    31773339
    3178 static bool atapiR3ReadTOCRawSS(ATADevState *s)
     3340/**
     3341 * Sink/Source: ATAPI READ TOC RAW
     3342 */
     3343static bool atapiR3ReadTOCRawSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    31793344{
    31803345    uint8_t *pbBuf = s->abIOBuffer;
     
    31833348    bool fMSF;
    31843349    uint32_t cbSize;
     3350    RT_NOREF(pDevIns, pDevR3);
    31853351
    31863352    Assert(s->uTxDir == PDMMEDIATXDIR_FROM_DEVICE);
     
    32603426        s->cbTotalTransfer = cbSize;
    32613427    s->iSourceSink = ATAFN_SS_NULL;
    3262     atapiR3CmdOK(s);
     3428    atapiR3CmdOK(pCtl, s);
    32633429    return false;
    32643430}
    32653431
    32663432
    3267 static void atapiR3ParseCmdVirtualATAPI(ATADevState *s)
     3433static void atapiR3ParseCmdVirtualATAPI(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    32683434{
    32693435    const uint8_t *pbPacket = s->abATAPICmd;
     
    32773443            {
    32783444                if (s->cNotifiedMediaChange-- > 2)
    3279                     atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
     3445                    atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
    32803446                else
    3281                     atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
     3447                    atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
    32823448            }
    3283             else if (s->pDrvMount->pfnIsMounted(s->pDrvMount))
    3284                 atapiR3CmdOK(s);
     3449            else if (pDevR3->pDrvMount->pfnIsMounted(pDevR3->pDrvMount))
     3450                atapiR3CmdOK(pCtl, s);
    32853451            else
    3286                 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
     3452                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
    32873453            break;
    32883454        case SCSI_GET_EVENT_STATUS_NOTIFICATION:
    32893455            cbMax = scsiBE2H_U16(pbPacket + 7);
    3290             ataR3StartTransfer(s, RT_MIN(cbMax, 8), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_EVENT_STATUS_NOTIFICATION, true);
     3456            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 8), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_EVENT_STATUS_NOTIFICATION, true);
    32913457            break;
    32923458        case SCSI_MODE_SENSE_6:
     
    33023468                    {
    33033469                        case SCSI_MODEPAGE_ERROR_RECOVERY:
    3304                             ataR3StartTransfer(s, RT_MIN(cbMax, 16), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_ERROR_RECOVERY, true);
     3470                            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 16), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_ERROR_RECOVERY, true);
    33053471                            break;
    33063472                        case SCSI_MODEPAGE_CD_STATUS:
    3307                             ataR3StartTransfer(s, RT_MIN(cbMax, 40), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_CD_STATUS, true);
     3473                            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 40), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_CD_STATUS, true);
    33083474                            break;
    33093475                        default:
     
    33173483                default:
    33183484                case SCSI_PAGECONTROL_SAVED:
    3319                     atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
     3485                    atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
    33203486                    break;
    33213487            }
     
    33343500                    {
    33353501                        case SCSI_MODEPAGE_ERROR_RECOVERY:
    3336                             ataR3StartTransfer(s, RT_MIN(cbMax, 16), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_ERROR_RECOVERY, true);
     3502                            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 16), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_ERROR_RECOVERY, true);
    33373503                            break;
    33383504                        case SCSI_MODEPAGE_CD_STATUS:
    3339                             ataR3StartTransfer(s, RT_MIN(cbMax, 40), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_CD_STATUS, true);
     3505                            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 40), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MODE_SENSE_CD_STATUS, true);
    33403506                            break;
    33413507                        default:
     
    33493515                default:
    33503516                case SCSI_PAGECONTROL_SAVED:
    3351                     atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
     3517                    atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
    33523518                    break;
    33533519            }
     
    33563522        case SCSI_REQUEST_SENSE:
    33573523            cbMax = pbPacket[4];
    3358             ataR3StartTransfer(s, RT_MIN(cbMax, 18), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_REQUEST_SENSE, true);
     3524            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 18), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_REQUEST_SENSE, true);
    33593525            break;
    33603526        case SCSI_PREVENT_ALLOW_MEDIUM_REMOVAL:
    3361             if (s->pDrvMount->pfnIsMounted(s->pDrvMount))
     3527            if (pDevR3->pDrvMount->pfnIsMounted(pDevR3->pDrvMount))
    33623528            {
    33633529                if (pbPacket[4] & 1)
    3364                     s->pDrvMount->pfnLock(s->pDrvMount);
     3530                    pDevR3->pDrvMount->pfnLock(pDevR3->pDrvMount);
    33653531                else
    3366                     s->pDrvMount->pfnUnlock(s->pDrvMount);
    3367                 atapiR3CmdOK(s);
     3532                    pDevR3->pDrvMount->pfnUnlock(pDevR3->pDrvMount);
     3533                atapiR3CmdOK(pCtl, s);
    33683534            }
    33693535            else
    3370                 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
     3536                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
    33713537            break;
    33723538        case SCSI_READ_10:
     
    33763542            {
    33773543                s->cNotifiedMediaChange-- ;
    3378                 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
     3544                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
    33793545                break;
    33803546            }
    3381             else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount))
     3547            else if (!pDevR3->pDrvMount->pfnIsMounted(pDevR3->pDrvMount))
    33823548            {
    3383                 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
     3549                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
    33843550                break;
    33853551            }
     
    33923558            if (cSectors == 0)
    33933559            {
    3394                 atapiR3CmdOK(s);
     3560                atapiR3CmdOK(pCtl, s);
    33953561                break;
    33963562            }
     
    33983564            /* Check that the sector size is valid. */
    33993565            VDREGIONDATAFORM enmDataForm = VDREGIONDATAFORM_INVALID;
    3400             int rc = s->pDrvMedia->pfnQueryRegionPropertiesForLba(s->pDrvMedia, iATAPILBA,
     3566            int rc = pDevR3->pDrvMedia->pfnQueryRegionPropertiesForLba(pDevR3->pDrvMedia, iATAPILBA,
    34013567                                                                  NULL, NULL, NULL, &enmDataForm);
    34023568            if (RT_UNLIKELY(   rc == VERR_NOT_FOUND
     
    34133579                    uLastLogTS = RTTimeMilliTS();
    34143580                }
    3415                 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR);
     3581                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR);
    34163582                break;
    34173583            }
     
    34303596                abATAPISense[7] = 10;
    34313597                abATAPISense[12] = SCSI_ASC_ILLEGAL_MODE_FOR_THIS_TRACK;
    3432                 atapiR3CmdError(s, &abATAPISense[0], sizeof(abATAPISense));
     3598                atapiR3CmdError(pCtl, s, &abATAPISense[0], sizeof(abATAPISense));
    34333599                break;
    34343600            }
    3435             atapiR3ReadSectors(s, iATAPILBA, cSectors, 2048);
     3601            atapiR3ReadSectors(pDevIns, pCtl, s, iATAPILBA, cSectors, 2048);
    34363602            break;
    34373603        }
     
    34423608            {
    34433609                s->cNotifiedMediaChange-- ;
    3444                 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
     3610                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
    34453611                break;
    34463612            }
    3447             else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount))
     3613            else if (!pDevR3->pDrvMount->pfnIsMounted(pDevR3->pDrvMount))
    34483614            {
    3449                 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
     3615                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
    34503616                break;
    34513617            }
    34523618            if ((pbPacket[10] & 0x7) != 0)
    34533619            {
    3454                 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
     3620                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
    34553621                break;
    34563622            }
     
    34673633                    Log2(("Start MSF %02u:%02u:%02u > end MSF  %02u:%02u:%02u!\n", *(pbPacket + 3), *(pbPacket + 4), *(pbPacket + 5),
    34683634                          *(pbPacket + 6), *(pbPacket + 7), *(pbPacket + 8)));
    3469                     atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
     3635                    atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
    34703636                    break;
    34713637                }
     
    34763642            if (cSectors == 0)
    34773643            {
    3478                 atapiR3CmdOK(s);
     3644                atapiR3CmdOK(pCtl, s);
    34793645                break;
    34803646            }
     
    34913657                    uLastLogTS = RTTimeMilliTS();
    34923658                }
    3493                 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR);
     3659                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR);
    34943660                break;
    34953661            }
     
    35033669            uint8_t uChnSel = pbPacket[9] & 0xf8;
    35043670            VDREGIONDATAFORM enmDataForm;
    3505             int rc = s->pDrvMedia->pfnQueryRegionPropertiesForLba(s->pDrvMedia, iATAPILBA,
    3506                                                                   NULL, NULL, NULL, &enmDataForm);
     3671            int rc = pDevR3->pDrvMedia->pfnQueryRegionPropertiesForLba(pDevR3->pDrvMedia, iATAPILBA,
     3672                                                                       NULL, NULL, NULL, &enmDataForm);
    35073673            AssertRC(rc);
    35083674
     
    35123678                {
    35133679                    /* nothing */
    3514                     atapiR3CmdOK(s);
     3680                    atapiR3CmdOK(pCtl, s);
    35153681                }
    35163682                else
    3517                     atapiR3ReadSectors(s, iATAPILBA, cSectors, 2352);
     3683                    atapiR3ReadSectors(pDevIns, pCtl, s, iATAPILBA, cSectors, 2352);
    35183684            }
    35193685            else
     
    35233689                    case 0x00:
    35243690                        /* nothing */
    3525                         atapiR3CmdOK(s);
     3691                        atapiR3CmdOK(pCtl, s);
    35263692                        break;
    35273693                    case 0x10:
    35283694                        /* normal read */
    3529                         atapiR3ReadSectors(s, iATAPILBA, cSectors, 2048);
     3695                        atapiR3ReadSectors(pDevIns, pCtl, s, iATAPILBA, cSectors, 2048);
    35303696                        break;
    35313697                    case 0xf8:
    35323698                        /* read all data */
    3533                         atapiR3ReadSectors(s, iATAPILBA, cSectors, 2352);
     3699                        atapiR3ReadSectors(pDevIns, pCtl, s, iATAPILBA, cSectors, 2352);
    35343700                        break;
    35353701                    default:
    35363702                        LogRel(("PIIX3 ATA: LUN#%d: CD-ROM sector format not supported (%#x)\n", s->iLUN, pbPacket[9] & 0xf8));
    3537                         atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
     3703                        atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
    35383704                        break;
    35393705                }
     
    35463712            {
    35473713                s->cNotifiedMediaChange-- ;
    3548                 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
     3714                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
    35493715                break;
    35503716            }
    3551             else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount))
     3717            else if (!pDevR3->pDrvMount->pfnIsMounted(pDevR3->pDrvMount))
    35523718            {
    3553                 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
     3719                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
    35543720                break;
    35553721            }
     
    35673733                    uLastLogTS = RTTimeMilliTS();
    35683734                }
    3569                 atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR);
     3735                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_LOGICAL_BLOCK_OOR);
    35703736                break;
    35713737            }
    3572             atapiR3CmdOK(s);
    3573             ataSetStatus(s, ATA_STAT_SEEK); /* Linux expects this. */
     3738            atapiR3CmdOK(pCtl, s);
     3739            ataSetStatus(pCtl, s, ATA_STAT_SEEK); /* Linux expects this. */
    35743740            break;
    35753741        }
     
    35853751                {
    35863752                    /* This must be done from EMT. */
    3587                     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    3588                     PPDMDEVINS pDevIns = ATADEVSTATE_2_DEVINS(s);
    3589                     PCIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    3590 
    3591                     ataR3LockLeave(pCtl);
     3753                    PATASTATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATER3);
     3754
     3755                    ataR3LockLeave(pDevIns, pCtl);
    35923756                    rc = VMR3ReqPriorityCallWait(PDMDevHlpGetVM(pDevIns), VMCPUID_ANY,
    3593                                                  (PFNRT)s->pDrvMount->pfnUnmount, 3,
    3594                                                  s->pDrvMount, false /*=fForce*/, true /*=fEject*/);
     3757                                                 (PFNRT)pDevR3->pDrvMount->pfnUnmount, 3,
     3758                                                 pDevR3->pDrvMount, false /*=fForce*/, true /*=fEject*/);
    35953759                    Assert(RT_SUCCESS(rc) || rc == VERR_PDM_MEDIA_LOCKED || rc == VERR_PDM_MEDIA_NOT_MOUNTED);
    3596                     if (RT_SUCCESS(rc) && pThis->pMediaNotify)
     3760                    if (RT_SUCCESS(rc) && pThisCC->pMediaNotify)
    35973761                    {
    35983762                        rc = VMR3ReqCallNoWait(PDMDevHlpGetVM(pDevIns), VMCPUID_ANY,
    3599                                                (PFNRT)pThis->pMediaNotify->pfnEjected, 2,
    3600                                                pThis->pMediaNotify, s->iLUN);
     3763                                               (PFNRT)pThisCC->pMediaNotify->pfnEjected, 2,
     3764                                               pThisCC->pMediaNotify, s->iLUN);
    36013765                        AssertRC(rc);
    36023766                    }
    36033767
    3604                     ataR3LockEnter(pCtl);
     3768                    ataR3LockEnter(pDevIns, pCtl);
    36053769                    break;
    36063770                }
    36073771                case 3: /* 11 - Load media */
    3608                     /** @todo rc = s->pDrvMount->pfnLoadMedia(s->pDrvMount) */
     3772                    /** @todo rc = pDevR3->pDrvMount->pfnLoadMedia(pDevR3->pDrvMount) */
    36093773                    break;
    36103774            }
    36113775            if (RT_SUCCESS(rc))
    3612                 atapiR3CmdOK(s);
     3776                atapiR3CmdOK(pCtl, s);
    36133777            else
    3614                 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIA_LOAD_OR_EJECT_FAILED);
     3778                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIA_LOAD_OR_EJECT_FAILED);
    36153779            break;
    36163780        }
     
    36183782        {
    36193783            cbMax = scsiBE2H_U16(pbPacket + 8);
    3620             ataR3StartTransfer(s, RT_MIN(cbMax, 8), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MECHANISM_STATUS, true);
     3784            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 8), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_MECHANISM_STATUS, true);
    36213785            break;
    36223786        }
     
    36283792            {
    36293793                s->cNotifiedMediaChange-- ;
    3630                 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
     3794                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
    36313795                break;
    36323796            }
    3633             else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount))
     3797            else if (!pDevR3->pDrvMount->pfnIsMounted(pDevR3->pDrvMount))
    36343798            {
    3635                 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
     3799                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
    36363800                break;
    36373801            }
     
    36443808            {
    36453809                case 0:
    3646                     ataR3StartTransfer(s, cbMax, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_NORMAL, true);
     3810                    ataR3StartTransfer(pDevIns, pCtl, s, cbMax, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_NORMAL, true);
    36473811                    break;
    36483812                case 1:
    3649                     ataR3StartTransfer(s, RT_MIN(cbMax, 12), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_MULTI, true);
     3813                    ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 12), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_MULTI, true);
    36503814                    break;
    36513815                case 2:
    3652                     ataR3StartTransfer(s, cbMax, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_RAW, true);
     3816                    ataR3StartTransfer(pDevIns, pCtl, s, cbMax, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TOC_RAW, true);
    36533817                    break;
    36543818                default:
    36553819                  error_cmd:
    3656                     atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
     3820                    atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_INV_FIELD_IN_CMD_PACKET);
    36573821                    break;
    36583822            }
     
    36633827            {
    36643828                s->cNotifiedMediaChange-- ;
    3665                 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
     3829                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
    36663830                break;
    36673831            }
    3668             else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount))
     3832            else if (!pDevR3->pDrvMount->pfnIsMounted(pDevR3->pDrvMount))
    36693833            {
    3670                 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
     3834                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
    36713835                break;
    36723836            }
    3673             ataR3StartTransfer(s, 8, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_CAPACITY, true);
     3837            ataR3StartTransfer(pDevIns, pCtl, s, 8, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_CAPACITY, true);
    36743838            break;
    36753839        case SCSI_READ_DISC_INFORMATION:
     
    36773841            {
    36783842                s->cNotifiedMediaChange-- ;
    3679                 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
     3843                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
    36803844                break;
    36813845            }
    3682             else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount))
     3846            else if (!pDevR3->pDrvMount->pfnIsMounted(pDevR3->pDrvMount))
    36833847            {
    3684                 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
     3848                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
    36853849                break;
    36863850            }
    36873851            cbMax = scsiBE2H_U16(pbPacket + 7);
    3688             ataR3StartTransfer(s, RT_MIN(cbMax, 34), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_DISC_INFORMATION, true);
     3852            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 34), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_DISC_INFORMATION, true);
    36893853            break;
    36903854        case SCSI_READ_TRACK_INFORMATION:
     
    36923856            {
    36933857                s->cNotifiedMediaChange-- ;
    3694                 atapiR3CmdErrorSimple(s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
     3858                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_UNIT_ATTENTION, SCSI_ASC_MEDIUM_MAY_HAVE_CHANGED); /* media changed */
    36953859                break;
    36963860            }
    3697             else if (!s->pDrvMount->pfnIsMounted(s->pDrvMount))
     3861            else if (!pDevR3->pDrvMount->pfnIsMounted(pDevR3->pDrvMount))
    36983862            {
    3699                 atapiR3CmdErrorSimple(s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
     3863                atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT);
    37003864                break;
    37013865            }
    37023866            cbMax = scsiBE2H_U16(pbPacket + 7);
    3703             ataR3StartTransfer(s, RT_MIN(cbMax, 36), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TRACK_INFORMATION, true);
     3867            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 36), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_TRACK_INFORMATION, true);
    37043868            break;
    37053869        case SCSI_GET_CONFIGURATION:
    37063870            /* No media change stuff here, it can confuse Linux guests. */
    37073871            cbMax = scsiBE2H_U16(pbPacket + 7);
    3708             ataR3StartTransfer(s, RT_MIN(cbMax, 80), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_CONFIGURATION, true);
     3872            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 80), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_CONFIGURATION, true);
    37093873            break;
    37103874        case SCSI_INQUIRY:
    37113875            cbMax = scsiBE2H_U16(pbPacket + 3);
    3712             ataR3StartTransfer(s, RT_MIN(cbMax, 36), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_INQUIRY, true);
     3876            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 36), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_INQUIRY, true);
    37133877            break;
    37143878        case SCSI_READ_DVD_STRUCTURE:
    37153879        {
    37163880            cbMax = scsiBE2H_U16(pbPacket + 8);
    3717             ataR3StartTransfer(s, RT_MIN(cbMax, 4), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_DVD_STRUCTURE, true);
     3881            ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbMax, 4), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_READ_DVD_STRUCTURE, true);
    37183882            break;
    37193883        }
    37203884        default:
    3721             atapiR3CmdErrorSimple(s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);
     3885            atapiR3CmdErrorSimple(pCtl, s, SCSI_SENSE_ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_OPCODE);
    37223886            break;
    37233887    }
     
    37283892 * Parse ATAPI commands, passing them directly to the CD/DVD drive.
    37293893 */
    3730 static void atapiR3ParseCmdPassthrough(ATADevState *s)
     3894static void atapiR3ParseCmdPassthrough(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    37313895{
    37323896    const uint8_t *pbPacket = &s->abATAPICmd[0];
     
    37373901    {
    37383902        uint32_t cbTransfer = scsiBE2H_U16(pbPacket + 7);
    3739         ataR3StartTransfer(s, RT_MIN(cbTransfer, 8), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_EVENT_STATUS_NOTIFICATION, true);
     3903        ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(cbTransfer, 8), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_GET_EVENT_STATUS_NOTIFICATION, true);
    37403904    }
    37413905    else if (   pbPacket[0] == SCSI_REQUEST_SENSE
    37423906             && (s->abATAPISense[2] & 0x0f) != SCSI_SENSE_NONE)
    3743         ataR3StartTransfer(s, RT_MIN(pbPacket[4], 18), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_REQUEST_SENSE, true);
     3907        ataR3StartTransfer(pDevIns, pCtl, s, RT_MIN(pbPacket[4], 18), PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_ATAPI_CMD, ATAFN_SS_ATAPI_REQUEST_SENSE, true);
    37443908    else
    37453909    {
     
    37533917            cbBuf = s->uATARegLCyl | (s->uATARegHCyl << 8); /* use ATAPI transfer length */
    37543918
    3755         bool fPassthrough = ATAPIPassthroughParseCdb(pbPacket, sizeof(s->abATAPICmd), cbBuf, s->pTrackList,
     3919        bool fPassthrough = ATAPIPassthroughParseCdb(pbPacket, sizeof(s->abATAPICmd), cbBuf, pDevR3->pTrackList,
    37563920                                                     &s->abATAPISense[0], sizeof(s->abATAPISense), &uTxDir, &cbTransfer,
    37573921                                                     &cbATAPISector, &u8ScsiSts);
     
    37703934            if (cbTransfer == 0)
    37713935                uTxDir = PDMMEDIATXDIR_NONE;
    3772             ataR3StartTransfer(s, (uint32_t)cbTransfer, uTxDir, ATAFN_BT_ATAPI_PASSTHROUGH_CMD, ATAFN_SS_ATAPI_PASSTHROUGH, true);
     3936            ataR3StartTransfer(pDevIns, pCtl, s, (uint32_t)cbTransfer, uTxDir, ATAFN_BT_ATAPI_PASSTHROUGH_CMD, ATAFN_SS_ATAPI_PASSTHROUGH, true);
    37733937        }
    37743938        else if (u8ScsiSts == SCSI_STATUS_CHECK_CONDITION)
     
    37783942                     s->abATAPISense[12], s->abATAPISense[13], SCSISenseExtText(s->abATAPISense[12], s->abATAPISense[13])));
    37793943            s->uATARegError = s->abATAPISense[2] << 4;
    3780             ataSetStatusValue(s, ATA_STAT_READY | ATA_STAT_ERR);
     3944            ataSetStatusValue(pCtl, s, ATA_STAT_READY | ATA_STAT_ERR);
    37813945            s->uATARegNSector = (s->uATARegNSector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
    37823946            Log2(("%s: interrupt reason %#04x\n", __FUNCTION__, s->uATARegNSector));
     
    37913955        }
    37923956        else if (u8ScsiSts == SCSI_STATUS_OK)
    3793             atapiR3CmdOK(s);
    3794     }
    3795 }
    3796 
    3797 
    3798 static void atapiR3ParseCmd(ATADevState *s)
     3957            atapiR3CmdOK(pCtl, s);
     3958    }
     3959}
     3960
     3961
     3962static void atapiR3ParseCmd(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    37993963{
    38003964    const uint8_t *pbPacket;
     
    38093973
    38103974    if (s->fATAPIPassthrough)
    3811         atapiR3ParseCmdPassthrough(s);
     3975        atapiR3ParseCmdPassthrough(pDevIns, pCtl, s, pDevR3);
    38123976    else
    3813         atapiR3ParseCmdVirtualATAPI(s);
    3814 }
    3815 
    3816 
    3817 static bool ataR3PacketSS(ATADevState *s)
     3977        atapiR3ParseCmdVirtualATAPI(pDevIns, pCtl, s, pDevR3);
     3978}
     3979
     3980
     3981/**
     3982 * Sink/Source: PACKET
     3983 */
     3984static bool ataR3PacketSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    38183985{
    38193986    s->fDMA = !!(s->uATARegFeature & 1);
     
    38233990    s->cbElementaryTransfer = 0;
    38243991    s->cbAtapiPassthroughTransfer = 0;
    3825     atapiR3ParseCmd(s);
     3992    atapiR3ParseCmd(pDevIns, pCtl, s, pDevR3);
    38263993    return false;
    38273994}
     
    38694036static DECLCALLBACK(void) ataR3MountNotify(PPDMIMOUNTNOTIFY pInterface)
    38704037{
    3871     ATADevState *pIf = RT_FROM_MEMBER(pInterface, ATADevState, IMountNotify);
    3872     Log(("%s: changing LUN#%d\n", __FUNCTION__, pIf->iLUN));
     4038    PATADEVSTATER3  pIfR3 = RT_FROM_MEMBER(pInterface, ATADEVSTATER3, IMountNotify);
     4039    PATASTATE       pThis = PDMDEVINS_2_DATA(pIfR3->pDevIns, PATASTATE);
     4040    PATADEVSTATE    pIf   = &pThis->aCts[pIfR3->iCtl % RT_ELEMENTS(pThis->aCts)].aIfs[pIfR3->iDev % RT_ELEMENTS(pThis->aCts[0].aIfs)];
     4041    Log(("%s: changing LUN#%d\n", __FUNCTION__, pIfR3->iLUN));
    38734042
    38744043    /* Ignore the call if we're called while being attached. */
    3875     if (!pIf->pDrvMedia)
     4044    if (!pIfR3->pDrvMedia)
    38764045        return;
    38774046
    3878     uint32_t cRegions = pIf->pDrvMedia->pfnGetRegionCount(pIf->pDrvMedia);
     4047    uint32_t cRegions = pIfR3->pDrvMedia->pfnGetRegionCount(pIfR3->pDrvMedia);
    38794048    for (uint32_t i = 0; i < cRegions; i++)
    38804049    {
    38814050        uint64_t cBlocks = 0;
    3882         int rc = pIf->pDrvMedia->pfnQueryRegionProperties(pIf->pDrvMedia, i, NULL, &cBlocks,
     4051        int rc = pIfR3->pDrvMedia->pfnQueryRegionProperties(pIfR3->pDrvMedia, i, NULL, &cBlocks,
    38834052                                                          NULL, NULL);
    38844053        AssertRC(rc);
     
    39004069static DECLCALLBACK(void) ataR3UnmountNotify(PPDMIMOUNTNOTIFY pInterface)
    39014070{
    3902     ATADevState *pIf = RT_FROM_MEMBER(pInterface, ATADevState, IMountNotify);
     4071    PATADEVSTATER3  pIfR3 = RT_FROM_MEMBER(pInterface, ATADEVSTATER3, IMountNotify);
     4072    PATASTATE       pThis = PDMDEVINS_2_DATA(pIfR3->pDevIns, PATASTATE);
     4073    PATADEVSTATE    pIf   = &pThis->aCts[pIfR3->iCtl % RT_ELEMENTS(pThis->aCts)].aIfs[pIfR3->iDev % RT_ELEMENTS(pThis->aCts[0].aIfs)];
    39034074    Log(("%s:\n", __FUNCTION__));
    39044075    pIf->cTotalSectors = 0;
     
    39154086}
    39164087
    3917 static void ataR3PacketBT(ATADevState *s)
     4088/**
     4089 * Begin Transfer: PACKET
     4090 */
     4091static void ataR3PacketBT(PATACONTROLLER pCtl, ATADevState *s)
    39184092{
    39194093    s->cbElementaryTransfer = s->cbTotalTransfer;
     
    39214095    s->uATARegNSector = (s->uATARegNSector & ~7) | ATAPI_INT_REASON_CD;
    39224096    Log2(("%s: interrupt reason %#04x\n", __FUNCTION__, s->uATARegNSector));
    3923     ataSetStatusValue(s, ATA_STAT_READY);
    3924 }
    3925 
    3926 
    3927 static void ataR3ResetDevice(ATADevState *s)
     4097    ataSetStatusValue(pCtl, s, ATA_STAT_READY);
     4098}
     4099
     4100
     4101static void ataR3ResetDevice(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s)
    39284102{
    39294103    s->cMultSectors = ATA_MAX_MULT_SECTORS;
     
    39314105    ASMAtomicWriteU32(&s->MediaEventStatus, ATA_EVENT_STATUS_UNCHANGED);
    39324106    ASMAtomicWriteU32(&s->MediaTrackType, ATA_MEDIA_TYPE_UNKNOWN);
    3933     ataUnsetIRQ(s);
     4107    ataUnsetIRQ(pDevIns, pCtl, s);
    39344108
    39354109    s->uATARegSelect = 0x20;
    3936     ataSetStatusValue(s, ATA_STAT_READY);
     4110    ataSetStatusValue(pCtl, s, ATA_STAT_READY);
    39374111    ataR3SetSignature(s);
    39384112    s->cbTotalTransfer = 0;
     
    39514125
    39524126
    3953 static void ataR3DeviceDiag(ATADevState *s)
     4127static void ataR3DeviceDiag(PATACONTROLLER pCtl, ATADevState *s)
    39544128{
    39554129    ataR3SetSignature(s);
    39564130    if (s->fATAPI)
    3957         ataSetStatusValue(s, 0); /* NOTE: READY is _not_ set */
     4131        ataSetStatusValue(pCtl, s, 0); /* NOTE: READY is _not_ set */
    39584132    else
    3959         ataSetStatusValue(s, ATA_STAT_READY | ATA_STAT_SEEK);
     4133        ataSetStatusValue(pCtl, s, ATA_STAT_READY | ATA_STAT_SEEK);
    39604134    s->uATARegError = 0x01;
    39614135}
    39624136
    39634137
    3964 static bool ataR3ExecuteDeviceDiagnosticSS(ATADevState *s)
    3965 {
    3966     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
     4138/**
     4139 * Sink/Source: EXECUTE DEVICE DIAGNOTIC
     4140 */
     4141static bool ataR3ExecuteDeviceDiagnosticSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
     4142{
     4143    RT_NOREF(pDevIns, s, pDevR3);
    39674144
    39684145    /* EXECUTE DEVICE DIAGNOSTIC is a very special command which always
     
    39714148     */
    39724149    for (uint32_t i = 0; i < RT_ELEMENTS(pCtl->aIfs); i++)
    3973         ataR3DeviceDiag(&pCtl->aIfs[i]);
    3974 
    3975     LogRel(("ATA: LUN#%d: EXECUTE DEVICE DIAGNOSTIC, status %02X\n",
    3976             s->iLUN, s->uATARegStatus));
     4150        ataR3DeviceDiag(pCtl, &pCtl->aIfs[i]);
     4151
     4152    LogRel(("ATA: LUN#%d: EXECUTE DEVICE DIAGNOSTIC, status %02X\n", s->iLUN, s->uATARegStatus));
    39774153    pCtl->iSelectedIf = 0;
    39784154
     
    39814157
    39824158
    3983 static bool ataR3InitDevParmSS(ATADevState *s)
    3984 {
    3985     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    3986 
     4159/**
     4160 * Sink/Source: INITIALIZE DEVICE PARAMETERS
     4161 */
     4162static bool ataR3InitDevParmSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
     4163{
     4164    RT_NOREF(pDevR3);
    39874165    LogFlowFunc(("\n"));
    39884166    LogRel(("ATA: LUN#%d: INITIALIZE DEVICE PARAMETERS: %u logical sectors, %u heads\n",
    39894167            s->iLUN, s->uATARegNSector, s->uATARegSelect & 0x0f));
    3990     ataR3LockLeave(pCtl);
     4168    ataR3LockLeave(pDevIns, pCtl);
    39914169    RTThreadSleep(pCtl->msDelayIRQ);
    3992     ataR3LockEnter(pCtl);
    3993     ataR3CmdOK(s, ATA_STAT_SEEK);
    3994     ataHCSetIRQ(s);
     4170    ataR3LockEnter(pDevIns, pCtl);
     4171    ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
     4172    ataHCSetIRQ(pDevIns, pCtl, s);
    39954173    return false;
    39964174}
    39974175
    39984176
    3999 static bool ataR3RecalibrateSS(ATADevState *s)
    4000 {
    4001     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    4002 
     4177/**
     4178 * Sink/Source: RECALIBRATE
     4179 */
     4180static bool ataR3RecalibrateSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
     4181{
     4182    RT_NOREF(pDevR3);
    40034183    LogFlowFunc(("\n"));
    4004     ataR3LockLeave(pCtl);
     4184    ataR3LockLeave(pDevIns, pCtl);
    40054185    RTThreadSleep(pCtl->msDelayIRQ);
    4006     ataR3LockEnter(pCtl);
    4007     ataR3CmdOK(s, ATA_STAT_SEEK);
    4008     ataHCSetIRQ(s);
     4186    ataR3LockEnter(pDevIns, pCtl);
     4187    ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
     4188    ataHCSetIRQ(pDevIns, pCtl, s);
    40094189    return false;
    40104190}
    40114191
    40124192
    4013 static int ataR3TrimSectors(ATADevState *s, uint64_t u64Sector, uint32_t cSectors,
    4014                             bool *pfRedo)
     4193static int ataR3TrimSectors(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3,
     4194                            uint64_t u64Sector, uint32_t cSectors, bool *pfRedo)
    40154195{
    40164196    RTRANGE TrimRange;
    4017     PATACONTROLLER pCtl = ATADEVSTATE_2_CONTROLLER(s);
    40184197    int rc;
    40194198
    4020     ataR3LockLeave(pCtl);
     4199    ataR3LockLeave(pDevIns, pCtl);
    40214200
    40224201    TrimRange.offStart = u64Sector * s->cbSector;
     
    40244203
    40254204    s->Led.Asserted.s.fWriting = s->Led.Actual.s.fWriting = 1;
    4026     rc = s->pDrvMedia->pfnDiscard(s->pDrvMedia, &TrimRange, 1);
     4205    rc = pDevR3->pDrvMedia->pfnDiscard(pDevR3->pDrvMedia, &TrimRange, 1);
    40274206    s->Led.Actual.s.fWriting = 0;
    40284207
     
    40304209        *pfRedo = false;
    40314210    else
    4032         *pfRedo = ataR3IsRedoSetWarning(s, rc);
    4033 
    4034     ataR3LockEnter(pCtl);
     4211        *pfRedo = ataR3IsRedoSetWarning(pDevIns, pCtl, rc);
     4212
     4213    ataR3LockEnter(pDevIns, pCtl);
    40354214    return rc;
    40364215}
    40374216
    40384217
    4039 static bool ataR3TrimSS(ATADevState *s)
     4218/**
     4219 * Sink/Source: TRIM
     4220 */
     4221static bool ataR3TrimSS(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3)
    40404222{
    40414223    int rc = VERR_GENERAL_FAILURE;
     
    40524234            break;
    40534235
    4054         rc = ataR3TrimSectors(s, *pu64Range & ATA_RANGE_LBA_MASK,
     4236        rc = ataR3TrimSectors(pDevIns, pCtl, s, pDevR3, *pu64Range & ATA_RANGE_LBA_MASK,
    40554237                              ATA_RANGE_LENGTH_GET(*pu64Range), &fRedo);
    40564238        if (RT_FAILURE(rc))
     
    40634245    {
    40644246        s->iSourceSink = ATAFN_SS_NULL;
    4065         ataR3CmdOK(s, ATA_STAT_SEEK);
     4247        ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
    40664248    }
    40674249    else
     
    40784260         */
    40794261        if (rc != VERR_INTERRUPTED)
    4080             ataR3CmdError(s, ID_ERR);
     4262            ataR3CmdError(pCtl, s, ID_ERR);
    40814263    }
    40824264
     
    40854267
    40864268
    4087 static void ataR3ParseCmd(ATADevState *s, uint8_t cmd)
     4269static void ataR3ParseCmd(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3, uint8_t cmd)
    40884270{
    40894271# ifdef DEBUG
     
    41094291    {
    41104292        case ATA_IDENTIFY_DEVICE:
    4111             if (s->pDrvMedia && !s->fATAPI)
    4112                 ataR3StartTransfer(s, 512, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_NULL, ATAFN_SS_IDENTIFY, false);
     4293            if (pDevR3->pDrvMedia && !s->fATAPI)
     4294                ataR3StartTransfer(pDevIns, pCtl, s, 512, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_NULL, ATAFN_SS_IDENTIFY, false);
    41134295            else
    41144296            {
    41154297                if (s->fATAPI)
    41164298                    ataR3SetSignature(s);
    4117                 ataR3CmdError(s, ABRT_ERR);
    4118                 ataUnsetStatus(s, ATA_STAT_READY);
    4119                 ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4299                ataR3CmdError(pCtl, s, ABRT_ERR);
     4300                ataUnsetStatus(pCtl, s, ATA_STAT_READY);
     4301                ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    41204302            }
    41214303            break;
     
    41234305            if (s->fATAPI)
    41244306                goto abort_cmd;
    4125             ataR3StartTransfer(s, 0, PDMMEDIATXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_RECALIBRATE, false);
     4307            ataR3StartTransfer(pDevIns, pCtl, s, 0, PDMMEDIATXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_RECALIBRATE, false);
    41264308            break;
    41274309        case ATA_INITIALIZE_DEVICE_PARAMETERS:
    41284310            if (s->fATAPI)
    41294311                goto abort_cmd;
    4130             ataR3StartTransfer(s, 0, PDMMEDIATXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_INITIALIZE_DEVICE_PARAMETERS, false);
     4312            ataR3StartTransfer(pDevIns, pCtl, s, 0, PDMMEDIATXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_INITIALIZE_DEVICE_PARAMETERS, false);
    41314313            break;
    41324314        case ATA_SET_MULTIPLE_MODE:
     
    41354317                     || (s->uATARegNSector & (s->uATARegNSector - 1)) != 0))
    41364318            {
    4137                 ataR3CmdError(s, ABRT_ERR);
     4319                ataR3CmdError(pCtl, s, ABRT_ERR);
    41384320            }
    41394321            else
     
    41414323                Log2(("%s: set multi sector count to %d\n", __FUNCTION__, s->uATARegNSector));
    41424324                s->cMultSectors = s->uATARegNSector;
    4143                 ataR3CmdOK(s, 0);
     4325                ataR3CmdOK(pCtl, s, 0);
    41444326            }
    4145             ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4327            ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    41464328            break;
    41474329        case ATA_READ_VERIFY_SECTORS_EXT:
     
    41514333        case ATA_READ_VERIFY_SECTORS_WITHOUT_RETRIES:
    41524334            /* do sector number check ? */
    4153             ataR3CmdOK(s, ATA_STAT_SEEK);
    4154             ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4335            ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
     4336            ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    41554337            break;
    41564338        case ATA_READ_SECTORS_EXT:
     
    41594341        case ATA_READ_SECTORS:
    41604342        case ATA_READ_SECTORS_WITHOUT_RETRIES:
    4161             if (!s->pDrvMedia || s->fATAPI)
     4343            if (!pDevR3->pDrvMedia || s->fATAPI)
    41624344                goto abort_cmd;
    41634345            s->cSectorsPerIRQ = 1;
    4164             ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);
     4346            ataR3StartTransfer(pDevIns, pCtl, s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);
    41654347            break;
    41664348        case ATA_WRITE_SECTORS_EXT:
     
    41694351        case ATA_WRITE_SECTORS:
    41704352        case ATA_WRITE_SECTORS_WITHOUT_RETRIES:
    4171             if (!s->pDrvMedia || s->fATAPI)
     4353            if (!pDevR3->pDrvMedia || s->fATAPI)
    41724354                goto abort_cmd;
    41734355            s->cSectorsPerIRQ = 1;
    4174             ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);
     4356            ataR3StartTransfer(pDevIns, pCtl, s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);
    41754357            break;
    41764358        case ATA_READ_MULTIPLE_EXT:
     
    41784360            RT_FALL_THRU();
    41794361        case ATA_READ_MULTIPLE:
    4180             if (!s->pDrvMedia || !s->cMultSectors || s->fATAPI)
     4362            if (!pDevR3->pDrvMedia || !s->cMultSectors || s->fATAPI)
    41814363                goto abort_cmd;
    41824364            s->cSectorsPerIRQ = s->cMultSectors;
    4183             ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);
     4365            ataR3StartTransfer(pDevIns, pCtl, s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);
    41844366            break;
    41854367        case ATA_WRITE_MULTIPLE_EXT:
     
    41874369            RT_FALL_THRU();
    41884370        case ATA_WRITE_MULTIPLE:
    4189             if (!s->pDrvMedia || !s->cMultSectors || s->fATAPI)
     4371            if (!pDevR3->pDrvMedia || !s->cMultSectors || s->fATAPI)
    41904372                goto abort_cmd;
    41914373            s->cSectorsPerIRQ = s->cMultSectors;
    4192             ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);
     4374            ataR3StartTransfer(pDevIns, pCtl, s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);
    41934375            break;
    41944376        case ATA_READ_DMA_EXT:
     
    41974379        case ATA_READ_DMA:
    41984380        case ATA_READ_DMA_WITHOUT_RETRIES:
    4199             if (!s->pDrvMedia || s->fATAPI)
     4381            if (!pDevR3->pDrvMedia || s->fATAPI)
    42004382                goto abort_cmd;
    42014383            s->cSectorsPerIRQ = ATA_MAX_MULT_SECTORS;
    42024384            s->fDMA = true;
    4203             ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);
     4385            ataR3StartTransfer(pDevIns, pCtl, s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_READ_SECTORS, false);
    42044386            break;
    42054387        case ATA_WRITE_DMA_EXT:
     
    42084390        case ATA_WRITE_DMA:
    42094391        case ATA_WRITE_DMA_WITHOUT_RETRIES:
    4210             if (!s->pDrvMedia || s->fATAPI)
     4392            if (!pDevR3->pDrvMedia || s->fATAPI)
    42114393                goto abort_cmd;
    42124394            s->cSectorsPerIRQ = ATA_MAX_MULT_SECTORS;
    42134395            s->fDMA = true;
    4214             ataR3StartTransfer(s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);
     4396            ataR3StartTransfer(pDevIns, pCtl, s, ataR3GetNSectors(s) * s->cbSector, PDMMEDIATXDIR_TO_DEVICE, ATAFN_BT_READ_WRITE_SECTORS, ATAFN_SS_WRITE_SECTORS, false);
    42154397            break;
    42164398        case ATA_READ_NATIVE_MAX_ADDRESS_EXT:
    42174399            s->fLBA48 = true;
    42184400            ataR3SetSector(s, s->cTotalSectors - 1);
    4219             ataR3CmdOK(s, 0);
    4220             ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4401            ataR3CmdOK(pCtl, s, 0);
     4402            ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    42214403            break;
    42224404        case ATA_SEEK: /* Used by the SCO OpenServer. Command is marked as obsolete */
    4223             ataR3CmdOK(s, 0);
    4224             ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4405            ataR3CmdOK(pCtl, s, 0);
     4406            ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    42254407            break;
    42264408        case ATA_READ_NATIVE_MAX_ADDRESS:
    42274409            ataR3SetSector(s, RT_MIN(s->cTotalSectors, 1 << 28) - 1);
    4228             ataR3CmdOK(s, 0);
    4229             ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4410            ataR3CmdOK(pCtl, s, 0);
     4411            ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    42304412            break;
    42314413        case ATA_CHECK_POWER_MODE:
    42324414            s->uATARegNSector = 0xff; /* drive active or idle */
    4233             ataR3CmdOK(s, 0);
    4234             ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4415            ataR3CmdOK(pCtl, s, 0);
     4416            ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    42354417            break;
    42364418        case ATA_SET_FEATURES:
    42374419            Log2(("%s: feature=%#x\n", __FUNCTION__, s->uATARegFeature));
    4238             if (!s->pDrvMedia)
     4420            if (!pDevR3->pDrvMedia)
    42394421                goto abort_cmd;
    42404422            switch (s->uATARegFeature)
     
    42424424                case 0x02: /* write cache enable */
    42434425                    Log2(("%s: write cache enable\n", __FUNCTION__));
    4244                     ataR3CmdOK(s, ATA_STAT_SEEK);
    4245                     ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4426                    ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
     4427                    ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    42464428                    break;
    42474429                case 0xaa: /* read look-ahead enable */
    42484430                    Log2(("%s: read look-ahead enable\n", __FUNCTION__));
    4249                     ataR3CmdOK(s, ATA_STAT_SEEK);
    4250                     ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4431                    ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
     4432                    ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    42514433                    break;
    42524434                case 0x55: /* read look-ahead disable */
    42534435                    Log2(("%s: read look-ahead disable\n", __FUNCTION__));
    4254                     ataR3CmdOK(s, ATA_STAT_SEEK);
    4255                     ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4436                    ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
     4437                    ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    42564438                    break;
    42574439                case 0xcc: /* reverting to power-on defaults enable */
    42584440                    Log2(("%s: revert to power-on defaults enable\n", __FUNCTION__));
    4259                     ataR3CmdOK(s, ATA_STAT_SEEK);
    4260                     ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4441                    ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
     4442                    ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    42614443                    break;
    42624444                case 0x66: /* reverting to power-on defaults disable */
    42634445                    Log2(("%s: revert to power-on defaults disable\n", __FUNCTION__));
    4264                     ataR3CmdOK(s, ATA_STAT_SEEK);
    4265                     ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4446                    ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
     4447                    ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    42664448                    break;
    42674449                case 0x82: /* write cache disable */
     
    42694451                    /* As per the ATA/ATAPI-6 specs, a write cache disable
    42704452                     * command MUST flush the write buffers to disc. */
    4271                     ataR3StartTransfer(s, 0, PDMMEDIATXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_FLUSH, false);
     4453                    ataR3StartTransfer(pDevIns, pCtl, s, 0, PDMMEDIATXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_FLUSH, false);
    42724454                    break;
    42734455                case 0x03: { /* set transfer mode */
     
    42874469                            goto abort_cmd;
    42884470                    }
    4289                     ataR3CmdOK(s, ATA_STAT_SEEK);
    4290                     ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4471                    ataR3CmdOK(pCtl, s, ATA_STAT_SEEK);
     4472                    ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    42914473                    break;
    42924474                }
     
    43044486        case ATA_FLUSH_CACHE_EXT:
    43054487        case ATA_FLUSH_CACHE:
    4306             if (!s->pDrvMedia || s->fATAPI)
     4488            if (!pDevR3->pDrvMedia || s->fATAPI)
    43074489                goto abort_cmd;
    4308             ataR3StartTransfer(s, 0, PDMMEDIATXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_FLUSH, false);
     4490            ataR3StartTransfer(pDevIns, pCtl, s, 0, PDMMEDIATXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_FLUSH, false);
    43094491            break;
    43104492        case ATA_STANDBY_IMMEDIATE:
    4311             ataR3CmdOK(s, 0);
    4312             ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4493            ataR3CmdOK(pCtl, s, 0);
     4494            ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    43134495            break;
    43144496        case ATA_IDLE_IMMEDIATE:
    43154497            LogRel(("PIIX3 ATA: LUN#%d: aborting current command\n", s->iLUN));
    4316             ataR3AbortCurrentCommand(s, false);
     4498            ataR3AbortCurrentCommand(pDevIns, pCtl, s, false);
    43174499            break;
    43184500        case ATA_SLEEP:
    4319             ataR3CmdOK(s, 0);
    4320             ataHCSetIRQ(s);
     4501            ataR3CmdOK(pCtl, s, 0);
     4502            ataHCSetIRQ(pDevIns, pCtl, s);
    43214503            break;
    43224504            /* ATAPI commands */
    43234505        case ATA_IDENTIFY_PACKET_DEVICE:
    43244506            if (s->fATAPI)
    4325                 ataR3StartTransfer(s, 512, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_NULL, ATAFN_SS_ATAPI_IDENTIFY, false);
     4507                ataR3StartTransfer(pDevIns, pCtl, s, 512, PDMMEDIATXDIR_FROM_DEVICE, ATAFN_BT_NULL, ATAFN_SS_ATAPI_IDENTIFY, false);
    43264508            else
    43274509            {
    4328                 ataR3CmdError(s, ABRT_ERR);
    4329                 ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4510                ataR3CmdError(pCtl, s, ABRT_ERR);
     4511                ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    43304512            }
    43314513            break;
    43324514        case ATA_EXECUTE_DEVICE_DIAGNOSTIC:
    4333             ataR3StartTransfer(s, 0, PDMMEDIATXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_EXECUTE_DEVICE_DIAGNOSTIC, false);
     4515            ataR3StartTransfer(pDevIns, pCtl, s, 0, PDMMEDIATXDIR_NONE, ATAFN_BT_NULL, ATAFN_SS_EXECUTE_DEVICE_DIAGNOSTIC, false);
    43344516            break;
    43354517        case ATA_DEVICE_RESET:
     
    43374519                goto abort_cmd;
    43384520            LogRel(("PIIX3 ATA: LUN#%d: performing device RESET\n", s->iLUN));
    4339             ataR3AbortCurrentCommand(s, true);
     4521            ataR3AbortCurrentCommand(pDevIns, pCtl, s, true);
    43404522            break;
    43414523        case ATA_PACKET:
     
    43454527            if (s->uATARegFeature & 0x02)
    43464528                goto abort_cmd;
    4347             ataR3StartTransfer(s, ATAPI_PACKET_SIZE, PDMMEDIATXDIR_TO_DEVICE, ATAFN_BT_PACKET, ATAFN_SS_PACKET, false);
     4529            ataR3StartTransfer(pDevIns, pCtl, s, ATAPI_PACKET_SIZE, PDMMEDIATXDIR_TO_DEVICE, ATAFN_BT_PACKET, ATAFN_SS_PACKET, false);
    43484530            break;
    43494531        case ATA_DATA_SET_MANAGEMENT:
    4350             if (!s->pDrvMedia || !s->pDrvMedia->pfnDiscard)
     4532            if (!pDevR3->pDrvMedia || !pDevR3->pDrvMedia->pfnDiscard)
    43514533                goto abort_cmd;
    43524534            if (   !(s->uATARegFeature & UINT8_C(0x01))
     
    43544536                goto abort_cmd;
    43554537            s->fDMA = true;
    4356             ataR3StartTransfer(s, (s->uATARegNSectorHOB << 8 | s->uATARegNSector) * s->cbSector, PDMMEDIATXDIR_TO_DEVICE, ATAFN_BT_NULL, ATAFN_SS_TRIM, false);
     4538            ataR3StartTransfer(pDevIns, pCtl, s, (s->uATARegNSectorHOB << 8 | s->uATARegNSector) * s->cbSector, PDMMEDIATXDIR_TO_DEVICE, ATAFN_BT_NULL, ATAFN_SS_TRIM, false);
    43574539            break;
    43584540        default:
    43594541        abort_cmd:
    4360             ataR3CmdError(s, ABRT_ERR);
     4542            ataR3CmdError(pCtl, s, ABRT_ERR);
    43614543            if (s->fATAPI)
    4362                 ataUnsetStatus(s, ATA_STAT_READY);
    4363             ataHCSetIRQ(s); /* Shortcut, do not use AIO thread. */
     4544                ataUnsetStatus(pCtl, s, ATA_STAT_READY);
     4545            ataHCSetIRQ(pDevIns, pCtl, s); /* Shortcut, do not use AIO thread. */
    43644546            break;
    43654547    }
     
    43924574 */
    43934575
    4394 static VBOXSTRICTRC ataIOPortWriteU8(PATACONTROLLER pCtl, uint32_t addr, uint32_t val)
    4395 {
     4576static VBOXSTRICTRC ataIOPortWriteU8(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, uint32_t addr, uint32_t val, uintptr_t iCtl)
     4577{
     4578    RT_NOREF(iCtl);
    43964579    Log2(("%s: LUN#%d write addr=%#x val=%#04x\n", __FUNCTION__, pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK].iLUN, addr, val));
    43974580    addr &= 7;
     
    44464629            if (((val >> 4) & ATA_SELECTED_IF_MASK) != pCtl->iSelectedIf)
    44474630            {
    4448                 PPDMDEVINS pDevIns = CONTROLLER_2_DEVINS(pCtl);
    4449 
    44504631                /* select another drive */
    44514632                uintptr_t const iSelectedIf = (val >> 4) & ATA_SELECTED_IF_MASK;
     
    44864667            /* ignore commands to non-existent device */
    44874668            uintptr_t iSelectedIf = pCtl->iSelectedIf & ATA_SELECTED_IF_MASK;
    4488             if (iSelectedIf && !pCtl->aIfs[iSelectedIf].pDrvMedia)
     4669            PATADEVSTATE pDev = &pCtl->aIfs[iSelectedIf];
     4670            if (iSelectedIf && !pDev->fPresent) /** @todo r=bird the iSelectedIf test here looks bogus... explain. */
    44894671                break;
    44904672#ifndef IN_RING3
     
    44924674            return VINF_IOM_R3_IOPORT_WRITE;
    44934675#else /* IN_RING3 */
    4494             ataUnsetIRQ(&pCtl->aIfs[iSelectedIf]);
    4495             ataR3ParseCmd(&pCtl->aIfs[iSelectedIf], val);
     4676            PATASTATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATER3);
     4677            ataUnsetIRQ(pDevIns, pCtl, &pCtl->aIfs[iSelectedIf]);
     4678            ataR3ParseCmd(pDevIns, pCtl, &pCtl->aIfs[iSelectedIf], &pThisCC->aCts[iCtl].aIfs[iSelectedIf], val);
     4679            break;
    44964680#endif /* !IN_RING3 */
    44974681        }
     
    45014685
    45024686
    4503 static VBOXSTRICTRC ataIOPortReadU8(PATACONTROLLER pCtl, uint32_t addr, uint32_t *pu32)
     4687static VBOXSTRICTRC ataIOPortReadU8(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, uint32_t addr, uint32_t *pu32)
    45044688{
    45054689    ATADevState *s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK];
     
    45084692
    45094693    /* Check if the guest is reading from a non-existent device. */
    4510     if (RT_UNLIKELY(!s->pDrvMedia))
     4694    if (RT_LIKELY(s->fPresent))
     4695    { /* likely */ }
     4696    else
    45114697    {
    45124698        if (pCtl->iSelectedIf)  /* Device 1 selected, Device 0 responding for it. */
    45134699        {
    4514             Assert(pCtl->aIfs[0].pDrvMedia);
     4700            Assert(pCtl->aIfs[0].fPresent);
    45154701
    45164702            /* When an ATAPI device 0 responds for non-present device 1, it generally
     
    45184704             * table 16 in ATA-6 specification.
    45194705             */
    4520             if (((addr & 7) != 1) && pCtl->aIfs[0].fATAPI) {
     4706            if (((addr & 7) != 1) && pCtl->aIfs[0].fATAPI)
     4707            {
    45214708                Log2(("%s: addr=%#x, val=0: LUN#%d not attached/LUN#%d ATAPI\n", __FUNCTION__, addr, s->iLUN, pCtl->aIfs[0].iLUN));
    45224709                *pu32 = 0;
     
    45364723        }
    45374724    }
     4725
    45384726    fHOB = !!(s->uATARegDevCtl & (1 << 7));
    45394727    switch (addr & 7)
     
    45484736             * the feature register (write-only), so it seems that it's not
    45494737             * necessary to support the usual HOB readback here. */
    4550             if (!s->pDrvMedia)
     4738            if (!s->fPresent)
    45514739                val = 0;
    45524740            else
     
    45814769             * one drive attached to the controller. It is common between
    45824770             * both drives anyway (completely identical content). */
    4583             if (!pCtl->aIfs[0].pDrvMedia && !pCtl->aIfs[1].pDrvMedia)
     4771            if (!pCtl->aIfs[0].fPresent && !pCtl->aIfs[1].fPresent)
    45844772                val = 0;
    45854773            else
     
    45894777        case 7: /* primary status */
    45904778        {
    4591             if (!s->pDrvMedia)
     4779            if (!s->fPresent)
    45924780                val = 0;
    45934781            else
     
    46094797                            || pCtl->fReset;
    46104798
    4611                 ataR3LockLeave(pCtl);
     4799                ataR3LockLeave(pDevIns, pCtl);
    46124800
    46134801                /*
     
    46314819                        pCtl->u64ResetTime = u64ResetTimeStop;
    46324820# ifndef RT_OS_WINDOWS /* We've got this API on windows, but it doesn't necessarily interrupt I/O. */
    4633                         RTThreadPoke(pCtl->AsyncIOThread);
     4821                        PATASTATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATER3);
     4822                        PATACONTROLLERR3 pCtlR3 = &pThisCC->aCts[pCtl->iCtl % RT_ELEMENTS(pThisCC->aCts)];
     4823                        RTThreadPoke(pCtlR3->hAsyncIOThread);
    46344824# endif
    46354825                        Assert(fYield);
     
    46454835                ASMNopPause();
    46464836
    4647                 ataR3LockEnter(pCtl);
     4837                ataR3LockEnter(pDevIns, pCtl);
    46484838
    46494839                val = s->uATARegStatus;
     
    46654855                s->cBusyStatusHackR3 = 0;
    46664856            }
    4667             ataUnsetIRQ(s);
     4857            ataUnsetIRQ(pDevIns, pCtl, s);
    46684858            break;
    46694859        }
     
    46824872    ATADevState *s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK];
    46834873    uint32_t val;
    4684     RT_NOREF1(uIoPortForLog);
    4685 
    4686     Assert(pCtl->aIfs[0].pDrvMedia || pCtl->aIfs[1].pDrvMedia); /* Channel must not be empty. */
    4687     if (pCtl->iSelectedIf == 1 && !s->pDrvMedia)
     4874    RT_NOREF(uIoPortForLog);
     4875
     4876    Assert(pCtl->aIfs[0].fPresent || pCtl->aIfs[1].fPresent); /* Channel must not be empty. */
     4877    if (pCtl->iSelectedIf == 1 && !s->fPresent)
    46884878        val = 0;    /* Device 1 selected, Device 0 responding for it. */
    46894879    else
     
    46934883}
    46944884
    4695 static int ataControlWrite(PATACONTROLLER pCtl, uint32_t val, uint32_t uIoPortForLog)
    4696 {
    4697     RT_NOREF1(uIoPortForLog);
     4885static int ataControlWrite(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, uint32_t val, uint32_t uIoPortForLog)
     4886{
     4887    RT_NOREF(uIoPortForLog);
    46984888#ifndef IN_RING3
    46994889    if ((val ^ pCtl->aIfs[0].uATARegDevCtl) & ATA_DEVCTL_RESET)
     
    47164906            uCmdWait1 = (uNow - pCtl->aIfs[1].u64CmdTS) / 1000;
    47174907        LogRel(("PIIX3 ATA: Ctl#%d: RESET, DevSel=%d AIOIf=%d CmdIf0=%#04x (%d usec ago) CmdIf1=%#04x (%d usec ago)\n",
    4718                 ATACONTROLLER_IDX(pCtl), pCtl->iSelectedIf, pCtl->iAIOIf,
     4908                pCtl->iCtl, pCtl->iSelectedIf, pCtl->iAIOIf,
    47194909                pCtl->aIfs[0].uATARegCommand, uCmdWait0,
    47204910                pCtl->aIfs[1].uATARegCommand, uCmdWait1));
     
    47264916        for (uint32_t i = 0; i < RT_ELEMENTS(pCtl->aIfs); i++)
    47274917        {
    4728             ataR3ResetDevice(&pCtl->aIfs[i]);
     4918            ataR3ResetDevice(pDevIns, pCtl, &pCtl->aIfs[i]);
    47294919            /* The following cannot be done using ataSetStatusValue() since the
    47304920             * reset flag is already set, which suppresses all status changes. */
     
    47344924        }
    47354925        pCtl->iSelectedIf = 0;
    4736         ataR3AsyncIOClearRequests(pCtl);
    4737         Log2(("%s: Ctl#%d: message to async I/O thread, resetA\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
     4926        ataR3AsyncIOClearRequests(pDevIns, pCtl);
     4927        Log2(("%s: Ctl#%d: message to async I/O thread, resetA\n", __FUNCTION__, pCtl->iCtl));
    47384928        if (val & ATA_DEVCTL_HOB)
    47394929        {
     
    47464936
    47474937        /* Issue the reset request now. */
    4748         ataHCAsyncIOPutRequest(pCtl, &g_ataResetARequest);
     4938        ataHCAsyncIOPutRequest(pDevIns, pCtl, &g_ataResetARequest);
    47494939#else /* !IN_RING3 */
    47504940        AssertMsgFailed(("RESET handling is too complicated for GC\n"));
     
    47574947        /* Software RESET high to low */
    47584948        Log(("%s: deasserting RESET\n", __FUNCTION__));
    4759         Log2(("%s: Ctl#%d: message to async I/O thread, resetC\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
     4949        Log2(("%s: Ctl#%d: message to async I/O thread, resetC\n", __FUNCTION__, pCtl->iCtl));
    47604950        if (val & ATA_DEVCTL_HOB)
    47614951        {
     
    47634953            Log2(("%s: ignored setting HOB\n", __FUNCTION__));
    47644954        }
    4765         ataHCAsyncIOPutRequest(pCtl, &g_ataResetCRequest);
     4955        ataHCAsyncIOPutRequest(pDevIns, pCtl, &g_ataResetCRequest);
    47664956#else /* !IN_RING3 */
    47674957        AssertMsgFailed(("RESET handling is too complicated for GC\n"));
     
    47824972            pCtl->BmDma.u8Status |= BM_STATUS_INT;
    47834973            if (pCtl->irq == 16)
    4784                 PDMDevHlpPCISetIrq(CONTROLLER_2_DEVINS(pCtl), 0, 1);
     4974                PDMDevHlpPCISetIrq(pDevIns, 0, 1);
    47854975            else
    4786                 PDMDevHlpISASetIrq(CONTROLLER_2_DEVINS(pCtl), pCtl->irq, 1);
     4976                PDMDevHlpISASetIrq(pDevIns, pCtl->irq, 1);
    47874977        }
    47884978        else
     
    47904980            Log2(("%s: LUN#%d deasserting IRQ (interrupt disable change)\n", __FUNCTION__, pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK].iLUN));
    47914981            if (pCtl->irq == 16)
    4792                 PDMDevHlpPCISetIrq(CONTROLLER_2_DEVINS(pCtl), 0, 0);
     4982                PDMDevHlpPCISetIrq(pDevIns, 0, 0);
    47934983            else
    4794                 PDMDevHlpISASetIrq(CONTROLLER_2_DEVINS(pCtl), pCtl->irq, 0);
     4984                PDMDevHlpISASetIrq(pDevIns, pCtl->irq, 0);
    47954985        }
    47964986    }
     
    48074997#if defined(IN_RING0) || defined(IN_RING3)
    48084998
    4809 static void ataHCPIOTransfer(PATACONTROLLER pCtl)
     4999static void ataHCPIOTransfer(PPDMDEVINS pDevIns, PATACONTROLLER pCtl)
    48105000{
    48115001    ATADevState *s;
     
    48285018        {
    48295019            bool fRedo;
    4830             uint8_t status = s->uATARegStatus;
    4831             ataSetStatusValue(s, ATA_STAT_BUSY);
     5020            uint8_t        status  = s->uATARegStatus;
     5021            PATASTATER3    pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATER3);
     5022            PATADEVSTATER3 pDevR3  = &pThisCC->aCts[pCtl->iCtl % RT_ELEMENTS(pThisCC->aCts)].aIfs[s->iDev % RT_ELEMENTS(pThisCC->aCts[0].aIfs)];
     5023
     5024            ataSetStatusValue(pCtl, s, ATA_STAT_BUSY);
    48325025            Log2(("%s: calling source/sink function\n", __FUNCTION__));
    4833             fRedo = g_apfnSourceSinkFuncs[iSourceSink](s);
     5026            fRedo = g_apfnSourceSinkFuncs[iSourceSink](pDevIns, pCtl, s, pDevR3);
    48345027            pCtl->fRedo = fRedo;
    48355028            if (RT_UNLIKELY(fRedo))
    48365029                return;
    4837             ataSetStatusValue(s, status);
     5030            ataSetStatusValue(pCtl, s, status);
    48385031            s->iIOBufferCur = 0;
    48395032            s->iIOBufferEnd = s->cbElementaryTransfer;
     
    48575050              s->cbTotalTransfer, s->cbElementaryTransfer,
    48585051              s->iIOBufferCur, s->iIOBufferEnd));
    4859         ataHCPIOTransferStart(s, s->iIOBufferCur, s->cbElementaryTransfer);
     5052        ataHCPIOTransferStart(pCtl, s, s->iIOBufferCur, s->cbElementaryTransfer);
    48605053        s->cbTotalTransfer -= s->cbElementaryTransfer;
    48615054        s->iIOBufferCur += s->cbElementaryTransfer;
     
    48655058    }
    48665059    else
    4867         ataHCPIOTransferStop(s);
    4868 }
    4869 
    4870 
    4871 DECLINLINE(void) ataHCPIOTransferFinish(PATACONTROLLER pCtl, ATADevState *s)
     5060        ataHCPIOTransferStop(pDevIns, pCtl, s);
     5061}
     5062
     5063
     5064DECLINLINE(void) ataHCPIOTransferFinish(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s)
    48725065{
    48735066    /* Do not interfere with RESET processing if the PIO transfer finishes
     
    48755068    if (pCtl->fReset)
    48765069    {
    4877         Log2(("%s: Ctl#%d: suppressed continuing PIO transfer as RESET is active\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
     5070        Log2(("%s: Ctl#%d: suppressed continuing PIO transfer as RESET is active\n", __FUNCTION__, pCtl->iCtl));
    48785071        return;
    48795072    }
     
    48865079         * the case for write operations or generally for not yet finished
    48875080         * transfers (some data might need to be read). */
    4888         ataSetStatus(s, ATA_STAT_BUSY);
    4889         ataUnsetStatus(s, ATA_STAT_READY | ATA_STAT_DRQ);
    4890 
    4891         Log2(("%s: Ctl#%d: message to async I/O thread, continuing PIO transfer\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
    4892         ataHCAsyncIOPutRequest(pCtl, &g_ataPIORequest);
     5081        ataSetStatus(pCtl, s, ATA_STAT_BUSY);
     5082        ataUnsetStatus(pCtl, s, ATA_STAT_READY | ATA_STAT_DRQ);
     5083
     5084        Log2(("%s: Ctl#%d: message to async I/O thread, continuing PIO transfer\n", __FUNCTION__, pCtl->iCtl));
     5085        ataHCAsyncIOPutRequest(pDevIns, pCtl, &g_ataPIORequest);
    48935086    }
    48945087    else
     
    48985091
    48995092        /* Continue a previously started transfer. */
    4900         ataUnsetStatus(s, ATA_STAT_DRQ);
    4901         ataSetStatus(s, ATA_STAT_READY);
     5093        ataUnsetStatus(pCtl, s, ATA_STAT_DRQ);
     5094        ataSetStatus(pCtl, s, ATA_STAT_READY);
    49025095
    49035096        if (s->cbTotalTransfer)
     
    49055098            /* There is more to transfer, happens usually for large ATAPI
    49065099             * reads - the protocol limits the chunk size to 65534 bytes. */
    4907             ataHCPIOTransfer(pCtl);
    4908             ataHCSetIRQ(s);
     5100            ataHCPIOTransfer(pDevIns, pCtl);
     5101            ataHCSetIRQ(pDevIns, pCtl, s);
    49095102        }
    49105103        else
    49115104        {
    4912             Log2(("%s: Ctl#%d: skipping message to async I/O thread, ending PIO transfer\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
     5105            Log2(("%s: Ctl#%d: skipping message to async I/O thread, ending PIO transfer\n", __FUNCTION__, pCtl->iCtl));
    49135106            /* Finish PIO transfer. */
    4914             ataHCPIOTransfer(pCtl);
     5107            ataHCPIOTransfer(pDevIns, pCtl);
    49155108            Assert(!pCtl->fRedo);
    49165109        }
     
    50105203    PCIATAState   *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    50115204    PATACONTROLLER pCtl  = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)];
    5012     RT_NOREF1(offPort);
     5205    RT_NOREF(offPort);
    50135206
    50145207    Assert((uintptr_t)pvUser < 2);
     
    50165209    Assert(cb == 2 || cb == 4); /* Writes to the data port may be 16-bit or 32-bit. */
    50175210
    5018     VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_IOM_R3_IOPORT_WRITE);
     5211    VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_IOM_R3_IOPORT_WRITE);
    50195212    if (rc == VINF_SUCCESS)
    50205213    {
     
    50455238            {
    50465239                ataCopyPioData124(s, pbDst, pbSrc, iIOBufferPIODataStart, cb);
    5047                 ataHCPIOTransferFinish(pCtl, s);
     5240                ataHCPIOTransferFinish(pDevIns, pCtl, s);
    50485241            }
    50495242            else
     
    50565249            ataCopyPioData124(s, pbDst, pbSrc, iIOBufferPIODataStart, cb);
    50575250            if (s->iIOBufferPIODataStart >= iIOBufferPIODataEnd)
    5058                 ataHCPIOTransferFinish(pCtl, s);
     5251                ataHCPIOTransferFinish(pDevIns, pCtl, s);
    50595252#endif /* IN_RING 3*/
    50605253        }
     
    50635256
    50645257        Log3(("%s: addr=%#x val=%.*Rhxs rc=%d\n", __FUNCTION__, offPort + pCtl->IOPortBase1, cb, &u32, VBOXSTRICTRC_VAL(rc)));
    5065         PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     5258        PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    50665259    }
    50675260    else
     
    50815274    PCIATAState   *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    50825275    PATACONTROLLER pCtl  = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)];
    5083     RT_NOREF1(offPort);
     5276    RT_NOREF(offPort);
    50845277
    50855278    Assert((uintptr_t)pvUser < 2);
     
    50925285    *pu32 = 0;
    50935286
    5094     VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_IOM_R3_IOPORT_READ);
     5287    VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_IOM_R3_IOPORT_READ);
    50955288    if (rc == VINF_SUCCESS)
    50965289    {
     
    51255318            {
    51265319                ataCopyPioData124(s, pbDst, pbSrc, iIOBufferPIODataStart, cbActual);
    5127                 ataHCPIOTransferFinish(pCtl, s);
     5320                ataHCPIOTransferFinish(pDevIns, pCtl, s);
    51285321            }
    51295322            else
     
    51365329            ataCopyPioData124(s, pbDst, pbSrc, iIOBufferPIODataStart, cbActual);
    51375330            if (s->iIOBufferPIODataStart >= iIOBufferPIODataEnd)
    5138                 ataHCPIOTransferFinish(pCtl, s);
     5331                ataHCPIOTransferFinish(pDevIns, pCtl, s);
    51395332#endif /* IN_RING3 */
    51405333
     
    51505343        Log3(("%s: addr=%#x val=%.*Rhxs rc=%d\n", __FUNCTION__, offPort, cb, pu32, VBOXSTRICTRC_VAL(rc)));
    51515344
    5152         PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     5345        PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    51535346    }
    51545347    else
     
    51695362    PCIATAState   *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    51705363    PATACONTROLLER pCtl  = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)];
    5171     RT_NOREF1(offPort);
     5364    RT_NOREF(offPort);
    51725365
    51735366    Assert((uintptr_t)pvUser < 2);
     
    51785371    if (cb == 2 || cb == 4)
    51795372    {
    5180         rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_IOM_R3_IOPORT_READ);
     5373        rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_IOM_R3_IOPORT_READ);
    51815374        if (rc == VINF_SUCCESS)
    51825375        {
     
    52175410#ifdef IN_RING3
    52185411                    if (offEndThisXfer >= offEnd)
    5219                         ataHCPIOTransferFinish(pCtl, s);
     5412                        ataHCPIOTransferFinish(pDevIns, pCtl, s);
    52205413#endif
    52215414                    *pcTransfers = cRequested - cAvailable;
     
    52345427            }
    52355428
    5236             PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     5429            PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    52375430        }
    52385431    }
     
    52605453    PCIATAState   *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    52615454    PATACONTROLLER pCtl  = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)];
    5262     RT_NOREF1(offPort);
     5455    RT_NOREF(offPort);
    52635456
    52645457    Assert((uintptr_t)pvUser < 2);
     
    52695462    if (cb == 2 || cb == 4)
    52705463    {
    5271         rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_IOM_R3_IOPORT_WRITE);
     5464        rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_IOM_R3_IOPORT_WRITE);
    52725465        if (rc == VINF_SUCCESS)
    52735466        {
     
    53075500#ifdef IN_RING3
    53085501                    if (offEndThisXfer >= offEnd)
    5309                         ataHCPIOTransferFinish(pCtl, s);
     5502                        ataHCPIOTransferFinish(pDevIns, pCtl, s);
    53105503#endif
    53115504                    *pcTransfers = cRequested - cAvailable;
     
    53205513            }
    53215514
    5322             PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     5515            PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    53235516        }
    53245517    }
     
    53555548 * @param pCtl      Controller for which to perform the transfer.
    53565549 */
    5357 static void ataR3DMATransfer(PATACONTROLLER pCtl)
    5358 {
    5359     PPDMDEVINS pDevIns = CONTROLLER_2_DEVINS(pCtl);
    5360     ATADevState *s = &pCtl->aIfs[pCtl->iAIOIf & ATA_SELECTED_IF_MASK];
     5550static void ataR3DMATransfer(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATACONTROLLERR3 pCtlR3)
     5551{
     5552    uint8_t const   iAIOIf = pCtl->iAIOIf & ATA_SELECTED_IF_MASK;
     5553    PATADEVSTATE    s      = &pCtl->aIfs[iAIOIf];
     5554    PATADEVSTATER3  pDevR3 = &pCtlR3->aIfs[iAIOIf];
    53615555    bool fRedo;
    53625556    RTGCPHYS32 GCPhysDesc;
     
    53805574     * necessary. This avoids long freezes should the guest access the
    53815575     * ATA registers etc. for some reason. */
    5382     ataR3LockLeave(pCtl);
     5576    ataR3LockLeave(pDevIns, pCtl);
    53835577
    53845578    Log2(("%s: %s tx_size=%d elem_tx_size=%d index=%d end=%d\n",
     
    54395633                    cbElementaryTransfer = cbTotalTransfer;
    54405634
    5441                 ataR3LockEnter(pCtl);
     5635                ataR3LockEnter(pDevIns, pCtl);
    54425636
    54435637                /* The RESET handler could have cleared the DMA transfer
     
    54545648                    s->cbTotalTransfer = cbTotalTransfer;
    54555649                    Log2(("%s: calling source/sink function\n", __FUNCTION__));
    5456                     fRedo = g_apfnSourceSinkFuncs[iSourceSink](s);
     5650                    fRedo = g_apfnSourceSinkFuncs[iSourceSink](pDevIns, pCtl, s, pDevR3);
    54575651                    if (RT_UNLIKELY(fRedo))
    54585652                    {
     
    54815675                }
    54825676
    5483                 ataR3LockLeave(pCtl);
     5677                ataR3LockLeave(pDevIns, pCtl);
    54845678                if (RT_UNLIKELY(fRedo))
    54855679                    break;
     
    54945688            break;
    54955689
    5496         ataR3LockEnter(pCtl);
     5690        ataR3LockEnter(pDevIns, pCtl);
    54975691
    54985692        if (!(pCtl->BmDma.u8Cmd & BM_CMD_START) || pCtl->fReset)
    54995693        {
    5500             LogRel(("PIIX3 ATA: Ctl#%d: ABORT DMA%s\n", ATACONTROLLER_IDX(pCtl), pCtl->fReset ? " due to RESET" : ""));
     5694            LogRel(("PIIX3 ATA: Ctl#%d: ABORT DMA%s\n", pCtl->iCtl, pCtl->fReset ? " due to RESET" : ""));
    55015695            if (!pCtl->fReset)
    55025696                ataR3DMATransferStop(s);
     
    55055699        }
    55065700
    5507         ataR3LockLeave(pCtl);
    5508     }
    5509 
    5510     ataR3LockEnter(pCtl);
     5701        ataR3LockLeave(pDevIns, pCtl);
     5702    }
     5703
     5704    ataR3LockEnter(pDevIns, pCtl);
    55115705    if (RT_UNLIKELY(fRedo))
    55125706        return;
     
    55235717 * Signal PDM that we're idle (if we actually are).
    55245718 *
    5525  * @param   pCtl        The controller.
    5526  */
    5527 static void ataR3AsyncSignalIdle(PATACONTROLLER pCtl)
     5719 * @param   pDevIns     The device instance.
     5720 * @param   pCtl        The shared controller state.
     5721 * @param   pCtlR3      The ring-3 controller state.
     5722 */
     5723static void ataR3AsyncSignalIdle(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATACONTROLLERR3 pCtlR3)
    55285724{
    55295725    /*
     
    55315727     * unnecessary work and racing ataR3WaitForAsyncIOIsIdle.
    55325728     */
    5533     int rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock, VINF_SUCCESS);
     5729    int rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->AsyncIORequestLock, VINF_SUCCESS);
    55345730    AssertRC(rc);
    55355731
    5536     if (    pCtl->fSignalIdle
    5537         &&  ataR3AsyncIOIsIdle(pCtl, false /*fStrict*/))
    5538     {
    5539         PDMDevHlpAsyncNotificationCompleted(pCtl->pDevInsR3);
    5540         RTThreadUserSignal(pCtl->AsyncIOThread); /* for ataR3Construct/ataR3ResetCommon. */
    5541     }
    5542 
    5543     rc = PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->AsyncIORequestLock);
     5732    if (    pCtlR3->fSignalIdle
     5733        &&  ataR3AsyncIOIsIdle(pDevIns, pCtl, false /*fStrict*/))
     5734    {
     5735        PDMDevHlpAsyncNotificationCompleted(pDevIns);
     5736        RTThreadUserSignal(pCtlR3->hAsyncIOThread); /* for ataR3Construct/ataR3ResetCommon. */
     5737    }
     5738
     5739    rc = PDMDevHlpCritSectLeave(pDevIns, &pCtl->AsyncIORequestLock);
    55445740    AssertRC(rc);
    55455741}
     
    55555751static DECLCALLBACK(int) ataR3AsyncIOThread(RTTHREAD hThreadSelf, void *pvUser)
    55565752{
    5557     RT_NOREF1(hThreadSelf);
    5558     const ATARequest *pReq;
    5559     uint64_t        u64TS   = 0; /* shut up gcc */
    5560     uint64_t        uWait;
    5561     PATACONTROLLER  pCtl    = (PATACONTROLLER)pvUser;
    5562     PPDMDEVINSR3    pDevIns = pCtl->CTX_SUFF(pDevIns);
    5563     int             rc      = VINF_SUCCESS;
    5564     ATADevState     *s;
     5753    PATACONTROLLERR3 const  pCtlR3  = (PATACONTROLLERR3)pvUser;
     5754    PPDMDEVINSR3 const      pDevIns = pCtlR3->pDevIns;
     5755    PATASTATE const         pThis   = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
     5756    PATASTATER3 const       pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATER3);
     5757    uintptr_t const         iCtl    = pCtlR3 - &pThisCC->aCts[0];
     5758    PATACONTROLLER const    pCtl    = &pThis->aCts[iCtl % RT_ELEMENTS(pThisCC->aCts)];
     5759    int                     rc      = VINF_SUCCESS;
     5760    uint64_t                u64TS   = 0; /* shut up gcc */
     5761    uint64_t                uWait;
     5762    const ATARequest       *pReq;
     5763    RT_NOREF(hThreadSelf);
     5764    Assert(pCtl->iCtl == pCtlR3->iCtl);
    55655765
    55665766    pReq = NULL;
    55675767    pCtl->fChainedTransfer = false;
    5568     while (!pCtl->fShutdown)
     5768    while (!pCtlR3->fShutdown)
    55695769    {
    55705770        /* Keep this thread from doing anything as long as EMT is suspended. */
    55715771        while (pCtl->fRedoIdle)
    55725772        {
    5573             if (pCtl->fSignalIdle)
    5574                 ataR3AsyncSignalIdle(pCtl);
    5575             rc = RTSemEventWait(pCtl->SuspendIOSem, RT_INDEFINITE_WAIT);
     5773            if (pCtlR3->fSignalIdle)
     5774                ataR3AsyncSignalIdle(pDevIns, pCtl, pCtlR3);
     5775            rc = RTSemEventWait(pCtlR3->hSuspendIOSem, RT_INDEFINITE_WAIT);
    55765776            /* Continue if we got a signal by RTThreadPoke().
    55775777             * We will get notified if there is a request to process.
     
    55795779            if (RT_UNLIKELY(rc == VERR_INTERRUPTED))
    55805780                continue;
    5581             if (RT_FAILURE(rc) || pCtl->fShutdown)
     5781            if (RT_FAILURE(rc) || pCtlR3->fShutdown)
    55825782                break;
    55835783
     
    55885788        while (pReq == NULL)
    55895789        {
    5590             if (pCtl->fSignalIdle)
    5591                 ataR3AsyncSignalIdle(pCtl);
     5790            if (pCtlR3->fSignalIdle)
     5791                ataR3AsyncSignalIdle(pDevIns, pCtl, pCtlR3);
    55925792            rc = PDMDevHlpSUPSemEventWaitNoResume(pDevIns, pCtl->hAsyncIOSem, RT_INDEFINITE_WAIT);
    55935793            /* Continue if we got a signal by RTThreadPoke().
     
    55965796            if (RT_UNLIKELY(rc == VERR_INTERRUPTED))
    55975797                continue;
    5598             if (RT_FAILURE(rc) || RT_UNLIKELY(pCtl->fShutdown))
     5798            if (RT_FAILURE(rc) || RT_UNLIKELY(pCtlR3->fShutdown))
    55995799                break;
    56005800
    5601             pReq = ataR3AsyncIOGetCurrentRequest(pCtl);
    5602         }
    5603 
    5604         if (RT_FAILURE(rc) || pCtl->fShutdown)
     5801            pReq = ataR3AsyncIOGetCurrentRequest(pDevIns, pCtl);
     5802        }
     5803
     5804        if (RT_FAILURE(rc) || pCtlR3->fShutdown)
    56055805            break;
    56065806
     
    56105810        ATAAIO ReqType = pReq->ReqType;
    56115811
    5612         Log2(("%s: Ctl#%d: state=%d, req=%d\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), pCtl->uAsyncIOState, ReqType));
     5812        Log2(("%s: Ctl#%d: state=%d, req=%d\n", __FUNCTION__, pCtl->iCtl, pCtl->uAsyncIOState, ReqType));
    56135813        if (pCtl->uAsyncIOState != ReqType)
    56145814        {
     
    56205820            {
    56215821                /* Incorrect sequence of PIO/DMA states. Dump request queue. */
    5622                 ataR3AsyncIODumpRequests(pCtl);
     5822                ataR3AsyncIODumpRequests(pDevIns, pCtl);
    56235823            }
    56245824            AssertReleaseMsg(   ReqType == ATA_AIO_RESET_ASSERTED
     
    56305830
    56315831        /* Do our work.  */
    5632         ataR3LockEnter(pCtl);
     5832        ataR3LockEnter(pDevIns, pCtl);
    56335833
    56345834        if (pCtl->uAsyncIOState == ATA_AIO_NEW && !pCtl->fChainedTransfer)
     
    56445844            case ATA_AIO_NEW:
    56455845            {
    5646                 pCtl->iAIOIf = pReq->u.t.iIf;
    5647                 s = &pCtl->aIfs[pCtl->iAIOIf & ATA_SELECTED_IF_MASK];
     5846                uint8_t const iIf = pReq->u.t.iIf & ATA_SELECTED_IF_MASK;
     5847                pCtl->iAIOIf = iIf;
     5848                PATADEVSTATE   s      = &pCtl->aIfs[iIf];
     5849                PATADEVSTATER3 pDevR3 = &pCtlR3->aIfs[iIf];
     5850
    56485851                s->cbTotalTransfer = pReq->u.t.cbTotalTransfer;
    56495852                s->uTxDir = pReq->u.t.uTxDir;
     
    56795882                    && iBeginTransfer < RT_ELEMENTS(g_apfnBeginTransFuncs))
    56805883                {
    5681                     Log2(("%s: Ctl#%d: calling begin transfer function\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
    5682                     g_apfnBeginTransFuncs[iBeginTransfer](s);
     5884                    Log2(("%s: Ctl#%d: calling begin transfer function\n", __FUNCTION__, pCtl->iCtl));
     5885                    g_apfnBeginTransFuncs[iBeginTransfer](pCtl, s);
    56835886                    s->iBeginTransfer = ATAFN_BT_NULL;
    56845887                    if (s->uTxDir != PDMMEDIATXDIR_FROM_DEVICE)
     
    57005903                    {
    57015904                        bool fRedo;
    5702                         Log2(("%s: Ctl#%d: calling source/sink function\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
    5703                         fRedo = g_apfnSourceSinkFuncs[iSourceSink](s);
     5905                        Log2(("%s: Ctl#%d: calling source/sink function\n", __FUNCTION__, pCtl->iCtl));
     5906                        fRedo = g_apfnSourceSinkFuncs[iSourceSink](pDevIns, pCtl, s, pDevR3);
    57045907                        pCtl->fRedo = fRedo;
    57055908                        if (RT_UNLIKELY(fRedo && !pCtl->fReset))
     
    57085911                             * everything from scratch by resending the current
    57095912                             * request. Occurs very rarely, not worth optimizing. */
    5710                             LogRel(("%s: Ctl#%d: redo entire operation\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
    5711                             ataHCAsyncIOPutRequest(pCtl, pReq);
     5913                            LogRel(("%s: Ctl#%d: redo entire operation\n", __FUNCTION__, pCtl->iCtl));
     5914                            ataHCAsyncIOPutRequest(pDevIns, pCtl, pReq);
    57125915                            break;
    57135916                        }
     
    57165919                    {
    57175920                        Assert(iSourceSink == ATAFN_SS_NULL);
    5718                         ataR3CmdOK(s, 0);
     5921                        ataR3CmdOK(pCtl, s, 0);
    57195922                    }
    57205923                    s->iIOBufferEnd = s->cbElementaryTransfer;
     
    57335936                    if (s->cbTotalTransfer)
    57345937                    {
    5735                         ataSetStatus(s, ATA_STAT_DRQ);
     5938                        ataSetStatus(pCtl, s, ATA_STAT_DRQ);
    57365939
    57375940                        pCtl->uAsyncIOState = ATA_AIO_DMA;
     
    57395942                        if (pCtl->BmDma.u8Cmd & BM_CMD_START)
    57405943                        {
    5741                             Log2(("%s: Ctl#%d: message to async I/O thread, continuing DMA transfer immediately\n",
    5742                                   __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
    5743                             ataHCAsyncIOPutRequest(pCtl, &g_ataDMARequest);
     5944                            Log2(("%s: Ctl#%d: message to async I/O thread, continuing DMA transfer immediately\n", __FUNCTION__, pCtl->iCtl));
     5945                            ataHCAsyncIOPutRequest(pDevIns, pCtl, &g_ataDMARequest);
    57445946                        }
    57455947                    }
     
    57495951                        /* Finish DMA transfer. */
    57505952                        ataR3DMATransferStop(s);
    5751                         ataHCSetIRQ(s);
     5953                        ataHCSetIRQ(pDevIns, pCtl, s);
    57525954                        pCtl->uAsyncIOState = ATA_AIO_NEW;
    57535955                    }
     
    57575959                    if (s->cbTotalTransfer)
    57585960                    {
    5759                         ataHCPIOTransfer(pCtl);
     5961                        ataHCPIOTransfer(pDevIns, pCtl);
    57605962                        Assert(!pCtl->fRedo);
    57615963                        if (s->fATAPITransfer || s->uTxDir != PDMMEDIATXDIR_TO_DEVICE)
    5762                             ataHCSetIRQ(s);
     5964                            ataHCSetIRQ(pDevIns, pCtl, s);
    57635965
    57645966                        if (s->uTxDir == PDMMEDIATXDIR_TO_DEVICE || s->iSourceSink != ATAFN_SS_NULL)
     
    57855987                        Assert(s->uTxDir == PDMMEDIATXDIR_NONE); /* Any transfer which has an initial transfer size of 0 must be marked as such. */
    57865988                        /* Finish PIO transfer. */
    5787                         ataHCPIOTransfer(pCtl);
     5989                        ataHCPIOTransfer(pDevIns, pCtl);
    57885990                        Assert(!pCtl->fRedo);
    57895991                        if (!s->fATAPITransfer)
    5790                             ataHCSetIRQ(s);
     5992                            ataHCSetIRQ(pDevIns, pCtl, s);
    57915993                        pCtl->uAsyncIOState = ATA_AIO_NEW;
    57925994                    }
     
    57975999            case ATA_AIO_DMA:
    57986000            {
    5799                 BMDMAState *bm = &pCtl->BmDma;
    5800                 s = &pCtl->aIfs[pCtl->iAIOIf & ATA_SELECTED_IF_MASK]; /* Do not remove or there's an instant crash after loading the saved state */
     6001                BMDMAState   *bm = &pCtl->BmDma;
     6002                PATADEVSTATE  s  = &pCtl->aIfs[pCtl->iAIOIf & ATA_SELECTED_IF_MASK];
    58016003                ATAFNSS iOriginalSourceSink = (ATAFNSS)s->iSourceSink; /* Used by the hack below, but gets reset by then. */
    58026004
     
    58136015                    pCtl->GCPhysLastDMADesc = RT_ALIGN_32(bm->GCPhysAddr + 1, _4K) - sizeof(BMDMADesc);
    58146016                }
    5815                 ataR3DMATransfer(pCtl);
     6017                ataR3DMATransfer(pDevIns, pCtl, pCtlR3);
    58166018
    58176019                if (RT_UNLIKELY(pCtl->fRedo && !pCtl->fReset))
    58186020                {
    5819                     LogRel(("PIIX3 ATA: Ctl#%d: redo DMA operation\n", ATACONTROLLER_IDX(pCtl)));
    5820                     ataHCAsyncIOPutRequest(pCtl, &g_ataDMARequest);
     6021                    LogRel(("PIIX3 ATA: Ctl#%d: redo DMA operation\n", pCtl->iCtl));
     6022                    ataHCAsyncIOPutRequest(pDevIns, pCtl, &g_ataDMARequest);
    58216023                    break;
    58226024                }
     
    58326034                     * solution has been found. */
    58336035                    Log(("%s: delay IRQ hack\n", __FUNCTION__));
    5834                     ataR3LockLeave(pCtl);
     6036                    ataR3LockLeave(pDevIns, pCtl);
    58356037                    RTThreadSleep(pCtl->msDelayIRQ);
    5836                     ataR3LockEnter(pCtl);
     6038                    ataR3LockEnter(pDevIns, pCtl);
    58376039                }
    58386040
    5839                 ataUnsetStatus(s, ATA_STAT_DRQ);
     6041                ataUnsetStatus(pCtl, s, ATA_STAT_DRQ);
    58406042                Assert(!pCtl->fChainedTransfer);
    58416043                Assert(s->iSourceSink == ATAFN_SS_NULL);
     
    58436045                {
    58446046                    s->uATARegNSector = (s->uATARegNSector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
    5845                     Log2(("%s: Ctl#%d: interrupt reason %#04x\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), s->uATARegNSector));
     6047                    Log2(("%s: Ctl#%d: interrupt reason %#04x\n", __FUNCTION__, pCtl->iCtl, s->uATARegNSector));
    58466048                    s->fATAPITransfer = false;
    58476049                }
    5848                 ataHCSetIRQ(s);
     6050                ataHCSetIRQ(pDevIns, pCtl, s);
    58496051                pCtl->uAsyncIOState = ATA_AIO_NEW;
    58506052                break;
     
    58536055            case ATA_AIO_PIO:
    58546056            {
    5855                 s = &pCtl->aIfs[pCtl->iAIOIf & ATA_SELECTED_IF_MASK]; /* Do not remove or there's an instant crash after loading the saved state */
     6057                uint8_t const iIf = pCtl->iAIOIf & ATA_SELECTED_IF_MASK;
     6058                pCtl->iAIOIf = iIf;
     6059                PATADEVSTATE   s      = &pCtl->aIfs[iIf];
     6060                PATADEVSTATER3 pDevR3 = &pCtlR3->aIfs[iIf];
    58566061
    58576062                uint8_t const iSourceSink = s->iSourceSink;
     
    58606065                {
    58616066                    bool fRedo;
    5862                     Log2(("%s: Ctl#%d: calling source/sink function\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
    5863                     fRedo = g_apfnSourceSinkFuncs[iSourceSink](s);
     6067                    Log2(("%s: Ctl#%d: calling source/sink function\n", __FUNCTION__, pCtl->iCtl));
     6068                    fRedo = g_apfnSourceSinkFuncs[iSourceSink](pDevIns, pCtl, s, pDevR3);
    58646069                    pCtl->fRedo = fRedo;
    58656070                    if (RT_UNLIKELY(fRedo && !pCtl->fReset))
    58666071                    {
    5867                         LogRel(("PIIX3 ATA: Ctl#%d: redo PIO operation\n", ATACONTROLLER_IDX(pCtl)));
    5868                         ataHCAsyncIOPutRequest(pCtl, &g_ataPIORequest);
     6072                        LogRel(("PIIX3 ATA: Ctl#%d: redo PIO operation\n", pCtl->iCtl));
     6073                        ataHCAsyncIOPutRequest(pDevIns, pCtl, &g_ataPIORequest);
    58696074                        break;
    58706075                    }
     
    58766081                    /* Continue a previously started transfer. */
    58776082                    Assert(iSourceSink == ATAFN_SS_NULL);
    5878                     ataUnsetStatus(s, ATA_STAT_BUSY);
    5879                     ataSetStatus(s, ATA_STAT_READY);
     6083                    ataUnsetStatus(pCtl, s, ATA_STAT_BUSY);
     6084                    ataSetStatus(pCtl, s, ATA_STAT_READY);
    58806085                }
    58816086
     
    58906095                if (s->cbTotalTransfer)
    58916096                {
    5892                     ataHCPIOTransfer(pCtl);
    5893                     ataHCSetIRQ(s);
     6097                    ataHCPIOTransfer(pDevIns, pCtl);
     6098                    ataHCSetIRQ(pDevIns, pCtl, s);
    58946099
    58956100                    if (s->uTxDir == PDMMEDIATXDIR_TO_DEVICE || s->iSourceSink != ATAFN_SS_NULL)
     
    59156120                {
    59166121                    /* Finish PIO transfer. */
    5917                     ataHCPIOTransfer(pCtl);
     6122                    ataHCPIOTransfer(pDevIns, pCtl);
    59186123                    if (    !pCtl->fChainedTransfer
    59196124                        &&  !s->fATAPITransfer
    59206125                        &&  s->uTxDir != PDMMEDIATXDIR_FROM_DEVICE)
    59216126                    {
    5922                             ataHCSetIRQ(s);
     6127                            ataHCSetIRQ(pDevIns, pCtl, s);
    59236128                    }
    59246129                    pCtl->uAsyncIOState = ATA_AIO_NEW;
     
    59296134            case ATA_AIO_RESET_ASSERTED:
    59306135                pCtl->uAsyncIOState = ATA_AIO_RESET_CLEARED;
    5931                 ataHCPIOTransferStop(&pCtl->aIfs[0]);
    5932                 ataHCPIOTransferStop(&pCtl->aIfs[1]);
     6136                ataHCPIOTransferStop(pDevIns, pCtl, &pCtl->aIfs[0]);
     6137                ataHCPIOTransferStop(pDevIns, pCtl, &pCtl->aIfs[1]);
    59336138                /* Do not change the DMA registers, they are not affected by the
    59346139                 * ATA controller reset logic. It should be sufficient to issue a
     
    59436148                pCtl->fRedo = false;
    59446149                pCtl->fRedoDMALastDesc = false;
    5945                 LogRel(("PIIX3 ATA: Ctl#%d: finished processing RESET\n",
    5946                         ATACONTROLLER_IDX(pCtl)));
     6150                LogRel(("PIIX3 ATA: Ctl#%d: finished processing RESET\n", pCtl->iCtl));
    59476151                for (uint32_t i = 0; i < RT_ELEMENTS(pCtl->aIfs); i++)
    59486152                {
    59496153                    if (pCtl->aIfs[i].fATAPI)
    5950                         ataSetStatusValue(&pCtl->aIfs[i], 0); /* NOTE: READY is _not_ set */
     6154                        ataSetStatusValue(pCtl, &pCtl->aIfs[i], 0); /* NOTE: READY is _not_ set */
    59516155                    else
    5952                         ataSetStatusValue(&pCtl->aIfs[i], ATA_STAT_READY | ATA_STAT_SEEK);
     6156                        ataSetStatusValue(pCtl, &pCtl->aIfs[i], ATA_STAT_READY | ATA_STAT_SEEK);
    59536157                    ataR3SetSignature(&pCtl->aIfs[i]);
    59546158                }
     
    59566160
    59576161            case ATA_AIO_ABORT:
     6162            {
    59586163                /* Abort the current command no matter what. There cannot be
    59596164                 * any command activity on the other drive otherwise using
    59606165                 * one thread per controller wouldn't work at all. */
    5961                 s = &pCtl->aIfs[pReq->u.a.iIf & ATA_SELECTED_IF_MASK];
     6166                PATADEVSTATE s = &pCtl->aIfs[pReq->u.a.iIf & ATA_SELECTED_IF_MASK];
    59626167
    59636168                pCtl->uAsyncIOState = ATA_AIO_NEW;
     
    59676172                if (pReq->u.a.fResetDrive)
    59686173                {
    5969                     ataR3ResetDevice(s);
    5970                     ataR3DeviceDiag(s);
     6174                    ataR3ResetDevice(pDevIns, pCtl, s);
     6175                    ataR3DeviceDiag(pCtl, s);
    59716176                }
    59726177                else
     
    59746179                    /* Stop any pending DMA transfer. */
    59756180                    s->fDMA = false;
    5976                     ataHCPIOTransferStop(s);
    5977                     ataUnsetStatus(s, ATA_STAT_BUSY | ATA_STAT_DRQ | ATA_STAT_SEEK | ATA_STAT_ERR);
    5978                     ataSetStatus(s, ATA_STAT_READY);
    5979                     ataHCSetIRQ(s);
     6181                    ataHCPIOTransferStop(pDevIns, pCtl, s);
     6182                    ataUnsetStatus(pCtl, s, ATA_STAT_BUSY | ATA_STAT_DRQ | ATA_STAT_SEEK | ATA_STAT_ERR);
     6183                    ataSetStatus(pCtl, s, ATA_STAT_READY);
     6184                    ataHCSetIRQ(pDevIns, pCtl, s);
    59806185                }
    59816186                break;
     6187            }
    59826188
    59836189            default:
     
    59856191        }
    59866192
    5987         ataR3AsyncIORemoveCurrentRequest(pCtl, ReqType);
    5988         pReq = ataR3AsyncIOGetCurrentRequest(pCtl);
     6193        ataR3AsyncIORemoveCurrentRequest(pDevIns, pCtl, ReqType);
     6194        pReq = ataR3AsyncIOGetCurrentRequest(pDevIns, pCtl);
    59896195
    59906196        if (pCtl->uAsyncIOState == ATA_AIO_NEW && !pCtl->fChainedTransfer)
     
    59986204            uintptr_t const iAIOIf = pCtl->iAIOIf & ATA_SELECTED_IF_MASK;
    59996205            Log(("%s: Ctl#%d: LUN#%d finished I/O transaction in %d microseconds\n",
    6000                  __FUNCTION__, ATACONTROLLER_IDX(pCtl), pCtl->aIfs[iAIOIf].iLUN, (uint32_t)(uWait)));
     6206                 __FUNCTION__, pCtl->iCtl, pCtl->aIfs[iAIOIf].iLUN, (uint32_t)(uWait)));
    60016207            /* Mark command as finished. */
    60026208            pCtl->aIfs[iAIOIf].u64CmdTS = 0;
     
    60476253        }
    60486254
    6049         ataR3LockLeave(pCtl);
     6255        ataR3LockLeave(pDevIns, pCtl);
    60506256    }
    60516257
    60526258    /* Signal the ultimate idleness. */
    6053     RTThreadUserSignal(pCtl->AsyncIOThread);
    6054     if (pCtl->fSignalIdle)
     6259    RTThreadUserSignal(pCtlR3->hAsyncIOThread);
     6260    if (pCtlR3->fSignalIdle)
    60556261        PDMDevHlpAsyncNotificationCompleted(pDevIns);
    60566262
    60576263    /* Cleanup the state.  */
    60586264    /* Do not destroy request lock yet, still needed for proper shutdown. */
    6059     pCtl->fShutdown = false;
    6060 
    6061     Log2(("%s: Ctl#%d: return %Rrc\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl), rc));
     6265    pCtlR3->fShutdown = false;
     6266
     6267    Log2(("%s: Ctl#%d: return %Rrc\n", __FUNCTION__, pCtl->iCtl, rc));
    60626268    return rc;
    60636269}
     
    60686274{
    60696275    uint32_t val = pCtl->BmDma.u8Cmd;
    6070     RT_NOREF1(addr);
     6276    RT_NOREF(addr);
    60716277    Log2(("%s: addr=%#06x val=%#04x\n", __FUNCTION__, addr, val));
    60726278    return val;
     
    60746280
    60756281
    6076 static void ataBMDMACmdWriteB(PATACONTROLLER pCtl, uint32_t addr, uint32_t val)
    6077 {
    6078     RT_NOREF1(addr);
     6282static void ataBMDMACmdWriteB(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, uint32_t addr, uint32_t val)
     6283{
     6284    RT_NOREF(pDevIns, addr);
    60796285    Log2(("%s: addr=%#06x val=%#04x\n", __FUNCTION__, addr, val));
    60806286    if (!(val & BM_CMD_START))
     
    60966302        if (pCtl->fReset)
    60976303        {
    6098             Log2(("%s: Ctl#%d: suppressed continuing DMA transfer as RESET is active\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
     6304            Log2(("%s: Ctl#%d: suppressed continuing DMA transfer as RESET is active\n", __FUNCTION__, pCtl->iCtl));
    60996305            return;
    61006306        }
     
    61086314        if (pCtl->aIfs[pCtl->iAIOIf & ATA_SELECTED_IF_MASK].uATARegStatus & ATA_STAT_DRQ)
    61096315        {
    6110             Log2(("%s: Ctl#%d: message to async I/O thread, continuing DMA transfer\n", __FUNCTION__, ATACONTROLLER_IDX(pCtl)));
    6111             ataHCAsyncIOPutRequest(pCtl, &g_ataDMARequest);
     6316            Log2(("%s: Ctl#%d: message to async I/O thread, continuing DMA transfer\n", __FUNCTION__, pCtl->iCtl));
     6317            ataHCAsyncIOPutRequest(pDevIns, pCtl, &g_ataDMARequest);
    61126318        }
    61136319#else /* !IN_RING3 */
     
    61206326{
    61216327    uint32_t val = pCtl->BmDma.u8Status;
    6122     RT_NOREF1(addr);
     6328    RT_NOREF(addr);
    61236329    Log2(("%s: addr=%#06x val=%#04x\n", __FUNCTION__, addr, val));
    61246330    return val;
     
    61276333static void ataBMDMAStatusWriteB(PATACONTROLLER pCtl, uint32_t addr, uint32_t val)
    61286334{
    6129     RT_NOREF1(addr);
     6335    RT_NOREF(addr);
    61306336    Log2(("%s: addr=%#06x val=%#04x\n", __FUNCTION__, addr, val));
    61316337    pCtl->BmDma.u8Status =    (val & (BM_STATUS_D0DMA | BM_STATUS_D1DMA))
     
    61376343{
    61386344    uint32_t val = (uint32_t)pCtl->BmDma.GCPhysAddr;
    6139     RT_NOREF1(addr);
     6345    RT_NOREF(addr);
    61406346    Log2(("%s: addr=%#06x val=%#010x\n", __FUNCTION__, addr, val));
    61416347    return val;
     
    61446350static void ataBMDMAAddrWriteL(PATACONTROLLER pCtl, uint32_t addr, uint32_t val)
    61456351{
    6146     RT_NOREF1(addr);
     6352    RT_NOREF(addr);
    61476353    Log2(("%s: addr=%#06x val=%#010x\n", __FUNCTION__, addr, val));
    61486354    pCtl->BmDma.GCPhysAddr = val & ~3;
     
    61516357static void ataBMDMAAddrWriteLowWord(PATACONTROLLER pCtl, uint32_t addr, uint32_t val)
    61526358{
    6153     RT_NOREF1(addr);
     6359    RT_NOREF(addr);
    61546360    Log2(("%s: addr=%#06x val=%#010x\n", __FUNCTION__, addr, val));
    61556361    pCtl->BmDma.GCPhysAddr = (pCtl->BmDma.GCPhysAddr & 0xFFFF0000) | RT_LOWORD(val & ~3);
     
    61606366{
    61616367    Log2(("%s: addr=%#06x val=%#010x\n", __FUNCTION__, addr, val));
    6162     RT_NOREF1(addr);
     6368    RT_NOREF(addr);
    61636369    pCtl->BmDma.GCPhysAddr = (RT_LOWORD(val) << 16) | RT_LOWORD(pCtl->BmDma.GCPhysAddr);
    61646370}
     
    61786384    RT_NOREF(pvUser);
    61796385
    6180     VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_IOM_R3_IOPORT_READ);
     6386    VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_IOM_R3_IOPORT_READ);
    61816387    if (rc == VINF_SUCCESS)
    61826388    {
     
    61976403                break;
    61986404        }
    6199         PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     6405        PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    62006406    }
    62016407    return rc;
     
    62136419    RT_NOREF(pvUser);
    62146420
    6215     VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_IOM_R3_IOPORT_WRITE);
     6421    VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_IOM_R3_IOPORT_WRITE);
    62166422    if (rc == VINF_SUCCESS)
    62176423    {
     
    62266432                }
    62276433#endif
    6228                 ataBMDMACmdWriteB(pCtl, offPort, u32);
     6434                ataBMDMACmdWriteB(pDevIns, pCtl, offPort, u32);
    62296435                break;
    62306436            case VAL(2, 1): ataBMDMAStatusWriteB(pCtl, offPort, u32); break;
     
    62366442                break;
    62376443        }
    6238         PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     6444        PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    62396445    }
    62406446    return rc;
     
    62526458static DECLCALLBACK(void *) ataR3Status_QueryInterface(PPDMIBASE pInterface, const char *pszIID)
    62536459{
    6254     PCIATAState *pThis = RT_FROM_MEMBER(pInterface, PCIATAState, IBase);
    6255     PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
    6256     PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
     6460    PATASTATER3 pThisCC = RT_FROM_MEMBER(pInterface, ATASTATER3, IBase);
     6461    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThisCC->IBase);
     6462    PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThisCC->ILeds);
    62576463    return NULL;
    62586464}
     
    62716477static DECLCALLBACK(int) ataR3Status_QueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
    62726478{
    6273     PCIATAState *pThis = RT_FROM_MEMBER(pInterface, PCIATAState, ILeds);
    62746479    if (iLUN < 4)
    62756480    {
     6481        PATASTATER3 pThisCC = RT_FROM_MEMBER(pInterface, ATASTATER3, ILeds);
     6482        PATASTATE   pThis   = PDMDEVINS_2_DATA(pThisCC->pDevIns, PATASTATE);
    62766483        switch (iLUN)
    62776484        {
     
    62956502static DECLCALLBACK(void *) ataR3QueryInterface(PPDMIBASE pInterface, const char *pszIID)
    62966503{
    6297     ATADevState *pIf = RT_FROM_MEMBER(pInterface, ATADevState, IBase);
    6298     PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pIf->IBase);
    6299     PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pIf->IPort);
    6300     PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMOUNTNOTIFY, &pIf->IMountNotify);
     6504    PATADEVSTATER3 pIfR3 = RT_FROM_MEMBER(pInterface, ATADEVSTATER3, IBase);
     6505    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pIfR3->IBase);
     6506    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pIfR3->IPort);
     6507    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMOUNTNOTIFY, &pIfR3->IMountNotify);
    63016508    return NULL;
    63026509}
     
    63116518                                                  uint32_t *piInstance, uint32_t *piLUN)
    63126519{
    6313     ATADevState *pIf = RT_FROM_MEMBER(pInterface, ATADevState, IPort);
    6314     PPDMDEVINS pDevIns = pIf->CTX_SUFF(pDevIns);
     6520    PATADEVSTATER3 pIfR3   = RT_FROM_MEMBER(pInterface, ATADEVSTATER3, IPort);
     6521    PPDMDEVINS     pDevIns = pIfR3->pDevIns;
    63156522
    63166523    AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
     
    63206527    *ppcszController = pDevIns->pReg->szName;
    63216528    *piInstance = pDevIns->iInstance;
    6322     *piLUN = pIf->iLUN;
     6529    *piLUN = pIfR3->iLUN;
    63236530
    63246531    return VINF_SUCCESS;
     
    63446551    PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)];
    63456552    Assert((uintptr_t)pvUser < 2);
    6346     Assert(!pCtl->aIfs[0].pDrvMedia && !pCtl->aIfs[1].pDrvMedia);
     6553    Assert(!pCtl->aIfs[0].fPresent && !pCtl->aIfs[1].fPresent);
    63476554#endif
    63486555
     
    63686575    Assert((uintptr_t)pvUser < 2);
    63696576    Assert(cb <= 4);
    6370     Assert(!pCtl->aIfs[0].pDrvMedia && !pCtl->aIfs[1].pDrvMedia);
     6577    Assert(!pCtl->aIfs[0].fPresent && !pCtl->aIfs[1].fPresent);
    63716578#endif
    63726579
     
    63976604{
    63986605    PCIATAState   *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    6399     PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)];
     6606    uintptr_t      iCtl = (uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts);
     6607    PATACONTROLLER pCtl = &pThis->aCts[iCtl];
    64006608
    64016609    Assert((uintptr_t)pvUser < 2);
    64026610
    6403     VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_IOM_R3_IOPORT_WRITE);
     6611    VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_IOM_R3_IOPORT_WRITE);
    64046612    if (rc == VINF_SUCCESS)
    64056613    {
     
    64116619            Log(("ataIOPortWrite1: suspect write to port %x val=%x size=%d\n", offPort, u32, cb));
    64126620
    6413         rc = ataIOPortWriteU8(pCtl, offPort, u32);
    6414 
    6415         PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     6621        rc = ataIOPortWriteU8(pDevIns, pCtl, offPort, u32, iCtl);
     6622
     6623        PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    64166624    }
    64176625    return rc;
     
    64326640    Assert((uintptr_t)pvUser < 2);
    64336641
    6434     VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_IOM_R3_IOPORT_READ);
     6642    VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_IOM_R3_IOPORT_READ);
    64356643    if (rc == VINF_SUCCESS)
    64366644    {
     
    64396647         * Undocumented, but observed on a real PIIX4 system.
    64406648         */
    6441         rc = ataIOPortReadU8(pCtl, offPort, pu32);
     6649        rc = ataIOPortReadU8(pDevIns, pCtl, offPort, pu32);
    64426650        if (cb > 1)
    64436651        {
     
    64516659            Log(("ataIOPortRead1: suspect read from port %x size=%d\n", offPort, cb));
    64526660        }
    6453         PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     6661        PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    64546662    }
    64556663    return rc;
     
    64736681    if (cb == 1)
    64746682    {
    6475         rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_IOM_R3_IOPORT_WRITE);
     6683        rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_IOM_R3_IOPORT_WRITE);
    64766684        if (rc == VINF_SUCCESS)
    64776685        {
    6478             rc = ataControlWrite(pCtl, u32, offPort);
    6479             PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     6686            rc = ataControlWrite(pDevIns, pCtl, u32, offPort);
     6687            PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    64806688        }
    64816689    }
     
    65056713    if (cb == 1)
    65066714    {
    6507         rc = PDMDevHlpCritSectEnter(pCtl->CTX_SUFF(pDevIns), &pCtl->lock, VINF_IOM_R3_IOPORT_READ);
     6715        rc = PDMDevHlpCritSectEnter(pDevIns, &pCtl->lock, VINF_IOM_R3_IOPORT_READ);
    65086716        if (rc == VINF_SUCCESS)
    65096717        {
    65106718            *pu32 = ataStatusRead(pCtl, offPort);
    6511             PDMDevHlpCritSectLeave(pCtl->CTX_SUFF(pDevIns), &pCtl->lock);
     6719            PDMDevHlpCritSectLeave(pDevIns, &pCtl->lock);
    65126720        }
    65136721    }
     
    65336741static DECLCALLBACK(void) ataR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
    65346742{
    6535     PCIATAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
     6743    PATASTATE   pThis   = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
     6744    PATASTATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATECC);
    65366745    AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
    65376746              ("PIIX3IDE: Device does not support hotplugging\n")); RT_NOREF(fFlags);
     
    65426751    unsigned iController = iLUN / RT_ELEMENTS(pThis->aCts[0].aIfs);
    65436752    AssertReleaseMsg(iController < RT_ELEMENTS(pThis->aCts), ("iController=%d iLUN=%d\n", iController, iLUN));
    6544     PATACONTROLLER  pCtl = &pThis->aCts[iController];
     6753    PATACONTROLLER   pCtl   = &pThis->aCts[iController];
     6754    PATACONTROLLERR3 pCtlR3 = &pThisCC->aCts[iController];
    65456755
    65466756    unsigned iInterface  = iLUN % RT_ELEMENTS(pThis->aCts[0].aIfs);
    6547     ATADevState *pIf = &pCtl->aIfs[iInterface];
     6757    PATADEVSTATE   pIf   = &pCtl->aIfs[iInterface];
     6758    PATADEVSTATER3 pIfR3 = &pCtlR3->aIfs[iInterface];
    65486759
    65496760    /*
    65506761     * Zero some important members.
    65516762     */
    6552     pIf->pDrvBase = NULL;
    6553     pIf->pDrvMedia = NULL;
    6554     pIf->pDrvMount = NULL;
     6763    pIfR3->pDrvBase = NULL;
     6764    pIfR3->pDrvMedia = NULL;
     6765    pIfR3->pDrvMount = NULL;
     6766    pIf->fPresent    = false;
    65556767
    65566768    /*
     
    65656777 *
    65666778 * @returns VBox status code.
    6567  * @param   pIf         The ATA unit state.
    6568  */
    6569 static int ataR3ConfigLun(ATADevState *pIf)
     6779 * @param   pIf         The ATA unit state, shared bits.
     6780 * @param   pIfR3       The ATA unit state, ring-3 bits.
     6781 */
     6782static int ataR3ConfigLun(PATADEVSTATE pIf, PATADEVSTATER3 pIfR3)
    65706783{
    65716784    /*
    65726785     * Query Block, Bios and Mount interfaces.
    65736786     */
    6574     pIf->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pIf->pDrvBase, PDMIMEDIA);
    6575     if (!pIf->pDrvMedia)
     6787    pIfR3->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pIfR3->pDrvBase, PDMIMEDIA);
     6788    if (!pIfR3->pDrvMedia)
    65766789    {
    65776790        AssertMsgFailed(("Configuration error: LUN#%d hasn't a block interface!\n", pIf->iLUN));
     
    65796792    }
    65806793
    6581     pIf->pDrvMount = PDMIBASE_QUERY_INTERFACE(pIf->pDrvBase, PDMIMOUNT);
     6794    pIfR3->pDrvMount = PDMIBASE_QUERY_INTERFACE(pIfR3->pDrvBase, PDMIMOUNT);
     6795    pIf->fPresent = true;
    65826796
    65836797    /*
    65846798     * Validate type.
    65856799     */
    6586     PDMMEDIATYPE enmType = pIf->pDrvMedia->pfnGetType(pIf->pDrvMedia);
     6800    PDMMEDIATYPE enmType = pIfR3->pDrvMedia->pfnGetType(pIfR3->pDrvMedia);
    65876801    if (    enmType != PDMMEDIATYPE_CDROM
    65886802        &&  enmType != PDMMEDIATYPE_DVD
     
    65946808    if (    (   enmType == PDMMEDIATYPE_DVD
    65956809             || enmType == PDMMEDIATYPE_CDROM)
    6596         &&  !pIf->pDrvMount)
     6810        &&  !pIfR3->pDrvMount)
    65976811    {
    65986812        AssertMsgFailed(("Internal error: cdrom without a mountable interface, WTF???!\n"));
     
    66006814    }
    66016815    pIf->fATAPI = enmType == PDMMEDIATYPE_DVD || enmType == PDMMEDIATYPE_CDROM;
    6602     pIf->fATAPIPassthrough = pIf->fATAPI && pIf->pDrvMedia->pfnSendCmd != NULL;
     6816    pIf->fATAPIPassthrough = pIf->fATAPI && pIfR3->pDrvMedia->pfnSendCmd != NULL;
    66036817
    66046818    /*
     
    66096823    else
    66106824    {
    6611         pIf->cbSector = pIf->pDrvMedia->pfnGetSectorSize(pIf->pDrvMedia);
     6825        pIf->cbSector = pIfR3->pDrvMedia->pfnGetSectorSize(pIfR3->pDrvMedia);
    66126826        AssertLogRelMsgReturn(pIf->cbSector > 0 && pIf->cbSector <= ATA_MAX_SECTOR_SIZE,
    66136827                              ("Unsupported sector size on LUN#%u: %#x (%d)\n", pIf->iLUN, pIf->cbSector, pIf->cbSector),
     
    66416855     */
    66426856    int rc = VINF_SUCCESS;
    6643     uint32_t cRegions = pIf->pDrvMedia->pfnGetRegionCount(pIf->pDrvMedia);
     6857    uint32_t cRegions = pIfR3->pDrvMedia->pfnGetRegionCount(pIfR3->pDrvMedia);
    66446858    pIf->cTotalSectors = 0;
    66456859    for (uint32_t i = 0; i < cRegions; i++)
    66466860    {
    66476861        uint64_t cBlocks = 0;
    6648         rc = pIf->pDrvMedia->pfnQueryRegionProperties(pIf->pDrvMedia, i, NULL, &cBlocks,
    6649                                                       NULL, NULL);
     6862        rc = pIfR3->pDrvMedia->pfnQueryRegionProperties(pIfR3->pDrvMedia, i, NULL, &cBlocks, NULL, NULL);
    66506863        AssertRC(rc);
    66516864        pIf->cTotalSectors += cBlocks;
     
    66626875    else
    66636876    {
    6664         rc = pIf->pDrvMedia->pfnBiosGetPCHSGeometry(pIf->pDrvMedia, &pIf->PCHSGeometry);
     6877        rc = pIfR3->pDrvMedia->pfnBiosGetPCHSGeometry(pIfR3->pDrvMedia, &pIf->PCHSGeometry);
    66656878        if (rc == VERR_PDM_MEDIA_NOT_MOUNTED)
    66666879        {
     
    66866899            pIf->PCHSGeometry.cSectors = 63;
    66876900            /* Set the disk geometry information. Ignore errors. */
    6688             pIf->pDrvMedia->pfnBiosSetPCHSGeometry(pIf->pDrvMedia, &pIf->PCHSGeometry);
     6901            pIfR3->pDrvMedia->pfnBiosSetPCHSGeometry(pIfR3->pDrvMedia, &pIf->PCHSGeometry);
    66896902            rc = VINF_SUCCESS;
    66906903        }
     
    66936906                pIf->cTotalSectors));
    66946907
    6695         if (pIf->pDrvMedia->pfnDiscard)
     6908        if (pIfR3->pDrvMedia->pfnDiscard)
    66966909            LogRel(("PIIX3 ATA: LUN#%d: TRIM enabled\n", pIf->iLUN));
    66976910    }
     
    67446957static DECLCALLBACK(int)  ataR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
    67456958{
    6746     PCIATAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    6747     PATACONTROLLER  pCtl;
    6748     ATADevState    *pIf;
    6749     int             rc;
    6750     unsigned        iController;
    6751     unsigned        iInterface;
     6959    PATASTATE   pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
     6960    PATASTATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATECC);
    67526961
    67536962    AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
     
    67586967     * Locate the controller and stuff.
    67596968     */
    6760     iController = iLUN / RT_ELEMENTS(pThis->aCts[0].aIfs);
     6969    unsigned const iController = iLUN / RT_ELEMENTS(pThis->aCts[0].aIfs);
    67616970    AssertReleaseMsg(iController < RT_ELEMENTS(pThis->aCts), ("iController=%d iLUN=%d\n", iController, iLUN));
    6762     pCtl = &pThis->aCts[iController];
    6763 
    6764     iInterface  = iLUN % RT_ELEMENTS(pThis->aCts[0].aIfs);
    6765     pIf = &pCtl->aIfs[iInterface];
     6971    PATACONTROLLER   pCtl   = &pThis->aCts[iController];
     6972    PATACONTROLLERR3 pCtlR3 = &pThisCC->aCts[iController];
     6973
     6974    unsigned const iInterface = iLUN % RT_ELEMENTS(pThis->aCts[0].aIfs);
     6975    PATADEVSTATE   pIf   = &pCtl->aIfs[iInterface];
     6976    PATADEVSTATER3 pIfR3 = &pCtlR3->aIfs[iInterface];
    67666977
    67676978    /* the usual paranoia */
    6768     AssertRelease(!pIf->pDrvBase);
    6769     AssertRelease(!pIf->pDrvMedia);
    6770     Assert(ATADEVSTATE_2_CONTROLLER(pIf) == pCtl);
     6979    AssertRelease(!pIfR3->pDrvBase);
     6980    AssertRelease(!pIfR3->pDrvMedia);
    67716981    Assert(pIf->iLUN == iLUN);
    67726982
     
    67756985     * required as well as optional.
    67766986     */
    6777     rc = PDMDevHlpDriverAttach(pDevIns, pIf->iLUN, &pIf->IBase, &pIf->pDrvBase, NULL);
     6987    int rc = PDMDevHlpDriverAttach(pDevIns, pIf->iLUN, &pIfR3->IBase, &pIfR3->pDrvBase, NULL);
    67786988    if (RT_SUCCESS(rc))
    67796989    {
    6780         rc = ataR3ConfigLun(pIf);
     6990        rc = ataR3ConfigLun(pIf, pIfR3);
    67816991        /*
    67826992         * In case there is a medium inserted.
     
    67907000    if (RT_FAILURE(rc))
    67917001    {
    6792         pIf->pDrvBase = NULL;
    6793         pIf->pDrvMedia = NULL;
     7002        pIfR3->pDrvBase  = NULL;
     7003        pIfR3->pDrvMedia = NULL;
     7004        pIfR3->pDrvMount = NULL;
     7005        pIf->fPresent    = false;
    67947006    }
    67957007    return rc;
     
    68057017static DECLCALLBACK(void) ataR3Resume(PPDMDEVINS pDevIns)
    68067018{
    6807     PCIATAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    6808     int             rc;
     7019    PATASTATE   pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
     7020    PATASTATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATECC);
    68097021
    68107022    Log(("%s:\n", __FUNCTION__));
     
    68137025        if (pThis->aCts[i].fRedo && pThis->aCts[i].fRedoIdle)
    68147026        {
    6815             rc = RTSemEventSignal(pThis->aCts[i].SuspendIOSem);
     7027            int rc = RTSemEventSignal(pThisCC->aCts[i].hSuspendIOSem);
    68167028            AssertRC(rc);
    68177029        }
     
    68307042static bool ataR3AllAsyncIOIsIdle(PPDMDEVINS pDevIns)
    68317043{
    6832     PCIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
     7044    PATASTATE   pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
     7045    PATASTATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATECC);
    68337046
    68347047    for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
    6835         if (pThis->aCts[i].AsyncIOThread != NIL_RTTHREAD)
    6836         {
    6837             bool fRc = ataR3AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/);
     7048        if (pThisCC->aCts[i].hAsyncIOThread != NIL_RTTHREAD)
     7049        {
     7050            bool fRc = ataR3AsyncIOIsIdle(pDevIns, &pThis->aCts[i], false /*fStrict*/);
    68387051            if (!fRc)
    68397052            {
    68407053                /* Make it signal PDM & itself when its done */
    68417054                PDMDevHlpCritSectEnter(pDevIns, &pThis->aCts[i].AsyncIORequestLock, VERR_IGNORED);
    6842                 ASMAtomicWriteBool(&pThis->aCts[i].fSignalIdle, true);
     7055                ASMAtomicWriteBool(&pThisCC->aCts[i].fSignalIdle, true);
    68437056                PDMDevHlpCritSectLeave(pDevIns, &pThis->aCts[i].AsyncIORequestLock);
    68447057
    6845                 fRc = ataR3AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/);
     7058                fRc = ataR3AsyncIOIsIdle(pDevIns, &pThis->aCts[i], false /*fStrict*/);
    68467059                if (!fRc)
    68477060                {
     
    68547067                }
    68557068            }
    6856             ASMAtomicWriteBool(&pThis->aCts[i].fSignalIdle, false);
     7069            ASMAtomicWriteBool(&pThisCC->aCts[i].fSignalIdle, false);
    68577070        }
    68587071    return true;
     
    68687081static DECLCALLBACK(int) ataR3SaveLoadPrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
    68697082{
    6870     RT_NOREF1(pSSM);
     7083    RT_NOREF(pSSM);
    68717084    PCIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    68727085
    68737086    /* sanity - the suspend notification will wait on the async stuff. */
    68747087    for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
    6875         AssertLogRelMsgReturn(ataR3AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/),
     7088        AssertLogRelMsgReturn(ataR3AsyncIOIsIdle(pDevIns, &pThis->aCts[i], false /*fStrict*/),
    68767089                              ("i=%u\n", i),
    68777090                              VERR_SSM_IDE_ASYNC_TIMEOUT);
     
    68847097static DECLCALLBACK(int) ataR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
    68857098{
    6886     RT_NOREF1(uPass);
    6887     PCIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    6888     PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
     7099    PATASTATE       pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
     7100    PATASTATER3     pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATECC);
     7101    PCPDMDEVHLPR3   pHlp = pDevIns->pHlpR3;
     7102    RT_NOREF(uPass);
    68897103
    68907104    pHlp->pfnSSMPutU8(pSSM, pThis->u8Type);
     
    68947108        for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++)
    68957109        {
    6896             pHlp->pfnSSMPutBool(pSSM, pThis->aCts[i].aIfs[j].pDrvBase != NULL);
     7110            pHlp->pfnSSMPutBool(pSSM, pThisCC->aCts[i].aIfs[j].pDrvBase != NULL);
    68977111            pHlp->pfnSSMPutStrZ(pSSM, pThis->aCts[i].aIfs[j].szSerialNumber);
    68987112            pHlp->pfnSSMPutStrZ(pSSM, pThis->aCts[i].aIfs[j].szFirmwareRevision);
     
    69097123static DECLCALLBACK(int) ataR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
    69107124{
    6911     PCIATAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
     7125    PATASTATE       pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
    69127126    PCPDMDEVHLPR3   pHlp = pDevIns->pHlpR3;
    69137127
     
    70047218static DECLCALLBACK(int) ataR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
    70057219{
    7006     PCIATAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    7007     PCPDMDEVHLPR3   pHlp = pDevIns->pHlpR3;
     7220    PATASTATE       pThis   = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
     7221    PATASTATER3     pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATECC);
     7222    PCPDMDEVHLPR3   pHlp    = pDevIns->pHlpR3;
    70087223    int             rc;
    70097224    uint32_t        u32;
     
    70407255            for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++)
    70417256            {
    7042                 ATADevState const *pIf = &pThis->aCts[i].aIfs[j];
     7257                ATADEVSTATE const   *pIf   = &pThis->aCts[i].aIfs[j];
     7258                ATADEVSTATER3 const *pIfR3 = &pThisCC->aCts[i].aIfs[j];
    70437259
    70447260                bool fInUse;
    70457261                rc = pHlp->pfnSSMGetBool(pSSM, &fInUse);
    70467262                AssertRCReturn(rc, rc);
    7047                 if (fInUse != (pIf->pDrvBase != NULL))
     7263                if (fInUse != (pIfR3->pDrvBase != NULL))
    70487264                    return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS,
    70497265                                                   N_("The %s VM is missing a %s device. Please make sure the source and target VMs have compatible storage configurations"),
     
    70827298    {
    70837299        /* integrity check */
    7084         if (!ataR3AsyncIOIsIdle(&pThis->aCts[i], false))
     7300        if (!ataR3AsyncIOIsIdle(pDevIns, &pThis->aCts[i], false))
    70857301        {
    70867302            AssertMsgFailed(("Async I/O for controller %d is active\n", i));
     
    72917507        PDMDevHlpCritSectEnter(pDevIns, &pThis->aCts[i].lock, VERR_INTERNAL_ERROR);
    72927508        for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++)
    7293             ataR3ResetDevice(&pThis->aCts[i].aIfs[j]);
     7509            ataR3ResetDevice(pDevIns, &pThis->aCts[i], &pThis->aCts[i].aIfs[j]);
    72947510        PDMDevHlpCritSectLeave(pDevIns, &pThis->aCts[i].lock);
    72957511    }
     
    73077523static int ataR3ResetCommon(PPDMDEVINS pDevIns, bool fConstruct)
    73087524{
    7309     PCIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
     7525    PATASTATE   pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
     7526    PATASTATER3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATECC);
    73107527
    73117528    for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
     
    73197536         * pretends that there is a BIOS that has set it up. Normal reset
    73207537         * default is 0x00. */
    7321         pThis->aCts[i].BmDma.u8Status =   (pThis->aCts[i].aIfs[0].pDrvBase != NULL ? BM_STATUS_D0DMA : 0)
    7322                                         | (pThis->aCts[i].aIfs[1].pDrvBase != NULL ? BM_STATUS_D1DMA : 0);
     7538        pThis->aCts[i].BmDma.u8Status = (pThisCC->aCts[i].aIfs[0].pDrvBase != NULL ? BM_STATUS_D0DMA : 0)
     7539                                      | (pThisCC->aCts[i].aIfs[1].pDrvBase != NULL ? BM_STATUS_D1DMA : 0);
    73237540        pThis->aCts[i].BmDma.GCPhysAddr = 0;
    73247541
     
    73267543        pThis->aCts[i].fRedo = false;
    73277544        pThis->aCts[i].fRedoIdle = false;
    7328         ataR3AsyncIOClearRequests(&pThis->aCts[i]);
     7545        ataR3AsyncIOClearRequests(pDevIns, &pThis->aCts[i]);
    73297546        Log2(("%s: Ctl#%d: message to async I/O thread, reset controller\n", __FUNCTION__, i));
    7330         ataHCAsyncIOPutRequest(&pThis->aCts[i], &g_ataResetARequest);
    7331         ataHCAsyncIOPutRequest(&pThis->aCts[i], &g_ataResetCRequest);
     7547        ataHCAsyncIOPutRequest(pDevIns, &pThis->aCts[i], &g_ataResetARequest);
     7548        ataHCAsyncIOPutRequest(pDevIns, &pThis->aCts[i], &g_ataResetCRequest);
    73327549
    73337550        PDMDevHlpCritSectLeave(pDevIns, &pThis->aCts[i].lock);
     
    73557572        for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
    73567573        {
    7357             if (pThis->aCts[i].AsyncIOThread != NIL_RTTHREAD)
     7574            if (pThisCC->aCts[i].hAsyncIOThread != NIL_RTTHREAD)
    73587575            {
    73597576                int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->aCts[i].AsyncIORequestLock, VERR_IGNORED);
    73607577                AssertRC(rc);
    73617578
    7362                 ASMAtomicWriteBool(&pThis->aCts[i].fSignalIdle, true);
    7363                 rc = RTThreadUserReset(pThis->aCts[i].AsyncIOThread);
     7579                ASMAtomicWriteBool(&pThisCC->aCts[i].fSignalIdle, true);
     7580                rc = RTThreadUserReset(pThisCC->aCts[i].hAsyncIOThread);
    73647581                AssertRC(rc);
    73657582
     
    73677584                AssertRC(rc);
    73687585
    7369                 if (!ataR3AsyncIOIsIdle(&pThis->aCts[i], false /*fStrict*/))
     7586                if (!ataR3AsyncIOIsIdle(pDevIns, &pThis->aCts[i], false /*fStrict*/))
    73707587                {
    7371                     rc = RTThreadUserWait(pThis->aCts[i].AsyncIOThread,  30*1000 /*ms*/);
     7588                    rc = RTThreadUserWait(pThisCC->aCts[i].hAsyncIOThread,  30*1000 /*ms*/);
    73727589                    if (RT_FAILURE(rc))
    7373                         rc = RTThreadUserWait(pThis->aCts[i].AsyncIOThread, 1000 /*ms*/);
     7590                        rc = RTThreadUserWait(pThisCC->aCts[i].hAsyncIOThread, 1000 /*ms*/);
    73747591                    if (RT_FAILURE(rc))
    73757592                    {
     
    73797596                }
    73807597            }
    7381             ASMAtomicWriteBool(&pThis->aCts[i].fSignalIdle, false);
     7598            ASMAtomicWriteBool(&pThisCC->aCts[i].fSignalIdle, false);
    73827599        }
    73837600        if (RT_SUCCESS(rcRet))
     
    73987615{
    73997616    ataR3ResetCommon(pDevIns, false /*fConstruct*/);
    7400 }
    7401 
    7402 /**
    7403  * @copydoc FNPDMDEVRELOCATE
    7404  */
    7405 static DECLCALLBACK(void) ataR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
    7406 {
    7407     PCIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    7408 
    7409     for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
    7410     {
    7411         pThis->aCts[i].pDevInsRC += offDelta;
    7412         pThis->aCts[i].aIfs[0].pDevInsRC += offDelta;
    7413         pThis->aCts[i].aIfs[0].pControllerRC += offDelta;
    7414         pThis->aCts[i].aIfs[1].pDevInsRC += offDelta;
    7415         pThis->aCts[i].aIfs[1].pControllerRC += offDelta;
    7416     }
    74177617}
    74187618
     
    74287628{
    74297629    PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
    7430     PCIATAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
     7630    PATASTATE       pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
     7631    PATASTATER3     pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATECC);
    74317632    int             rc;
    74327633
     
    74387639    for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
    74397640    {
    7440         if (pThis->aCts[i].AsyncIOThread != NIL_RTTHREAD)
    7441         {
    7442             ASMAtomicWriteU32(&pThis->aCts[i].fShutdown, true);
     7641        if (pThisCC->aCts[i].hAsyncIOThread != NIL_RTTHREAD)
     7642        {
     7643            ASMAtomicWriteU32(&pThisCC->aCts[i].fShutdown, true);
    74437644            rc = PDMDevHlpSUPSemEventSignal(pDevIns, pThis->aCts[i].hAsyncIOSem);
    74447645            AssertRC(rc);
    7445             rc = RTSemEventSignal(pThis->aCts[i].SuspendIOSem);
     7646            rc = RTSemEventSignal(pThisCC->aCts[i].hSuspendIOSem);
    74467647            AssertRC(rc);
    74477648        }
     
    74537654    for (unsigned i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
    74547655    {
    7455         if (pThis->aCts[i].AsyncIOThread != NIL_RTTHREAD)
    7456         {
    7457             rc = RTThreadWait(pThis->aCts[i].AsyncIOThread, 30000 /* 30 s*/, NULL);
     7656        if (pThisCC->aCts[i].hAsyncIOThread != NIL_RTTHREAD)
     7657        {
     7658            rc = RTThreadWait(pThisCC->aCts[i].hAsyncIOThread, 30000 /* 30 s*/, NULL);
    74587659            if (RT_SUCCESS(rc))
    7459                 pThis->aCts[i].AsyncIOThread = NIL_RTTHREAD;
     7660                pThisCC->aCts[i].hAsyncIOThread = NIL_RTTHREAD;
    74607661            else
    74617662                LogRel(("PIIX3 ATA Dtor: Ctl#%u is still executing, DevSel=%d AIOIf=%d CmdIf0=%#04x CmdIf1=%#04x rc=%Rrc\n",
     
    74777678            pThis->aCts[i].hAsyncIOSem = NIL_SUPSEMEVENT;
    74787679        }
    7479         if (pThis->aCts[i].SuspendIOSem != NIL_RTSEMEVENT)
    7480         {
    7481             RTSemEventDestroy(pThis->aCts[i].SuspendIOSem);
    7482             pThis->aCts[i].SuspendIOSem = NIL_RTSEMEVENT;
     7680        if (pThisCC->aCts[i].hSuspendIOSem != NIL_RTSEMEVENT)
     7681        {
     7682            RTSemEventDestroy(pThisCC->aCts[i].hSuspendIOSem);
     7683            pThisCC->aCts[i].hSuspendIOSem = NIL_RTSEMEVENT;
    74837684        }
    74847685
    74857686        /* try one final time */
    7486         if (pThis->aCts[i].AsyncIOThread != NIL_RTTHREAD)
    7487         {
    7488             rc = RTThreadWait(pThis->aCts[i].AsyncIOThread, 1 /*ms*/, NULL);
     7687        if (pThisCC->aCts[i].hAsyncIOThread != NIL_RTTHREAD)
     7688        {
     7689            rc = RTThreadWait(pThisCC->aCts[i].hAsyncIOThread, 1 /*ms*/, NULL);
    74897690            if (RT_SUCCESS(rc))
    74907691            {
    7491                 pThis->aCts[i].AsyncIOThread = NIL_RTTHREAD;
     7692                pThisCC->aCts[i].hAsyncIOThread = NIL_RTTHREAD;
    74927693                LogRel(("PIIX3 ATA Dtor: Ctl#%u actually completed.\n", i));
    74937694            }
     
    74967697        for (uint32_t iIf = 0; iIf < RT_ELEMENTS(pThis->aCts[i].aIfs); iIf++)
    74977698        {
    7498             if (pThis->aCts[i].aIfs[iIf].pTrackList)
     7699            if (pThisCC->aCts[i].aIfs[iIf].pTrackList)
    74997700            {
    7500                 ATAPIPassthroughTrackListDestroy(pThis->aCts[i].aIfs[iIf].pTrackList);
    7501                 pThis->aCts[i].aIfs[iIf].pTrackList = NULL;
     7701                ATAPIPassthroughTrackListDestroy(pThisCC->aCts[i].aIfs[iIf].pTrackList);
     7702                pThisCC->aCts[i].aIfs[iIf].pTrackList = NULL;
    75027703            }
    75037704        }
     
    75457746{
    75467747    PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
    7547     PCIATAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    7548     PCPDMDEVHLPR3   pHlp = pDevIns->pHlpR3;
     7748    PATASTATE       pThis   = PDMDEVINS_2_DATA(pDevIns, PATASTATE);
     7749    PATASTATER3     pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PATASTATER3);
     7750    PCPDMDEVHLPR3   pHlp    = pDevIns->pHlpR3;
    75497751    PPDMIBASE       pBase;
    75507752    int             rc;
     
    75587760    for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
    75597761    {
     7762        pThis->aCts[i].iCtl = i;
    75607763        pThis->aCts[i].hAsyncIOSem = NIL_SUPSEMEVENT;
    7561         pThis->aCts[i].SuspendIOSem = NIL_RTSEMEVENT;
    7562         pThis->aCts[i].AsyncIOThread = NIL_RTTHREAD;
    75637764        pThis->aCts[i].hIoPorts1First = NIL_IOMIOPORTHANDLE;
    75647765        pThis->aCts[i].hIoPorts1Other = NIL_IOMIOPORTHANDLE;
     
    75667767        pThis->aCts[i].hIoPortsEmpty1 = NIL_IOMIOPORTHANDLE;
    75677768        pThis->aCts[i].hIoPortsEmpty2 = NIL_IOMIOPORTHANDLE;
     7769
     7770        pThisCC->aCts[i].iCtl = i;
     7771        pThisCC->aCts[i].hSuspendIOSem = NIL_RTSEMEVENT;
     7772        pThisCC->aCts[i].hAsyncIOThread = NIL_RTTHREAD;
    75687773    }
    75697774
     
    75897794     */
    75907795    /* Status LUN. */
    7591     pThis->IBase.pfnQueryInterface = ataR3Status_QueryInterface;
    7592     pThis->ILeds.pfnQueryStatusLed = ataR3Status_QueryStatusLed;
     7796    pThisCC->IBase.pfnQueryInterface = ataR3Status_QueryInterface;
     7797    pThisCC->ILeds.pfnQueryStatusLed = ataR3Status_QueryStatusLed;
    75937798
    75947799    /* PCI configuration space. */
     
    76547859    PDMPciDevSetHeaderType(pPciDev, 0x00);
    76557860
    7656     pThis->pDevIns          = pDevIns;
    7657     pThis->fRCEnabled       = pDevIns->fRCEnabled;
    7658     pThis->fR0Enabled       = pDevIns->fR0Enabled;
     7861    pThisCC->pDevIns        = pDevIns;
    76597862    for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
    76607863    {
    7661         pThis->aCts[i].pDevInsR3 = pDevIns;
    7662         pThis->aCts[i].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
    7663         pThis->aCts[i].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    7664         pThis->aCts[i].msDelayIRQ = msDelayIRQ;
     7864        pThisCC->aCts[i].pDevIns    = pDevIns;
     7865        pThisCC->aCts[i].iCtl       = i;
     7866        pThis->aCts[i].iCtl         = i;
     7867        pThis->aCts[i].msDelayIRQ   = msDelayIRQ;
    76657868        for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++)
    76667869        {
    7667             ATADevState *pIf = &pThis->aCts[i].aIfs[j];
    7668 
    7669             pIf->iLUN      = i * RT_ELEMENTS(pThis->aCts) + j;
    7670             pIf->pDevInsR3 = pDevIns;
    7671             pIf->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
    7672             pIf->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    7673             pIf->pControllerR3 = &pThis->aCts[i];
    7674             pIf->pControllerR0 = PDMDEVINS_DATA_2_R0_REMOVE_ME(pDevIns, &pThis->aCts[i]);
    7675             pIf->pControllerRC = PDMDEVINS_DATA_2_R0_REMOVE_ME(pDevIns, &pThis->aCts[i]);
    7676             pIf->IBase.pfnQueryInterface       = ataR3QueryInterface;
    7677             pIf->IMountNotify.pfnMountNotify   = ataR3MountNotify;
    7678             pIf->IMountNotify.pfnUnmountNotify = ataR3UnmountNotify;
    7679             pIf->IPort.pfnQueryDeviceLocation  = ataR3QueryDeviceLocation;
    7680             pIf->Led.u32Magic                  = PDMLED_MAGIC;
     7870            PATADEVSTATE   pIf   = &pThis->aCts[i].aIfs[j];
     7871            PATADEVSTATER3 pIfR3 = &pThisCC->aCts[i].aIfs[j];
     7872
     7873            pIfR3->iLUN                             = pIf->iLUN = i * RT_ELEMENTS(pThis->aCts) + j;
     7874            pIfR3->iCtl                             = pIf->iCtl = i;
     7875            pIfR3->iDev                             = pIf->iDev = j;
     7876            pIfR3->pDevIns                          = pDevIns;
     7877            pIfR3->IBase.pfnQueryInterface          = ataR3QueryInterface;
     7878            pIfR3->IMountNotify.pfnMountNotify      = ataR3MountNotify;
     7879            pIfR3->IMountNotify.pfnUnmountNotify    = ataR3UnmountNotify;
     7880            pIfR3->IPort.pfnQueryDeviceLocation     = ataR3QueryDeviceLocation;
     7881            pIf->Led.u32Magic                       = PDMLED_MAGIC;
    76817882        }
    76827883    }
     
    77767977     * Attach status driver (optional).
    77777978     */
    7778     rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
     7979    rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThisCC->IBase, &pBase, "Status Port");
    77797980    if (RT_SUCCESS(rc))
    77807981    {
    7781         pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
    7782         pThis->pMediaNotify = PDMIBASE_QUERY_INTERFACE(pBase, PDMIMEDIANOTIFY);
     7982        pThisCC->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
     7983        pThisCC->pMediaNotify  = PDMIBASE_QUERY_INTERFACE(pBase, PDMIMEDIANOTIFY);
    77837984    }
    77847985    else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
     
    77947995    for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
    77957996    {
    7796         PATACONTROLLER pCtl = &pThis->aCts[i];
     7997        PATACONTROLLER   pCtl   = &pThis->aCts[i];
     7998        PATACONTROLLERR3 pCtlR3 = &pThisCC->aCts[i];
    77977999
    77988000        /*
     
    78028004        rc = PDMDevHlpSUPSemEventCreate(pDevIns, &pCtl->hAsyncIOSem);
    78038005        AssertLogRelRCReturn(rc, rc);
    7804         rc = RTSemEventCreate(&pCtl->SuspendIOSem);
     8006        rc = RTSemEventCreate(&pCtlR3->hSuspendIOSem);
    78058007        AssertLogRelRCReturn(rc, rc);
    78068008
    7807         ataR3AsyncIOClearRequests(pCtl);
    7808         rc = RTThreadCreateF(&pCtl->AsyncIOThread, ataR3AsyncIOThread, (void *)pCtl, 128*1024 /*cbStack*/,
     8009        ataR3AsyncIOClearRequests(pDevIns, pCtl);
     8010        rc = RTThreadCreateF(&pCtlR3->hAsyncIOThread, ataR3AsyncIOThread, pCtlR3, 0,
    78098011                             RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "ATA-%u", i);
    78108012        AssertLogRelRCReturn(rc, rc);
    7811         Assert(   pCtl->AsyncIOThread != NIL_RTTHREAD  && pCtl->hAsyncIOSem != NIL_SUPSEMEVENT
    7812                && pCtl->SuspendIOSem  != NIL_RTSEMEVENT && PDMDevHlpCritSectIsInitialized(pDevIns, &pCtl->AsyncIORequestLock));
    7813         Log(("%s: controller %d AIO thread id %#x; sem %p susp_sem %p\n", __FUNCTION__, i, pCtl->AsyncIOThread, pCtl->hAsyncIOSem, pCtl->SuspendIOSem));
     8013        Assert(   pCtlR3->hAsyncIOThread != NIL_RTTHREAD && pCtl->hAsyncIOSem != NIL_SUPSEMEVENT
     8014               && pCtlR3->hSuspendIOSem  != NIL_RTSEMEVENT && PDMDevHlpCritSectIsInitialized(pDevIns, &pCtl->AsyncIORequestLock));
     8015        Log(("%s: controller %d AIO thread id %#x; sem %p susp_sem %p\n", __FUNCTION__, i, pCtlR3->hAsyncIOThread, pCtl->hAsyncIOSem, pCtlR3->hSuspendIOSem));
    78148016
    78158017        for (uint32_t j = 0; j < RT_ELEMENTS(pCtl->aIfs); j++)
     
    78258027             * required as well as optional.
    78268028             */
    7827             ATADevState *pIf = &pCtl->aIfs[j];
    7828 
    7829             rc = PDMDevHlpDriverAttach(pDevIns, pIf->iLUN, &pIf->IBase, &pIf->pDrvBase, s_apszDescs[i][j]);
     8029            PATADEVSTATE   pIf   = &pCtl->aIfs[j];
     8030            PATADEVSTATER3 pIfR3 = &pCtlR3->aIfs[j];
     8031
     8032            rc = PDMDevHlpDriverAttach(pDevIns, pIf->iLUN, &pIfR3->IBase, &pIfR3->pDrvBase, s_apszDescs[i][j]);
    78308033            if (RT_SUCCESS(rc))
    78318034            {
    7832                 rc = ataR3ConfigLun(pIf);
     8035                rc = ataR3ConfigLun(pIf, pIfR3);
    78338036                if (RT_SUCCESS(rc))
    78348037                {
     
    78458048                    char szSerial[ATA_SERIAL_NUMBER_LENGTH+1];
    78468049                    RTUUID Uuid;
    7847                     if (pIf->pDrvMedia)
    7848                         rc = pIf->pDrvMedia->pfnGetUuid(pIf->pDrvMedia, &Uuid);
     8050                    if (pIfR3->pDrvMedia)
     8051                        rc = pIfR3->pDrvMedia->pfnGetUuid(pIfR3->pDrvMedia, &Uuid);
    78498052                    else
    78508053                        RTUuidClear(&Uuid);
     
    79378140                    }
    79388141                }
    7939 
    79408142            }
    79418143            else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
    79428144            {
    7943                 pIf->pDrvBase = NULL;
    7944                 pIf->pDrvMedia = NULL;
    7945                 pIf->cbIOBuffer = 0;
     8145                pIfR3->pDrvBase  = NULL;
     8146                pIfR3->pDrvMedia = NULL;
     8147                pIf->cbIOBuffer  = 0;
     8148                pIf->fPresent    = false;
    79468149                LogRel(("PIIX3 ATA: LUN#%d: no unit\n", pIf->iLUN));
    79478150            }
     
    79698172    for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++)
    79708173    {
    7971         if (!pThis->aCts[i].aIfs[0].pDrvMedia && !pThis->aCts[i].aIfs[1].pDrvMedia)
     8174        Assert(pThis->aCts[i].aIfs[0].fPresent == (pThisCC->aCts[i].aIfs[0].pDrvMedia != NULL));
     8175        Assert(pThis->aCts[i].aIfs[1].fPresent == (pThisCC->aCts[i].aIfs[1].pDrvMedia != NULL));
     8176
     8177        if (!pThisCC->aCts[i].aIfs[0].pDrvMedia && !pThisCC->aCts[i].aIfs[1].pDrvMedia)
    79728178        {
    79738179            /* No device present on this ATA bus; requires special handling. */
     
    80258231    PCIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);
    80268232
    8027     int rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPortsBmDma, ataBMDMAIOPortWrite, ataBMDMAIOPortRead, NULL /*pvUser*/);
     8233    int rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
     8234    AssertRCReturn(rc, rc);
     8235
     8236    rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPortsBmDma, ataBMDMAIOPortWrite, ataBMDMAIOPortRead, NULL /*pvUser*/);
    80288237    AssertRCReturn(rc, rc);
    80298238
     
    80698278    /* .uReserved0 = */             0,
    80708279    /* .szName = */                 "piix3ide",
    8071     /* .fFlags = */                 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RZ |
    8072                                     PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION | PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION |
    8073                                     PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
     8280    /* .fFlags = */                 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RZ | PDM_DEVREG_FLAGS_NEW_STYLE
     8281                                    | PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION | PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION
     8282                                    | PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
    80748283    /* .fClass = */                 PDM_DEVREG_CLASS_STORAGE,
    80758284    /* .cMaxInstances = */          1,
    80768285    /* .uSharedVersion = */         42,
    8077     /* .cbInstanceShared = */       sizeof(PCIATAState),
    8078     /* .cbInstanceCC = */           0,
    8079     /* .cbInstanceRC = */           0,
     8286    /* .cbInstanceShared = */       sizeof(ATASTATE),
     8287    /* .cbInstanceCC = */           sizeof(ATASTATECC),
     8288    /* .cbInstanceRC = */           sizeof(ATASTATERC),
    80808289    /* .cMaxPciDevices = */         1,
    80818290    /* .cMaxMsixVectors = */        0,
     
    80918300    /* .pfnConstruct = */           ataR3Construct,
    80928301    /* .pfnDestruct = */            ataR3Destruct,
    8093     /* .pfnRelocate = */            ataR3Relocate,
     8302    /* .pfnRelocate = */            NULL,
    80948303    /* .pfnMemSetup = */            NULL,
    80958304    /* .pfnPowerOn = */             NULL,
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