Changeset 81867 in vbox
- Timestamp:
- Nov 15, 2019 11:50:16 AM (5 years ago)
- Location:
- trunk/src/VBox/Devices
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Storage/DevATA.cpp
r81862 r81867 193 193 * The shared state of an ATA device. 194 194 */ 195 typedef struct ATAD evState195 typedef struct ATADEVSTATE 196 196 { 197 197 /** The I/O buffer. … … 381 381 /** Padding the structure to a multiple of 4096 for better I/O buffer alignment. */ 382 382 uint8_t abAlignment4[7 + 3544]; 383 } ATADEVSTATE , ATADevState;383 } ATADEVSTATE; 384 384 AssertCompileMemberAlignment(ATADEVSTATE, cTotalSectors, 8); 385 385 AssertCompileMemberAlignment(ATADEVSTATE, StatATADMA, 8); … … 509 509 { 510 510 /** The ATA/ATAPI interfaces of this controller. */ 511 ATAD evStateaIfs[2];511 ATADEVSTATE aIfs[2]; 512 512 513 513 /** The base of the first I/O Port range. */ … … 591 591 AssertCompileMemberAlignment(ATACONTROLLER, AsyncIORequestLock, 8); 592 592 AssertCompileSizeAlignment(ATACONTROLLER, 4096); /* To align the controllers, devices and I/O buffers on page boundaries. */ 593 594 593 /** Pointer to the shared state of an ATA controller. */ 595 594 typedef ATACONTROLLER *PATACONTROLLER; … … 631 630 CHIPSET_PIIX3 = 0, 632 631 /** PIIX4 chipset, must be 1 for saved state compatibility */ 633 CHIPSET_PIIX4 = 1,632 CHIPSET_PIIX4, 634 633 /** ICH6 chipset */ 635 CHIPSET_ICH6 = 2 634 CHIPSET_ICH6, 635 CHIPSET_32BIT_HACK=0x7fffffff 636 636 } CHIPSET; 637 AssertCompileSize(CHIPSET, 4); 637 638 638 639 /** 639 640 * The shared state of a ATA PCI device. 640 641 */ 641 typedef struct PCIATAState642 typedef struct ATASTATE 642 643 { 643 644 /** The controllers. */ 644 645 ATACONTROLLER aCts[2]; 645 /** Flag indicating chipset being emulated (CHIPSET). */646 uint8_t u8Type;646 /** Flag indicating chipset being emulated. */ 647 CHIPSET enmChipset; 647 648 /** Explicit alignment padding. */ 648 649 uint8_t abAlignment1[7]; 649 650 /** PCI region \#4: Bus-master DMA I/O ports. */ 650 651 IOMIOPORTHANDLE hIoPortsBmDma; 651 } PCIATAState,ATASTATE;652 } ATASTATE; 652 653 /** Pointer to the shared state of an ATA PCI device. */ 653 654 typedef ATASTATE *PATASTATE; … … 710 711 711 712 #ifdef IN_RING3 712 DECLINLINE(void) ataSetStatusValue(PATACONTROLLER pCtl, ATADevState *s, uint8_t stat)713 DECLINLINE(void) ataSetStatusValue(PATACONTROLLER pCtl, PATADEVSTATE s, uint8_t stat) 713 714 { 714 715 /* Freeze status register contents while processing RESET. */ … … 722 723 723 724 724 DECLINLINE(void) ataSetStatus(PATACONTROLLER pCtl, ATADevState *s, uint8_t stat)725 DECLINLINE(void) ataSetStatus(PATACONTROLLER pCtl, PATADEVSTATE s, uint8_t stat) 725 726 { 726 727 /* Freeze status register contents while processing RESET. */ … … 733 734 734 735 735 DECLINLINE(void) ataUnsetStatus(PATACONTROLLER pCtl, ATADevState *s, uint8_t stat)736 DECLINLINE(void) ataUnsetStatus(PATACONTROLLER pCtl, PATADEVSTATE s, uint8_t stat) 736 737 { 737 738 /* Freeze status register contents while processing RESET. */ … … 1063 1064 * @param fChainedTransfer Whether this is a transfer that is part of the previous command/transfer. 1064 1065 */ 1065 static void ataR3StartTransfer(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s,1066 static void ataR3StartTransfer(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, 1066 1067 uint32_t cbTotalTransfer, uint8_t uTxDir, ATAFNBT iBeginTransfer, 1067 1068 ATAFNSS iSourceSink, bool fChainedTransfer) … … 1116 1117 * @param fResetDrive Whether to reset the drive or just abort a command. 1117 1118 */ 1118 static void ataR3AbortCurrentCommand(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s, bool fResetDrive)1119 static void ataR3AbortCurrentCommand(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, bool fResetDrive) 1119 1120 { 1120 1121 ATARequest Req; … … 1146 1147 * @param s Pointer to the ATA device state data. 1147 1148 */ 1148 static void ataHCSetIRQ(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s)1149 static void ataHCSetIRQ(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s) 1149 1150 { 1150 1151 if (!s->fIrqPending) … … 1180 1181 * @param s Pointer to the ATA device state data. 1181 1182 */ 1182 static void ataUnsetIRQ(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s)1183 static void ataUnsetIRQ(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s) 1183 1184 { 1184 1185 if (s->fIrqPending) … … 1202 1203 #if defined(IN_RING0) || defined(IN_RING3) 1203 1204 1204 static void ataHCPIOTransferStart(PATACONTROLLER pCtl, ATADevState *s, uint32_t start, uint32_t size)1205 static void ataHCPIOTransferStart(PATACONTROLLER pCtl, PATADEVSTATE s, uint32_t start, uint32_t size) 1205 1206 { 1206 1207 Log2(("%s: LUN#%d start %d size %d\n", __FUNCTION__, s->iLUN, start, size)); … … 1212 1213 1213 1214 1214 static void ataHCPIOTransferStop(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s)1215 static void ataHCPIOTransferStop(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s) 1215 1216 { 1216 1217 Log2(("%s: LUN#%d\n", __FUNCTION__, s->iLUN)); … … 1231 1232 1232 1233 1233 static void ataHCPIOTransferLimitATAPI( ATADevState *s)1234 static void ataHCPIOTransferLimitATAPI(PATADEVSTATE s) 1234 1235 { 1235 1236 uint32_t cbLimit, cbTransfer; … … 1283 1284 } 1284 1285 1285 static uint32_t ataR3GetNSectors( ATADevState *s)1286 static uint32_t ataR3GetNSectors(PATADEVSTATE s) 1286 1287 { 1287 1288 /* 0 means either 256 (LBA28) or 65536 (LBA48) sectors. */ … … 1345 1346 #endif /* unused */ 1346 1347 1347 static void ataR3CmdOK(PATACONTROLLER pCtl, ATADevState *s, uint8_t status)1348 static void ataR3CmdOK(PATACONTROLLER pCtl, PATADEVSTATE s, uint8_t status) 1348 1349 { 1349 1350 s->uATARegError = 0; /* Not needed by ATA spec, but cannot hurt. */ … … 1352 1353 1353 1354 1354 static void ataR3CmdError(PATACONTROLLER pCtl, ATADevState *s, uint8_t uErrorCode)1355 static void ataR3CmdError(PATACONTROLLER pCtl, PATADEVSTATE s, uint8_t uErrorCode) 1355 1356 { 1356 1357 Log(("%s: code=%#x\n", __FUNCTION__, uErrorCode)); … … 1585 1586 1586 1587 1587 static void ataR3SetSignature( ATADevState *s)1588 static void ataR3SetSignature(PATADEVSTATE s) 1588 1589 { 1589 1590 s->uATARegSelect &= 0xf0; /* clear head */ … … 1604 1605 1605 1606 1606 static uint64_t ataR3GetSector( ATADevState *s)1607 static uint64_t ataR3GetSector(PATADEVSTATE s) 1607 1608 { 1608 1609 uint64_t iLBA; … … 1640 1641 } 1641 1642 1642 static void ataR3SetSector( ATADevState *s, uint64_t iLBA)1643 static void ataR3SetSector(PATADEVSTATE s, uint64_t iLBA) 1643 1644 { 1644 1645 uint32_t cyl, r; … … 1740 1741 1741 1742 1742 static int ataR3ReadSectors(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s, PATADEVSTATER3 pDevR3,1743 static int ataR3ReadSectors(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3, 1743 1744 uint64_t u64Sector, void *pvBuf, uint32_t cSectors, bool *pfRedo) 1744 1745 { … … 1771 1772 1772 1773 1773 static int ataR3WriteSectors(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s, PATADEVSTATER3 pDevR3,1774 static int ataR3WriteSectors(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, PATADEVSTATER3 pDevR3, 1774 1775 uint64_t u64Sector, const void *pvBuf, uint32_t cSectors, bool *pfRedo) 1775 1776 { … … 1813 1814 * Begin Transfer: READ/WRITE SECTORS 1814 1815 */ 1815 static void ataR3ReadWriteSectorsBT(PATACONTROLLER pCtl, ATADevState *s)1816 static void ataR3ReadWriteSectorsBT(PATACONTROLLER pCtl, PATADEVSTATE s) 1816 1817 { 1817 1818 uint32_t const cbSector = RT_MAX(s->cbSector, 1); … … 1912 1913 1913 1914 1914 static void atapiR3CmdOK(PATACONTROLLER pCtl, ATADevState *s)1915 static void atapiR3CmdOK(PATACONTROLLER pCtl, PATADEVSTATE s) 1915 1916 { 1916 1917 s->uATARegError = 0; … … 1927 1928 1928 1929 1929 static void atapiR3CmdError(PATACONTROLLER pCtl, ATADevState *s, const uint8_t *pabATAPISense, size_t cbATAPISense)1930 static void atapiR3CmdError(PATACONTROLLER pCtl, PATADEVSTATE s, const uint8_t *pabATAPISense, size_t cbATAPISense) 1930 1931 { 1931 1932 Log(("%s: sense=%#x (%s) asc=%#x ascq=%#x (%s)\n", __FUNCTION__, pabATAPISense[2] & 0x0f, SCSISenseText(pabATAPISense[2] & 0x0f), … … 1950 1951 /** @todo deprecated function - doesn't provide enough info. Replace by direct 1951 1952 * calls to atapiR3CmdError() with full data. */ 1952 static void atapiR3CmdErrorSimple(PATACONTROLLER pCtl, ATADevState *s, uint8_t uATAPISenseKey, uint8_t uATAPIASC)1953 static void atapiR3CmdErrorSimple(PATACONTROLLER pCtl, PATADEVSTATE s, uint8_t uATAPISenseKey, uint8_t uATAPIASC) 1953 1954 { 1954 1955 uint8_t abATAPISense[ATAPI_SENSE_SIZE]; … … 1965 1966 * Begin Transfer: ATAPI command 1966 1967 */ 1967 static void atapiR3CmdBT(PATACONTROLLER pCtl, ATADevState *s)1968 static void atapiR3CmdBT(PATACONTROLLER pCtl, PATADEVSTATE s) 1968 1969 { 1969 1970 s->fATAPITransfer = true; … … 1979 1980 * Begin Transfer: ATAPI Passthrough command 1980 1981 */ 1981 static void atapiR3PassthroughCmdBT(PATACONTROLLER pCtl, ATADevState *s)1982 static void atapiR3PassthroughCmdBT(PATACONTROLLER pCtl, PATADEVSTATE s) 1982 1983 { 1983 1984 atapiR3CmdBT(pCtl, s); … … 2106 2107 * Sets the given media track type. 2107 2108 */ 2108 static uint32_t ataR3MediumTypeSet( ATADevState *s, uint32_t MediaTrackType)2109 static uint32_t ataR3MediumTypeSet(PATADEVSTATE s, uint32_t MediaTrackType) 2109 2110 { 2110 2111 return ASMAtomicXchgU32(&s->MediaTrackType, MediaTrackType); … … 2574 2575 2575 2576 2576 static bool atapiR3ReadSectors(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s,2577 static bool atapiR3ReadSectors(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s, 2577 2578 uint32_t iATAPILBA, uint32_t cSectors, uint32_t cbSector) 2578 2579 { … … 2729 2730 } 2730 2731 2731 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureListProfiles( ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2732 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureListProfiles(PATADEVSTATE s, uint8_t *pbBuf, size_t cbBuf) 2732 2733 { 2733 2734 RT_NOREF(s); … … 2748 2749 } 2749 2750 2750 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureCore( ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2751 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureCore(PATADEVSTATE s, uint8_t *pbBuf, size_t cbBuf) 2751 2752 { 2752 2753 RT_NOREF(s); … … 2764 2765 } 2765 2766 2766 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureMorphing( ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2767 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureMorphing(PATADEVSTATE s, uint8_t *pbBuf, size_t cbBuf) 2767 2768 { 2768 2769 RT_NOREF(s); … … 2779 2780 } 2780 2781 2781 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureRemovableMedium( ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2782 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureRemovableMedium(PATADEVSTATE s, uint8_t *pbBuf, size_t cbBuf) 2782 2783 { 2783 2784 RT_NOREF(s); … … 2795 2796 } 2796 2797 2797 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureRandomReadable ( ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2798 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureRandomReadable (PATADEVSTATE s, uint8_t *pbBuf, size_t cbBuf) 2798 2799 { 2799 2800 RT_NOREF(s); … … 2812 2813 } 2813 2814 2814 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureCDRead( ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2815 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureCDRead(PATADEVSTATE s, uint8_t *pbBuf, size_t cbBuf) 2815 2816 { 2816 2817 RT_NOREF(s); … … 2827 2828 } 2828 2829 2829 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeaturePowerManagement( ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2830 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeaturePowerManagement(PATADEVSTATE s, uint8_t *pbBuf, size_t cbBuf) 2830 2831 { 2831 2832 RT_NOREF(s); … … 2840 2841 } 2841 2842 2842 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureTimeout( ATADevState *s, uint8_t *pbBuf, size_t cbBuf)2843 static DECLCALLBACK(uint32_t) atapiR3GetConfigurationFillFeatureTimeout(PATADEVSTATE s, uint8_t *pbBuf, size_t cbBuf) 2843 2844 { 2844 2845 RT_NOREF(s); … … 2862 2863 * @param cbBuf Size of the buffer. 2863 2864 */ 2864 typedef DECLCALLBACK(uint32_t) FNATAPIR3FEATUREFILL( ATADevState *s, uint8_t *pbBuf, size_t cbBuf);2865 typedef DECLCALLBACK(uint32_t) FNATAPIR3FEATUREFILL(PATADEVSTATE s, uint8_t *pbBuf, size_t cbBuf); 2865 2866 /** Pointer to a feature fill callback. */ 2866 2867 typedef FNATAPIR3FEATUREFILL *PFNATAPIR3FEATUREFILL; … … 4002 4003 * from now on, regardless if there was a medium inserted or not. 4003 4004 */ 4004 static void ataR3MediumRemoved( ATADevState *s)4005 static void ataR3MediumRemoved(PATADEVSTATE s) 4005 4006 { 4006 4007 ASMAtomicWriteU32(&s->MediaEventStatus, ATA_EVENT_STATUS_MEDIA_REMOVED); … … 4013 4014 * removed" event first. 4014 4015 */ 4015 static void ataR3MediumInserted( ATADevState *s)4016 static void ataR3MediumInserted(PATADEVSTATE s) 4016 4017 { 4017 4018 uint32_t OldStatus, NewStatus; … … 4092 4093 * Begin Transfer: PACKET 4093 4094 */ 4094 static void ataR3PacketBT(PATACONTROLLER pCtl, ATADevState *s)4095 static void ataR3PacketBT(PATACONTROLLER pCtl, PATADEVSTATE s) 4095 4096 { 4096 4097 s->cbElementaryTransfer = s->cbTotalTransfer; … … 4102 4103 4103 4104 4104 static void ataR3ResetDevice(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s)4105 static void ataR3ResetDevice(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s) 4105 4106 { 4106 4107 s->cMultSectors = ATA_MAX_MULT_SECTORS; … … 4128 4129 4129 4130 4130 static void ataR3DeviceDiag(PATACONTROLLER pCtl, ATADevState *s)4131 static void ataR3DeviceDiag(PATACONTROLLER pCtl, PATADEVSTATE s) 4131 4132 { 4132 4133 ataR3SetSignature(s); … … 4690 4691 static VBOXSTRICTRC ataIOPortReadU8(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, uint32_t addr, uint32_t *pu32) 4691 4692 { 4692 ATADevState *s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK];4693 PATADEVSTATE s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK]; 4693 4694 uint32_t val; 4694 4695 bool fHOB; … … 4873 4874 static uint32_t ataStatusRead(PATACONTROLLER pCtl, uint32_t uIoPortForLog) 4874 4875 { 4875 ATADevState *s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK];4876 PATADEVSTATE s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK]; 4876 4877 uint32_t val; 4877 4878 RT_NOREF(uIoPortForLog); … … 5002 5003 static void ataHCPIOTransfer(PPDMDEVINS pDevIns, PATACONTROLLER pCtl) 5003 5004 { 5004 ATADevState *s;5005 PATADEVSTATE s; 5005 5006 5006 5007 s = &pCtl->aIfs[pCtl->iAIOIf & ATA_SELECTED_IF_MASK]; … … 5065 5066 5066 5067 5067 DECLINLINE(void) ataHCPIOTransferFinish(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, ATADevState *s)5068 DECLINLINE(void) ataHCPIOTransferFinish(PPDMDEVINS pDevIns, PATACONTROLLER pCtl, PATADEVSTATE s) 5068 5069 { 5069 5070 /* Do not interfere with RESET processing if the PIO transfer finishes … … 5125 5126 * @param cbCopy The number of bytes to copy, either 1, 2 or 4 bytes. 5126 5127 */ 5127 DECL_NO_INLINE(static, void) ataCopyPioData124Slow( ATADevState *pIf, uint8_t *pbDst, const uint8_t *pbSrc,5128 DECL_NO_INLINE(static, void) ataCopyPioData124Slow(PATADEVSTATE pIf, uint8_t *pbDst, const uint8_t *pbSrc, 5128 5129 uint32_t offStart, uint32_t cbCopy) 5129 5130 { … … 5170 5171 * @param cbCopy The number of bytes to copy, either 1, 2 or 4 bytes. 5171 5172 */ 5172 DECLINLINE(void) ataCopyPioData124( ATADevState *pIf, uint8_t *pbDst, const uint8_t *pbSrc, uint32_t offStart, uint32_t cbCopy)5173 DECLINLINE(void) ataCopyPioData124(PATADEVSTATE pIf, uint8_t *pbDst, const uint8_t *pbSrc, uint32_t offStart, uint32_t cbCopy) 5173 5174 { 5174 5175 /* … … 5204 5205 ataIOPortWrite1Data(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 5205 5206 { 5206 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);5207 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 5207 5208 PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)]; 5208 5209 RT_NOREF(offPort); … … 5215 5216 if (rc == VINF_SUCCESS) 5216 5217 { 5217 ATADevState *s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK];5218 PATADEVSTATE s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK]; 5218 5219 uint32_t const iIOBufferPIODataStart = RT_MIN(s->iIOBufferPIODataStart, sizeof(s->abIOBuffer)); 5219 5220 uint32_t const iIOBufferPIODataEnd = RT_MIN(s->iIOBufferPIODataEnd, sizeof(s->abIOBuffer)); … … 5275 5276 ataIOPortRead1Data(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 5276 5277 { 5277 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);5278 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 5278 5279 PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)]; 5279 5280 RT_NOREF(offPort); … … 5291 5292 if (rc == VINF_SUCCESS) 5292 5293 { 5293 ATADevState *s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK];5294 PATADEVSTATE s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK]; 5294 5295 5295 5296 if (s->iIOBufferPIODataStart < s->iIOBufferPIODataEnd) … … 5363 5364 ataIOPortReadStr1Data(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint8_t *pbDst, uint32_t *pcTransfers, unsigned cb) 5364 5365 { 5365 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);5366 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 5366 5367 PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)]; 5367 5368 RT_NOREF(offPort); … … 5377 5378 if (rc == VINF_SUCCESS) 5378 5379 { 5379 ATADevState *s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK];5380 PATADEVSTATE s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK]; 5380 5381 5381 5382 uint32_t const offStart = s->iIOBufferPIODataStart; … … 5454 5455 ataIOPortWriteStr1Data(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint8_t const *pbSrc, uint32_t *pcTransfers, unsigned cb) 5455 5456 { 5456 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);5457 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 5457 5458 PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)]; 5458 5459 RT_NOREF(offPort); … … 5468 5469 if (rc == VINF_SUCCESS) 5469 5470 { 5470 ATADevState *s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK];5471 PATADEVSTATE s = &pCtl->aIfs[pCtl->iSelectedIf & ATA_SELECTED_IF_MASK]; 5471 5472 5472 5473 uint32_t const offStart = s->iIOBufferPIODataStart; … … 5535 5536 #ifdef IN_RING3 5536 5537 5537 static void ataR3DMATransferStop( ATADevState *s)5538 static void ataR3DMATransferStop(PATADEVSTATE s) 5538 5539 { 5539 5540 s->cbTotalTransfer = 0; … … 6385 6386 ataBMDMAIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 6386 6387 { 6387 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);6388 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 6388 6389 PATACONTROLLER pCtl = &pThis->aCts[(offPort >> BM_DMA_CTL_IOPORTS_SHIFT) % RT_ELEMENTS(pThis->aCts)]; 6389 6390 RT_NOREF(pvUser); … … 6420 6421 ataBMDMAIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 6421 6422 { 6422 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);6423 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 6423 6424 PATACONTROLLER pCtl = &pThis->aCts[(offPort >> BM_DMA_CTL_IOPORTS_SHIFT) % RT_ELEMENTS(pThis->aCts)]; 6424 6425 RT_NOREF(pvUser); … … 6456 6457 #ifdef IN_RING3 6457 6458 6458 /* -=-=-=-=-=- PCIATAState::IBase -=-=-=-=-=- */6459 /* -=-=-=-=-=- ATASTATE::IBase -=-=-=-=-=- */ 6459 6460 6460 6461 /** … … 6470 6471 6471 6472 6472 /* -=-=-=-=-=- PCIATAState::ILeds -=-=-=-=-=- */6473 /* -=-=-=-=-=- ATASTATE::ILeds -=-=-=-=-=- */ 6473 6474 6474 6475 /** … … 6500 6501 6501 6502 6502 /* -=-=-=-=-=- ATAD evState::IBase -=-=-=-=-=- */6503 /* -=-=-=-=-=- ATADEVSTATE::IBase -=-=-=-=-=- */ 6503 6504 6504 6505 /** … … 6515 6516 6516 6517 6517 /* -=-=-=-=-=- ATAD evState::IPort -=-=-=-=-=- */6518 /* -=-=-=-=-=- ATADEVSTATE::IPort -=-=-=-=-=- */ 6518 6519 6519 6520 /** … … 6553 6554 6554 6555 #ifdef VBOX_STRICT 6555 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);6556 PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)];6556 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 6557 PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)]; 6557 6558 Assert((uintptr_t)pvUser < 2); 6558 6559 Assert(!pCtl->aIfs[0].fPresent && !pCtl->aIfs[1].fPresent); … … 6576 6577 6577 6578 #ifdef VBOX_STRICT 6578 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);6579 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 6579 6580 PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)]; 6580 6581 Assert((uintptr_t)pvUser < 2); … … 6608 6609 ataIOPortWrite1Other(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 6609 6610 { 6610 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);6611 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 6611 6612 uintptr_t iCtl = (uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts); 6612 6613 PATACONTROLLER pCtl = &pThis->aCts[iCtl]; … … 6640 6641 ataIOPortRead1Other(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 6641 6642 { 6642 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);6643 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 6643 6644 PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)]; 6644 6645 … … 6678 6679 ataIOPortWrite2(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 6679 6680 { 6680 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);6681 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 6681 6682 PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)]; 6682 6683 int rc; … … 6710 6711 ataIOPortRead2(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 6711 6712 { 6712 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);6713 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 6713 6714 PATACONTROLLER pCtl = &pThis->aCts[(uintptr_t)pvUser % RT_ELEMENTS(pThis->aCts)]; 6714 6715 int rc; … … 7086 7087 static DECLCALLBACK(int) ataR3SaveLoadPrep(PPDMDEVINS pDevIns, PSSMHANDLE pSSM) 7087 7088 { 7089 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 7088 7090 RT_NOREF(pSSM); 7089 PCIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);7090 7091 7091 7092 /* sanity - the suspend notification will wait on the async stuff. */ … … 7107 7108 RT_NOREF(uPass); 7108 7109 7109 pHlp->pfnSSMPutU8(pSSM, pThis->u8Type);7110 pHlp->pfnSSMPutU8(pSSM, (uint8_t)pThis->enmChipset); 7110 7111 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) 7111 7112 { … … 7247 7248 rc = pHlp->pfnSSMGetU8(pSSM, &u8Type); 7248 7249 AssertRCReturn(rc, rc); 7249 if ( u8Type != pThis->u8Type)7250 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch: u8Type - saved=%u config=%u"), u8Type, pThis->u8Type);7250 if ((CHIPSET)u8Type != pThis->enmChipset) 7251 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS, N_("Config mismatch: enmChipset - saved=%u config=%u"), u8Type, pThis->enmChipset); 7251 7252 7252 7253 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) … … 7298 7299 7299 7300 /* 7300 * Restore valid parts of the PCIATAStatestructure7301 * Restore valid parts of the ATASTATE structure 7301 7302 */ 7302 7303 for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aCts); i++) … … 7431 7432 } 7432 7433 if (uVersion <= ATA_SAVED_STATE_VERSION_VBOX_30) 7433 pHlp->pfnSSMGetU8(pSSM, &pThis->u8Type);7434 PDMDEVHLP_SSM_GET_ENUM8_RET(pHlp, pSSM, pThis->enmChipset, CHIPSET); 7434 7435 7435 7436 rc = pHlp->pfnSSMGetU32(pSSM, &u32); … … 7503 7504 static DECLCALLBACK(bool) ataR3IsAsyncResetDone(PPDMDEVINS pDevIns) 7504 7505 { 7505 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);7506 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 7506 7507 7507 7508 if (!ataR3AllAsyncIOIsIdle(pDevIns)) … … 7793 7794 if (RT_FAILURE(rc)) 7794 7795 return rc; 7795 pThis-> u8Type = (uint8_t)enmChipset;7796 pThis->enmChipset = enmChipset; 7796 7797 7797 7798 /* … … 7922 7923 for (uint32_t j = 0; j < RT_ELEMENTS(pThis->aCts[i].aIfs); j++) 7923 7924 { 7924 ATADevState *pIf = &pThis->aCts[i].aIfs[j];7925 PATADEVSTATE pIf = &pThis->aCts[i].aIfs[j]; 7925 7926 PDMDevHlpSTAMRegisterF(pDevIns, &pIf->StatATADMA, STAMTYPE_COUNTER, STAMVISIBILITY_ALWAYS, STAMUNIT_OCCURENCES, 7926 7927 "Number of ATA DMA transfers.", "/Devices/IDE%d/ATA%d/Unit%d/DMA", iInstance, i, j); … … 8234 8235 { 8235 8236 PDMDEV_CHECK_VERSIONS_RETURN(pDevIns); 8236 P CIATAState *pThis = PDMDEVINS_2_DATA(pDevIns, PCIATAState *);8237 PATASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PATASTATE); 8237 8238 8238 8239 int rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns)); -
trunk/src/VBox/Devices/testcase/tstDeviceStructSize.cpp
r81782 r81867 329 329 CHECK_MEMBER_ALIGNMENT(APICDEV, pDevInsR0, 8); 330 330 331 CHECK_MEMBER_ALIGNMENT(ATAD evState, cTotalSectors, 8);332 CHECK_MEMBER_ALIGNMENT(ATAD evState, StatATADMA, 8);333 CHECK_MEMBER_ALIGNMENT(ATAD evState, StatReads, 8);331 CHECK_MEMBER_ALIGNMENT(ATADEVSTATE, cTotalSectors, 8); 332 CHECK_MEMBER_ALIGNMENT(ATADEVSTATE, StatATADMA, 8); 333 CHECK_MEMBER_ALIGNMENT(ATADEVSTATE, StatReads, 8); 334 334 CHECK_MEMBER_ALIGNMENT(ATACONTROLLER, lock, 8); 335 335 CHECK_MEMBER_ALIGNMENT(ATACONTROLLER, StatAsyncOps, 8);
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