Changeset 81886 in vbox for trunk/src/VBox/Devices/Storage

Timestamp:

Nov 15, 2019 10:27:05 PM (5 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

134681

Message:

DevAHCI: Split up structures. More or less done converting to new PDM device style. bugref:9218

File:

• trunk/src/VBox/Devices/Storage/DevAHCI.cpp (modified) (253 diffs)

trunk/src/VBox/Devices/Storage/DevAHCI.cpp

@@ -281 +281 @@
 
 /**
- * @implements PDMIBASE
- * @implements PDMIMEDIAPORT
- * @implements PDMIMEDIAEXPORT
- */
-typedef struct AHCIPort
-{
-    /** Pointer to the device instance - HC ptr */
-    PPDMDEVINSR3                    pDevInsR3;
-    /** Pointer to the device instance - R0 ptr */
-    PPDMDEVINSR0                    pDevInsR0;
-    /** Pointer to the device instance - RC ptr. */
-    PPDMDEVINSRC                    pDevInsRC;
-
-#if HC_ARCH_BITS == 64
-    uint32_t                        Alignment0;
-#endif
-
-    /** Pointer to the parent AHCI structure - R3 ptr. */
-    R3PTRTYPE(struct AHCI *)        pAhciR3;
-    /** Pointer to the parent AHCI structure - R0 ptr. */
-    R0PTRTYPE(struct AHCI *)        pAhciR0;
-    /** Pointer to the parent AHCI structure - RC ptr. */
-    RCPTRTYPE(struct AHCI *)        pAhciRC;
-
+ * The shared state of an AHCI port.
+ */
+typedef struct AHCIPORT
+{
     /** Command List Base Address. */
     uint32_t                        regCLB;
@@ -336 +316 @@
     /** Current number of active tasks. */
     volatile uint32_t               cTasksActive;
+    uint32_t                        u32Alignment1;
     /** Command List Base Address */
     volatile RTGCPHYS               GCPhysAddrClb;
@@ -362 +343 @@
     volatile bool                   fWrkThreadSleeping;
 
-    bool                            afAlignment[4];
+    bool                            afAlignment1[2];
 
     /** Number of total sectors. */
@@ -370 +351 @@
     /** Currently configured number of sectors in a multi-sector transfer. */
     uint32_t                        cMultSectors;
+    /** The LUN (same as port number). */
+    uint32_t                        iLUN;
+    /** Set if there is a device present at the port. */
+    bool                            fPresent;
     /** Currently active transfer mode (MDMA/UDMA) and speed. */
     uint8_t                         uATATransferMode;
+    /** Exponent of logical sectors in a physical sector, number of logical sectors is 2^exp. */
+    uint8_t                         cLogSectorsPerPhysicalExp;
+    uint8_t                         bAlignment2;
     /** ATAPI sense data. */
     uint8_t                         abATAPISense[ATAPI_SENSE_SIZE];
-    /** Exponent of logical sectors in a physical sector, number of logical sectors is 2^exp. */
-    uint8_t                         cLogSectorsPerPhysicalExp;
-    /** The LUN. */
-    RTUINT                          iLUN;
 
     /** Bitmap for finished tasks (R3 -> Guest). */
@@ -393 +377 @@
     volatile uint32_t               u32CurrentCommandSlot;
 
-#if HC_ARCH_BITS == 64
-    uint32_t                        u32Alignment2;
-#endif
-
-    /** Device specific settings (R3 only stuff). */
-    /** Pointer to the attached driver's base interface. */
-    R3PTRTYPE(PPDMIBASE)            pDrvBase;
-    /** Pointer to the attached driver's block interface. */
-    R3PTRTYPE(PPDMIMEDIA)           pDrvMedia;
-    /** Pointer to the attached driver's extended interface. */
-    R3PTRTYPE(PPDMIMEDIAEX)         pDrvMediaEx;
-    /** Port description. */
-    R3PTRTYPE(char *)               pszDesc;
-    /** The base interface. */
-    PDMIBASE                        IBase;
-    /** The block port interface. */
-    PDMIMEDIAPORT                   IPort;
-    /** The extended media port interface. */
-    PDMIMEDIAEXPORT                 IMediaExPort;
     /** Physical geometry of this image. */
     PDMMEDIAGEOMETRY                PCHSGeometry;
+
     /** The status LED state for this drive. */
     PDMLED                          Led;
-
-#if HC_ARCH_BITS == 64
-    uint32_t                        u32Alignment3;
-#endif
-
-    /** Async IO Thread. */
-    R3PTRTYPE(PPDMTHREAD)           pAsyncIOThread;
-    /** First task throwing an error. */
-    R3PTRTYPE(volatile PAHCIREQ)    pTaskErr;
 
     /** The event semaphore the processing thread waits on. */
@@ -445 +402 @@
 
     uint32_t                        u32Alignment5;
-
-} AHCIPort;
-AssertCompileSizeAlignment(AHCIPort, 8);
-/** Pointer to the state of an AHCI port. */
-typedef AHCIPort *PAHCIPort;
+} AHCIPORT;
+AssertCompileSizeAlignment(AHCIPORT, 8);
+/** Pointer to the shared state of an AHCI port. */
+typedef AHCIPORT *PAHCIPORT;
+
+
+/**
+ * The ring-3 state of an AHCI port.
+ *
+ * @implements PDMIBASE
+ * @implements PDMIMEDIAPORT
+ * @implements PDMIMEDIAEXPORT
+ */
+typedef struct AHCIPORTR3
+{
+    /** Pointer to the device instance - only to get our bearings in an interface
+     *  method, nothing else. */
+    PPDMDEVINSR3                    pDevIns;
+
+    /** The LUN (same as port number). */
+    uint32_t                        iLUN;
+
+    /** Device specific settings (R3 only stuff). */
+    /** Pointer to the attached driver's base interface. */
+    R3PTRTYPE(PPDMIBASE)            pDrvBase;
+    /** Pointer to the attached driver's block interface. */
+    R3PTRTYPE(PPDMIMEDIA)           pDrvMedia;
+    /** Pointer to the attached driver's extended interface. */
+    R3PTRTYPE(PPDMIMEDIAEX)         pDrvMediaEx;
+    /** Port description. */
+    char                            szDesc[8];
+    /** The base interface. */
+    PDMIBASE                        IBase;
+    /** The block port interface. */
+    PDMIMEDIAPORT                   IPort;
+    /** The extended media port interface. */
+    PDMIMEDIAEXPORT                 IMediaExPort;
+
+    /** Async IO Thread. */
+    R3PTRTYPE(PPDMTHREAD)           pAsyncIOThread;
+    /** First task throwing an error. */
+    R3PTRTYPE(volatile PAHCIREQ)    pTaskErr;
+
+} AHCIPORTR3;
+AssertCompileSizeAlignment(AHCIPORTR3, 8);
+/** Pointer to the ring-3 state of an AHCI port. */
+typedef AHCIPORTR3 *PAHCIPORTR3;
 
 
@@ -459 +458 @@
 typedef struct AHCI
 {
-    /** Pointer to the device instance - R3 ptr */
-    PPDMDEVINSR3                    pDevInsR3;
-    /** Pointer to the device instance - R0 ptr */
-    PPDMDEVINSR0                    pDevInsR0;
-    /** Pointer to the device instance - RC ptr. */
-    PPDMDEVINSRC                    pDevInsRC;
-
-#if HC_ARCH_BITS == 64
-    uint32_t                        Alignment0;
-#endif
-
-    /** Status LUN: The base interface. */
-    PDMIBASE                        IBase;
-    /** Status LUN: Leds interface. */
-    PDMILEDPORTS                    ILeds;
-    /** Status LUN: Partner of ILeds. */
-    R3PTRTYPE(PPDMILEDCONNECTORS)   pLedsConnector;
-    /** Status LUN: Media Notifys. */
-    R3PTRTYPE(PPDMIMEDIANOTIFY)     pMediaNotify;
-
-#if HC_ARCH_BITS == 32
-    uint32_t                        Alignment1;
-#endif
-
     /** Global Host Control register of the HBA
      *  @todo r=bird: Make this a 'name' doxygen comment with { and add a
@@ -506 +481 @@
     uint32_t                        regIdx;
 
-#if HC_ARCH_BITS == 64
-    uint32_t                        Alignment3;
-#endif
-
     /** Countdown timer for command completion coalescing. */
     TMTIMERHANDLE                   hHbaCccTimer;
@@ -515 +486 @@
     /** Which port number is used to mark an CCC interrupt */
     uint8_t                         uCccPortNr;
-
-#if HC_ARCH_BITS == 64
-    uint32_t                        Alignment6;
-#endif
+    uint8_t                         abAlignment1[7];
 
     /** Timeout value */
@@ -528 +496 @@
 
     /** Register structure per port */
-    AHCIPort                        ahciPort[AHCI_MAX_NR_PORTS_IMPL];
+    AHCIPORT                        ahciPort[AHCI_MAX_NR_PORTS_IMPL];
 
     /** The critical section. */
@@ -537 +505 @@
     /** Number of I/O threads currently active - used for async controller reset handling. */
     volatile uint32_t               cThreadsActive;
-    /** Device is in a reset state. */
-    bool                            fReset;
-    /** Supports 64bit addressing */
-    bool                            f64BitAddr;
-    /** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
-     * a port is entering the idle state. */
-    bool volatile                   fSignalIdle;
-    /** Flag whether the controller has BIOS access enabled. */
-    bool                            fBootable;
+
     /** Flag whether the legacy port reset method should be used to make it work with saved states. */
     bool                            fLegacyPortResetMethod;
     /** Enable tiger (10.4.x) SSTS hack or not. */
     bool                            fTigerHack;
-    bool                            afAlignment7[2];
+    /** Flag whether we have written the first 4bytes in an 8byte MMIO write successfully. */
+    volatile bool                   f8ByteMMIO4BytesWrittenSuccessfully;
+
+    /** Device is in a reset state.
+     * @todo r=bird: This isn't actually being modified by anyone...  */
+    bool                            fReset;
+    /** Supports 64bit addressing
+     * @todo r=bird: This isn't really being modified by anyone (always false). */
+    bool                            f64BitAddr;
+    /** Flag whether the controller has BIOS access enabled.
+     * @todo r=bird: Not used, just queried from CFGM.  */
+    bool                            fBootable;
+
+    bool                            afAlignment2[2];
 
     /** Number of usable ports on this controller. */
@@ -556 +529 @@
     /** Number of usable command slots for each port. */
     uint32_t                        cCmdSlotsAvail;
-
-    /** Flag whether we have written the first 4bytes in an 8byte MMIO write successfully. */
-    volatile bool                   f8ByteMMIO4BytesWrittenSuccessfully;
-
-#if HC_ARCH_BITS == 64
-    uint32_t                        Alignment8;
-#endif
 
     /** PCI region \#0: Legacy IDE fake, 8 ports. */
@@ -584 +550 @@
 
 /**
+ * Main AHCI device ring-3 state.
+ *
+ * @implements  PDMILEDPORTS
+ */
+typedef struct AHCIR3
+{
+    /** Pointer to the device instance - only for getting our bearings in
+     *  interface methods. */
+    PPDMDEVINSR3                    pDevIns;
+
+    /** Status LUN: The base interface. */
+    PDMIBASE                        IBase;
+    /** Status LUN: Leds interface. */
+    PDMILEDPORTS                    ILeds;
+    /** Status LUN: Partner of ILeds. */
+    R3PTRTYPE(PPDMILEDCONNECTORS)   pLedsConnector;
+    /** Status LUN: Media Notifys. */
+    R3PTRTYPE(PPDMIMEDIANOTIFY)     pMediaNotify;
+
+    /** Register structure per port */
+    AHCIPORTR3                      aPorts[AHCI_MAX_NR_PORTS_IMPL];
+
+    /** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
+     * a port is entering the idle state. */
+    bool volatile                   fSignalIdle;
+    bool                            afAlignment7[2+4];
+} AHCIR3;
+/** Pointer to the ring-3 state of an AHCI device. */
+typedef AHCIR3 *PAHCIR3;
+
+
+/**
+ * Main AHCI device ring-0 state.
+ */
+typedef struct AHCIR0
+{
+    uint64_t                        uUnused;
+} AHCIR0;
+/** Pointer to the ring-0 state of an AHCI device. */
+typedef AHCIR0 *PAHCIR0;
+
+
+/**
+ * Main AHCI device raw-mode state.
+ */
+typedef struct AHCIRC
+{
+    uint64_t                        uUnused;
+} AHCIRC;
+/** Pointer to the raw-mode state of an AHCI device. */
+typedef AHCIRC *PAHCIRC;
+
+
+/** Main AHCI device current context state. */
+typedef CTX_SUFF(AHCI)  AHCICC;
+/** Pointer to the current context state of an AHCI device. */
+typedef CTX_SUFF(PAHCI) PAHCICC;
+
+
+/**
  * Scatter gather list entry.
  */
@@ -604 +630 @@
  *
  * @returns nothing.
- * @param   pThis    The NVME controller instance.
+ * @param   pDevIns  The device instance.
  * @param   GCPhys   The guest physical address of the memory buffer.
  * @param   pSgBuf   The pointer to the host R3 S/G buffer.
@@ -614 +640 @@
  *                   cbCopy < *pcbSkip or 0 otherwise.
  */
-typedef DECLCALLBACK(void) AHCIR3MEMCOPYCALLBACK(PAHCI pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf, size_t cbCopy, size_t *pcbSkip);
+typedef DECLCALLBACK(void) AHCIR3MEMCOPYCALLBACK(PPDMDEVINS pDevIns, RTGCPHYS GCPhys,
+                                                 PRTSGBUF pSgBuf, size_t cbCopy, size_t *pcbSkip);
 /** Pointer to a memory copy buffer callback. */
 typedef AHCIR3MEMCOPYCALLBACK *PAHCIR3MEMCOPYCALLBACK;
@@ -805 +832 @@
 {
     const char *pszName;
-    int (*pfnRead )(PAHCI pThis, uint32_t iReg, uint32_t *pu32Value);
-    int (*pfnWrite)(PAHCI pThis, uint32_t iReg, uint32_t u32Value);
+    VBOXSTRICTRC (*pfnRead )(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t *pu32Value);
+    VBOXSTRICTRC (*pfnWrite)(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t u32Value);
 } AHCIOPREG;
 
@@ -815 +842 @@
 {
     const char *pszName;
-    int (*pfnRead )(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value);
-    int (*pfnWrite)(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value);
+    VBOXSTRICTRC (*pfnRead )(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value);
+    VBOXSTRICTRC (*pfnWrite)(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value);
 } AHCIPORTOPREG;
 
@@ -826 +853 @@
 RT_C_DECLS_BEGIN
 #ifdef IN_RING3
-static void ahciHBAReset(PAHCI pThis);
-static int  ahciPostFisIntoMemory(PAHCIPort pAhciPort, unsigned uFisType, uint8_t *cmdFis);
-static void ahciPostFirstD2HFisIntoMemory(PAHCIPort pAhciPort);
-static size_t ahciR3CopyBufferToPrdtl(PAHCI pThis, PAHCIREQ pAhciReq, const void *pvSrc,
-                                      size_t cbSrc, size_t cbSkip);
-static bool ahciCancelActiveTasks(PAHCIPort pAhciPort);
+static void ahciR3HBAReset(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIR3 pThisCC);
+static int ahciPostFisIntoMemory(PPDMDEVINS pDevIns, PAHCIPORT pAhciPort, unsigned uFisType, uint8_t *pCmdFis);
+static void ahciPostFirstD2HFisIntoMemory(PPDMDEVINS pDevIns, PAHCIPORT pAhciPort);
+static size_t ahciR3CopyBufferToPrdtl(PPDMDEVINS pDevIns, PAHCIREQ pAhciReq, const void *pvSrc, size_t cbSrc, size_t cbSkip);
+static bool ahciR3CancelActiveTasks(PAHCIPORTR3 pAhciPortR3);
 #endif
 RT_C_DECLS_END
@@ -839 +865 @@
 *   Defined Constants And Macros                                                                                                 *
 *********************************************************************************************************************************/
-#define PDMIBASE_2_PAHCIPORT(pInterface)         ( (PAHCIPort)((uintptr_t)(pInterface) - RT_UOFFSETOF(AHCIPort, IBase)) )
-#define PDMIMEDIAPORT_2_PAHCIPORT(pInterface)    ( (PAHCIPort)((uintptr_t)(pInterface) - RT_UOFFSETOF(AHCIPort, IPort)) )
-#define PDMIBASE_2_PAHCI(pInterface)             ( (PAHCI)((uintptr_t)(pInterface) - RT_UOFFSETOF(AHCI, IBase)) )
-#define PDMILEDPORTS_2_PAHCI(pInterface)         ( (PAHCI)((uintptr_t)(pInterface) - RT_UOFFSETOF(AHCI, ILeds)) )
-
 #define AHCI_RTGCPHYS_FROM_U32(Hi, Lo)             ( (RTGCPHYS)RT_MAKE_U64(Lo, Hi) )
 
@@ -883 +904 @@
  * Update PCI IRQ levels
  */
-static void ahciHbaClearInterrupt(PAHCI pThis)
+static void ahciHbaClearInterrupt(PPDMDEVINS pDevIns)
 {
     Log(("%s: Clearing interrupt\n", __FUNCTION__));
-    PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 0);
+    PDMDevHlpPCISetIrq(pDevIns, 0, 0);
 }
 
@@ -892 +913 @@
  * Updates the IRQ level and sets port bit in the global interrupt status register of the HBA.
  */
-static int ahciHbaSetInterrupt(PAHCI pThis, uint8_t iPort, int rcBusy)
+static int ahciHbaSetInterrupt(PPDMDEVINS pDevIns, PAHCI pThis, uint8_t iPort, int rcBusy)
 {
     Log(("P%u: %s: Setting interrupt\n", iPort, __FUNCTION__));
 
-    int rc = PDMDevHlpCritSectEnter(pThis->CTX_SUFF(pDevIns), &pThis->lock, rcBusy);
+    int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->lock, rcBusy);
     if (rc != VINF_SUCCESS)
         return rc;
@@ -908 +929 @@
             {
                 /* Reset command completion coalescing state. */
-                PDMDevHlpTimerSetMillies(pThis->CTX_SUFF(pDevIns), pThis->hHbaCccTimer, pThis->uCccTimeout);
+                PDMDevHlpTimerSetMillies(pDevIns, pThis->hHbaCccTimer, pThis->uCccTimeout);
                 pThis->uCccCurrentNr = 0;
 
@@ -915 +936 @@
                 {
                     Log(("P%u: %s: Fire interrupt\n", iPort, __FUNCTION__));
-                    PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 1);
+                    PDMDevHlpPCISetIrq(pDevIns, 0, 1);
                 }
             }
@@ -930 +951 @@
             {
                 Log(("P%u: %s: Fire interrupt\n", iPort, __FUNCTION__));
-                PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 1);
+                PDMDevHlpPCISetIrq(pDevIns, 0, 1);
             }
         }
     }
 
-    PDMDevHlpCritSectLeave(pThis->CTX_SUFF(pDevIns), &pThis->lock);
+    PDMDevHlpCritSectLeave(pDevIns, &pThis->lock);
     return VINF_SUCCESS;
 }
@@ -949 +970 @@
     PAHCI pThis = (PAHCI)pvUser;
 
-    int rc = ahciHbaSetInterrupt(pThis, pThis->uCccPortNr, VERR_IGNORED);
+    int rc = ahciHbaSetInterrupt(pDevIns, pThis, pThis->uCccPortNr, VERR_IGNORED);
     AssertRC(rc);
 }
@@ -957 +978 @@
  *
  * @returns nothing.
- * @param   pAhciPort    The port to finish the reset on.
- */
-static void ahciPortResetFinish(PAHCIPort pAhciPort)
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
+ * @param   pAhciPort   The port to finish the reset on, shared bits.
+ * @param   pAhciPortR3 The port to finish the reset on, ring-3 bits.
+ */
+static void ahciPortResetFinish(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, PAHCIPORTR3 pAhciPortR3)
 {
     ahciLog(("%s: Initiated.\n", __FUNCTION__));
 
     /* Cancel all tasks first. */
-    bool fAllTasksCanceled = ahciCancelActiveTasks(pAhciPort);
+    bool fAllTasksCanceled = ahciR3CancelActiveTasks(pAhciPortR3);
     Assert(fAllTasksCanceled); NOREF(fAllTasksCanceled);
 
@@ -980 +1004 @@
     if ((pAhciPort->regCMD & AHCI_PORT_CMD_FRE) && (!pAhciPort->fFirstD2HFisSent))
     {
-        ahciPostFirstD2HFisIntoMemory(pAhciPort);
+        ahciPostFirstD2HFisIntoMemory(pDevIns, pAhciPort);
         ASMAtomicOrU32(&pAhciPort->regIS, AHCI_PORT_IS_DHRS);
 
         if (pAhciPort->regIE & AHCI_PORT_IE_DHRE)
         {
-            int rc = ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VERR_IGNORED);
+            int rc = ahciHbaSetInterrupt(pDevIns, pThis, pAhciPort->iLUN, VERR_IGNORED);
             AssertRC(rc);
         }
@@ -1018 +1042 @@
  *
  * @returns nothing.
- * @param   pThis     The AHCI controller instance.
- * @param   pAhciPort The port to kick.
- */
-static void ahciIoThreadKick(PAHCI pThis, PAHCIPort pAhciPort)
+ * @param   pDevIns     The device instance.
+ * @param   pAhciPort   The port to kick.
+ */
+static void ahciIoThreadKick(PPDMDEVINS pDevIns, PAHCIPORT pAhciPort)
 {
     LogFlowFunc(("Signal event semaphore\n"));
-    int rc = PDMDevHlpSUPSemEventSignal(pThis->CTX_SUFF(pDevIns), pAhciPort->hEvtProcess);
+    int rc = PDMDevHlpSUPSemEventSignal(pDevIns, pAhciPort->hEvtProcess);
     AssertRC(rc);
 }
 
-static int PortCmdIssue_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(iReg);
+static VBOXSTRICTRC PortCmdIssue_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
+{
     ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
+    RT_NOREF(pThis, iReg);
 
     /* Update the CI register first. */
@@ -1050 +1074 @@
         /* Send a notification to R3 if u32TasksNew was 0 before our write. */
         if (ASMAtomicReadBool(&pAhciPort->fWrkThreadSleeping))
-            ahciIoThreadKick(pThis, pAhciPort);
+            ahciIoThreadKick(pDevIns, pAhciPort);
         else
             ahciLog(("%s: Worker thread busy, no need to kick.\n", __FUNCTION__));
@@ -1062 +1086 @@
 }
 
-static int PortCmdIssue_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortCmdIssue_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
 
     uint32_t uCIValue = ASMAtomicXchgU32(&pAhciPort->u32TasksFinished, 0);
@@ -1075 +1099 @@
 }
 
-static int PortSActive_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortSActive_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
+{
     ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
+    RT_NOREF(pDevIns, pThis, iReg);
 
     pAhciPort->regSACT |= u32Value;
@@ -1085 +1109 @@
 }
 
-static int PortSActive_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortSActive_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
 
     uint32_t u32TasksFinished = ASMAtomicXchgU32(&pAhciPort->u32QueuedTasksFinished, 0);
@@ -1100 +1124 @@
 }
 
-static int PortSError_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortSError_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
 
@@ -1122 +1146 @@
 }
 
-static int PortSError_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortSError_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regSERR=%#010x\n", __FUNCTION__, pAhciPort->regSERR));
     *pu32Value = pAhciPort->regSERR;
@@ -1130 +1154 @@
 }
 
-static int PortSControl_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
+static VBOXSTRICTRC PortSControl_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
 {
     RT_NOREF(pThis, iReg);
@@ -1138 +1162 @@
 
 #ifndef IN_RING3
-    RT_NOREF(pAhciPort, u32Value);
+    RT_NOREF(pDevIns, pAhciPort, u32Value);
     return VINF_IOM_R3_MMIO_WRITE;
 #else
@@ -1144 +1168 @@
     {
         if (!ASMAtomicXchgBool(&pAhciPort->fPortReset, true))
-            LogRel(("AHCI#%u: Port %d reset\n", pThis->CTX_SUFF(pDevIns)->iInstance,
+            LogRel(("AHCI#%u: Port %d reset\n", pDevIns->iInstance,
                     pAhciPort->iLUN));
 
@@ -1155 +1179 @@
     else if (   (u32Value & AHCI_PORT_SCTL_DET) == AHCI_PORT_SCTL_DET_NINIT
              && (pAhciPort->regSCTL & AHCI_PORT_SCTL_DET) == AHCI_PORT_SCTL_DET_INIT
-             && pAhciPort->pDrvBase)
+             && pAhciPort->fPresent)
     {
         /* Do the port reset here, so the guest sees the new status immediately. */
         if (pThis->fLegacyPortResetMethod)
         {
-            ahciPortResetFinish(pAhciPort);
+            PAHCIR3     pThisCC     = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+            PAHCIPORTR3 pAhciPortR3 = &RT_SAFE_SUBSCRIPT(pThisCC->aPorts, pAhciPort->iLUN);
+            ahciPortResetFinish(pDevIns, pThis, pAhciPort, pAhciPortR3);
             pAhciPort->regSCTL = u32Value; /* Update after finishing the reset, so the I/O thread doesn't get a chance to do the reset. */
         }
@@ -1172 +1198 @@
 
             /* Kick the thread to finish the reset. */
-            ahciIoThreadKick(pThis, pAhciPort);
+            ahciIoThreadKick(pDevIns, pAhciPort);
         }
     }
@@ -1182 +1208 @@
 }
 
-static int PortSControl_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortSControl_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regSCTL=%#010x\n", __FUNCTION__, pAhciPort->regSCTL));
     ahciLog(("%s: IPM=%d SPD=%d DET=%d\n", __FUNCTION__,
@@ -1194 +1220 @@
 }
 
-static int PortSStatus_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortSStatus_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regSSTS=%#010x\n", __FUNCTION__, pAhciPort->regSSTS));
     ahciLog(("%s: IPM=%d SPD=%d DET=%d\n", __FUNCTION__,
@@ -1206 +1232 @@
 }
 
-static int PortSignature_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortSignature_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regSIG=%#010x\n", __FUNCTION__, pAhciPort->regSIG));
     *pu32Value = pAhciPort->regSIG;
@@ -1214 +1240 @@
 }
 
-static int PortTaskFileData_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortTaskFileData_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regTFD=%#010x\n", __FUNCTION__, pAhciPort->regTFD));
     ahciLog(("%s: ERR=%x BSY=%d DRQ=%d ERR=%d\n", __FUNCTION__,
@@ -1228 +1254 @@
  * Read from the port command register.
  */
-static int PortCmd_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortCmd_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regCMD=%#010x\n", __FUNCTION__, pAhciPort->regCMD | AHCI_PORT_CMD_CCS_SHIFT(pAhciPort->u32CurrentCommandSlot)));
     ahciLog(("%s: ICC=%d ASP=%d ALPE=%d DLAE=%d ATAPI=%d CPD=%d ISP=%d HPCP=%d PMA=%d CPS=%d CR=%d FR=%d ISS=%d CCS=%d FRE=%d CLO=%d POD=%d SUD=%d ST=%d\n",
@@ -1251 +1277 @@
  * This is the register where all the data transfer is started
  */
-static int PortCmd_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(iReg);
+static VBOXSTRICTRC PortCmd_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
     ahciLog(("%s: ICC=%d ASP=%d ALPE=%d DLAE=%d ATAPI=%d CPD=%d ISP=%d HPCP=%d PMA=%d CPS=%d CR=%d FR=%d ISS=%d CCS=%d FRE=%d CLO=%d POD=%d SUD=%d ST=%d\n",
@@ -1286 +1312 @@
              * IS.PCS is clear.
              */
-            if (   pAhciPort->pDrvBase
+            if (   pAhciPort->fPresent
                 && !(pAhciPort->regIS & AHCI_PORT_IS_PCS))
             {
@@ -1298 +1324 @@
                     ASMAtomicOrU32(&pAhciPort->u32TasksNew, pAhciPort->regCI);
                     LogFlowFunc(("Signal event semaphore\n"));
-                    int rc = PDMDevHlpSUPSemEventSignal(pThis->CTX_SUFF(pDevIns), pAhciPort->hEvtProcess);
+                    int rc = PDMDevHlpSUPSemEventSignal(pDevIns, pAhciPort->hEvtProcess);
                     AssertRC(rc);
                 }
@@ -1304 +1330 @@
             else
             {
-                if (!pAhciPort->pDrvBase)
+                if (!pAhciPort->fPresent)
                     ahciLog(("%s: No pDrvBase, clearing PxCMD.CR!\n", __FUNCTION__));
                 else
@@ -1323 +1349 @@
         }
     }
-    else if (pAhciPort->pDrvBase)
+    else if (pAhciPort->fPresent)
     {
         if ((u32Value & AHCI_PORT_CMD_POD) && (pAhciPort->regCMD & AHCI_PORT_CMD_CPS) && !pAhciPort->fPoweredOn)
@@ -1346 +1372 @@
                 return VINF_IOM_R3_MMIO_WRITE;
 #else
-                ahciPostFirstD2HFisIntoMemory(pAhciPort);
+                ahciPostFirstD2HFisIntoMemory(pDevIns, pAhciPort);
                 ASMAtomicOrU32(&pAhciPort->regIS, AHCI_PORT_IS_DHRS);
 
                 if (pAhciPort->regIE & AHCI_PORT_IE_DHRE)
                 {
-                    int rc = ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VERR_IGNORED);
+                    int rc = ahciHbaSetInterrupt(pDevIns, pThis, pAhciPort->iLUN, VERR_IGNORED);
                     AssertRC(rc);
                 }
@@ -1375 +1401 @@
         /* Send the first D2H FIS only if it wasn't already sent. */
         if (   !pAhciPort->fFirstD2HFisSent
-            && pAhciPort->pDrvBase)
+            && pAhciPort->fPresent)
         {
 #ifndef IN_RING3
             return VINF_IOM_R3_MMIO_WRITE;
 #else
-            ahciPostFirstD2HFisIntoMemory(pAhciPort);
+            ahciPostFirstD2HFisIntoMemory(pDevIns, pAhciPort);
             pAhciPort->fFirstD2HFisSent = true;
 #endif
@@ -1399 +1425 @@
  * Read from the port interrupt enable register.
  */
-static int PortIntrEnable_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortIntrEnable_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regIE=%#010x\n", __FUNCTION__, pAhciPort->regIE));
     ahciLog(("%s: CPDE=%d TFEE=%d HBFE=%d HBDE=%d IFE=%d INFE=%d OFE=%d IPME=%d PRCE=%d DIE=%d PCE=%d DPE=%d UFE=%d SDBE=%d DSE=%d PSE=%d DHRE=%d\n",
@@ -1420 +1446 @@
  * Write to the port interrupt enable register.
  */
-static int PortIntrEnable_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
+static VBOXSTRICTRC PortIntrEnable_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
 {
     RT_NOREF(iReg);
@@ -1442 +1468 @@
     int rc = VINF_SUCCESS;
     if (u32Value & u32IntrStatus)
-        rc = ahciHbaSetInterrupt(pThis, pAhciPort->iLUN, VINF_IOM_R3_MMIO_WRITE);
+        rc = ahciHbaSetInterrupt(pDevIns, pThis, pAhciPort->iLUN, VINF_IOM_R3_MMIO_WRITE);
 
     if (rc == VINF_SUCCESS)
@@ -1453 +1479 @@
  * Read from the port interrupt status register.
  */
-static int PortIntrSts_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortIntrSts_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regIS=%#010x\n", __FUNCTION__, pAhciPort->regIS));
     ahciLog(("%s: CPDS=%d TFES=%d HBFS=%d HBDS=%d IFS=%d INFS=%d OFS=%d IPMS=%d PRCS=%d DIS=%d PCS=%d DPS=%d UFS=%d SDBS=%d DSS=%d PSS=%d DHRS=%d\n",
@@ -1474 +1500 @@
  * Write to the port interrupt status register.
  */
-static int PortIntrSts_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortIntrSts_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
     ASMAtomicAndU32(&pAhciPort->regIS, ~(u32Value & AHCI_PORT_IS_READONLY));
@@ -1486 +1512 @@
  * Read from the port FIS base address upper 32bit register.
  */
-static int PortFisAddrUp_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortFisAddrUp_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regFBU=%#010x\n", __FUNCTION__, pAhciPort->regFBU));
     *pu32Value = pAhciPort->regFBU;
@@ -1497 +1523 @@
  * Write to the port FIS base address upper 32bit register.
  */
-static int PortFisAddrUp_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortFisAddrUp_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
 
@@ -1511 +1537 @@
  * Read from the port FIS base address register.
  */
-static int PortFisAddr_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortFisAddr_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regFB=%#010x\n", __FUNCTION__, pAhciPort->regFB));
     *pu32Value = pAhciPort->regFB;
@@ -1522 +1548 @@
  * Write to the port FIS base address register.
  */
-static int PortFisAddr_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortFisAddr_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
 
@@ -1538 +1564 @@
  * Write to the port command list base address upper 32bit register.
  */
-static int PortCmdLstAddrUp_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortCmdLstAddrUp_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
 
@@ -1552 +1578 @@
  * Read from the port command list base address upper 32bit register.
  */
-static int PortCmdLstAddrUp_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortCmdLstAddrUp_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regCLBU=%#010x\n", __FUNCTION__, pAhciPort->regCLBU));
     *pu32Value = pAhciPort->regCLBU;
@@ -1563 +1589 @@
  * Read from the port command list base address register.
  */
-static int PortCmdLstAddr_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortCmdLstAddr_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: read regCLB=%#010x\n", __FUNCTION__, pAhciPort->regCLB));
     *pu32Value = pAhciPort->regCLB;
@@ -1574 +1600 @@
  * Write to the port command list base address register.
  */
-static int PortCmdLstAddr_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(pThis, iReg);
+static VBOXSTRICTRC PortCmdLstAddr_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg);
     ahciLog(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
 
@@ -1590 +1616 @@
  * Read from the global Version register.
  */
-static int HbaVersion_r(PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(iReg);
+static VBOXSTRICTRC HbaVersion_r(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, iReg);
     Log(("%s: read regHbaVs=%#010x\n", __FUNCTION__, pThis->regHbaVs));
     *pu32Value = pThis->regHbaVs;
@@ -1601 +1627 @@
  * Read from the global Ports implemented register.
  */
-static int HbaPortsImplemented_r(PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(iReg);
+static VBOXSTRICTRC HbaPortsImplemented_r(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, iReg);
     Log(("%s: read regHbaPi=%#010x\n", __FUNCTION__, pThis->regHbaPi));
     *pu32Value = pThis->regHbaPi;
@@ -1612 +1638 @@
  * Write to the global interrupt status register.
  */
-static int HbaInterruptStatus_w(PAHCI pThis, uint32_t iReg, uint32_t u32Value)
+static VBOXSTRICTRC HbaInterruptStatus_w(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t u32Value)
 {
     RT_NOREF(iReg);
     Log(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
 
-    int rc = PDMDevHlpCritSectEnter(pThis->CTX_SUFF(pDevIns), &pThis->lock, VINF_IOM_R3_MMIO_WRITE);
+    int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->lock, VINF_IOM_R3_MMIO_WRITE);
     if (rc != VINF_SUCCESS)
         return rc;
@@ -1638 +1664 @@
             if (u32Value & 0x01)
             {
-                PAHCIPort pAhciPort = &pThis->ahciPort[i];
+                PAHCIPORT pAhciPort = &pThis->ahciPort[i];
 
                 if (pAhciPort->regIE & pAhciPort->regIS)
@@ -1656 +1682 @@
 
     if (fClear)
-        ahciHbaClearInterrupt(pThis);
+        ahciHbaClearInterrupt(pDevIns);
     else
     {
@@ -1665 +1691 @@
          * We need to clear it first because the PCI bus only calls the interrupt controller if the state changes.
          */
-        PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 0);
-        PDMDevHlpPCISetIrq(pThis->CTX_SUFF(pDevIns), 0, 1);
-    }
-
-    PDMDevHlpCritSectLeave(pThis->CTX_SUFF(pDevIns), &pThis->lock);
+        PDMDevHlpPCISetIrq(pDevIns, 0, 0);
+        PDMDevHlpPCISetIrq(pDevIns, 0, 1);
+    }
+
+    PDMDevHlpCritSectLeave(pDevIns, &pThis->lock);
     return VINF_SUCCESS;
 }
@@ -1676 +1702 @@
  * Read from the global interrupt status register.
  */
-static int HbaInterruptStatus_r(PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
+static VBOXSTRICTRC HbaInterruptStatus_r(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
 {
     RT_NOREF(iReg);
 
-    int rc = PDMDevHlpCritSectEnter(pThis->CTX_SUFF(pDevIns), &pThis->lock, VINF_IOM_R3_MMIO_READ);
+    int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->lock, VINF_IOM_R3_MMIO_READ);
     if (rc != VINF_SUCCESS)
         return rc;
@@ -1686 +1712 @@
     uint32_t u32PortsInterrupted = ASMAtomicXchgU32(&pThis->u32PortsInterrupted, 0);
 
-    PDMDevHlpCritSectLeave(pThis->CTX_SUFF(pDevIns), &pThis->lock);
+    PDMDevHlpCritSectLeave(pDevIns, &pThis->lock);
     Log(("%s: read regHbaIs=%#010x u32PortsInterrupted=%#010x\n", __FUNCTION__, pThis->regHbaIs, u32PortsInterrupted));
 
@@ -1693 +1719 @@
 #ifdef LOG_ENABLED
     Log(("%s:", __FUNCTION__));
-    unsigned i;
-    for (i = 0; i < pThis->cPortsImpl; i++)
+    uint32_t const cPortsImpl = RT_MIN(pThis->cPortsImpl, RT_ELEMENTS(pThis->ahciPort));
+    for (unsigned i = 0; i < cPortsImpl; i++)
     {
         if ((pThis->regHbaIs >> i) & 0x01)
@@ -1710 +1736 @@
  * Write to the global control register.
  */
-static int HbaControl_w(PAHCI pThis, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(iReg);
+static VBOXSTRICTRC HbaControl_w(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t u32Value)
+{
     Log(("%s: write u32Value=%#010x\n"
          "%s: AE=%d IE=%d HR=%d\n",
@@ -1718 +1743 @@
          __FUNCTION__, (u32Value & AHCI_HBA_CTRL_AE) >> 31, (u32Value & AHCI_HBA_CTRL_IE) >> 1,
          (u32Value & AHCI_HBA_CTRL_HR)));
+    RT_NOREF(iReg);
 
 #ifndef IN_RING3
-    RT_NOREF(pThis, u32Value);
+    RT_NOREF(pDevIns, pThis, u32Value);
     return VINF_IOM_R3_MMIO_WRITE;
 #else
@@ -1737 +1763 @@
     if (   (u32Value & AHCI_HBA_CTRL_HR)
         && !cThreadsActive)
-        ahciHBAReset(pThis);
+        ahciR3HBAReset(pDevIns, pThis, PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC));
 
     return VINF_SUCCESS;
@@ -1746 +1772 @@
  * Read the global control register.
  */
-static int HbaControl_r(PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(iReg);
+static VBOXSTRICTRC HbaControl_r(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, iReg);
     Log(("%s: read regHbaCtrl=%#010x\n"
          "%s: AE=%d IE=%d HR=%d\n",
@@ -1761 +1787 @@
  * Read the global capabilities register.
  */
-static int HbaCapabilities_r(PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(iReg);
+static VBOXSTRICTRC HbaCapabilities_r(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, iReg);
     Log(("%s: read regHbaCap=%#010x\n"
          "%s: S64A=%d SNCQ=%d SIS=%d SSS=%d SALP=%d SAL=%d SCLO=%d ISS=%d SNZO=%d SAM=%d SPM=%d PMD=%d SSC=%d PSC=%d NCS=%d NP=%d\n",
@@ -1782 +1808 @@
  * Write to the global command completion coalescing control register.
  */
-static int HbaCccCtl_w(PAHCI pThis, uint32_t iReg, uint32_t u32Value)
+static VBOXSTRICTRC HbaCccCtl_w(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t u32Value)
 {
     RT_NOREF(iReg);
@@ -1797 +1823 @@
 
     if (u32Value & AHCI_HBA_CCC_CTL_EN)
-        PDMDevHlpTimerSetMillies(pThis->CTX_SUFF(pDevIns), pThis->hHbaCccTimer, pThis->uCccTimeout); /* Arm the timer */
+        PDMDevHlpTimerSetMillies(pDevIns, pThis->hHbaCccTimer, pThis->uCccTimeout); /* Arm the timer */
     else
-        PDMDevHlpTimerStop(pThis->CTX_SUFF(pDevIns), pThis->hHbaCccTimer);
+        PDMDevHlpTimerStop(pDevIns, pThis->hHbaCccTimer);
 
     return VINF_SUCCESS;
@@ -1807 +1833 @@
  * Read the global command completion coalescing control register.
  */
-static int HbaCccCtl_r(PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(iReg);
+static VBOXSTRICTRC HbaCccCtl_r(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, iReg);
     Log(("%s: read regHbaCccCtl=%#010x\n"
          "%s: TV=%d CC=%d INT=%d EN=%d\n",
@@ -1822 +1848 @@
  * Write to the global command completion coalescing ports register.
  */
-static int HbaCccPorts_w(PAHCI pThis, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(iReg);
+static VBOXSTRICTRC HbaCccPorts_w(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t u32Value)
+{
+    RT_NOREF(pDevIns, iReg);
     Log(("%s: write u32Value=%#010x\n", __FUNCTION__, u32Value));
 
@@ -1835 +1861 @@
  * Read the global command completion coalescing ports register.
  */
-static int HbaCccPorts_r(PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(iReg);
+static VBOXSTRICTRC HbaCccPorts_r(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, iReg);
     Log(("%s: read regHbaCccPorts=%#010x\n", __FUNCTION__, pThis->regHbaCccPorts));
 
 #ifdef LOG_ENABLED
     Log(("%s:", __FUNCTION__));
-    unsigned i;
-    for (i = 0; i < pThis->cPortsImpl; i++)
+    uint32_t const cPortsImpl = RT_MIN(pThis->cPortsImpl, RT_ELEMENTS(pThis->ahciPort));
+    for (unsigned i = 0; i < cPortsImpl; i++)
     {
         if ((pThis->regHbaCccPorts >> i) & 0x01)
@@ -1858 +1884 @@
  * Invalid write to global register
  */
-static int HbaInvalid_w(PAHCI pThis, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(pThis, iReg, u32Value);
+static VBOXSTRICTRC HbaInvalid_w(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t iReg, uint32_t u32Value)
+{
+    RT_NOREF(pDevIns, pThis, iReg, u32Value);
     Log(("%s: Write denied!!! iReg=%u u32Value=%#010x\n", __FUNCTION__, iReg, u32Value));
     return VINF_SUCCESS;
@@ -1868 +1894 @@
  * Invalid Port write.
  */
-static int PortInvalid_w(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t u32Value)
-{
-    RT_NOREF(pThis, pAhciPort, iReg, u32Value);
+static VBOXSTRICTRC PortInvalid_w(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t u32Value)
+{
+    RT_NOREF(pDevIns, pThis, pAhciPort, iReg, u32Value);
     ahciLog(("%s: Write denied!!! iReg=%u u32Value=%#010x\n", __FUNCTION__, iReg, u32Value));
     return VINF_SUCCESS;
@@ -1878 +1904 @@
  * Invalid Port read.
  */
-static int PortInvalid_r(PAHCI pThis, PAHCIPort pAhciPort, uint32_t iReg, uint32_t *pu32Value)
-{
-    RT_NOREF(pThis, pAhciPort, iReg, pu32Value);
+static VBOXSTRICTRC PortInvalid_r(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t iReg, uint32_t *pu32Value)
+{
+    RT_NOREF(pDevIns, pThis, pAhciPort, iReg, pu32Value);
     ahciLog(("%s: Read denied!!! iReg=%u\n", __FUNCTION__, iReg));
     return VINF_SUCCESS;
@@ -1923 +1949 @@
 
 #ifdef IN_RING3
+
 /**
  * Reset initiated by system software for one port.
  *
- * @param pAhciPort     The port to reset.
- */
-static void ahciPortSwReset(PAHCIPort pAhciPort)
+ * @param   pAhciPort       The port to reset, shared bits.
+ * @param   pAhciPortR3     The port to reset, ring-3 bits.
+ */
+static void ahciR3PortSwReset(PAHCIPORT pAhciPort, PAHCIPORTR3 pAhciPortR3)
 {
     bool fAllTasksCanceled;
 
     /* Cancel all tasks first. */
-    fAllTasksCanceled = ahciCancelActiveTasks(pAhciPort);
+    fAllTasksCanceled = ahciR3CancelActiveTasks(pAhciPortR3);
     Assert(fAllTasksCanceled);
 
@@ -1968 +1996 @@
     pAhciPort->u32CurrentCommandSlot = 0;
 
-    if (pAhciPort->pDrvBase)
+    if (pAhciPort->fPresent)
     {
         pAhciPort->regCMD |= AHCI_PORT_CMD_CPS; /* Indicate that there is a device on that port */
@@ -1993 +2021 @@
  * @param pAhciPort     The port to reset.
  */
-static void ahciPortHwReset(PAHCIPort pAhciPort)
+static void ahciPortHwReset(PAHCIPORT pAhciPort)
 {
     /* Reset the address registers. */
@@ -2025 +2053 @@
  * Reset the entire HBA.
  *
- * @param   pThis       The HBA state.
- */
-static void ahciHBAReset(PAHCI pThis)
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
+ * @param   pThisCC     The ring-3 AHCI state.
+ */
+static void ahciR3HBAReset(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIR3 pThisCC)
 {
     unsigned i;
     int rc = VINF_SUCCESS;
 
-    LogRel(("AHCI#%u: Reset the HBA\n", pThis->CTX_SUFF(pDevIns)->iInstance));
+    LogRel(("AHCI#%u: Reset the HBA\n", pDevIns->iInstance));
 
     /* Stop the CCC timer. */
     if (pThis->regHbaCccCtl & AHCI_HBA_CCC_CTL_EN)
     {
-        rc = PDMDevHlpTimerStop(pThis->CTX_SUFF(pDevIns), pThis->hHbaCccTimer);
+        rc = PDMDevHlpTimerStop(pDevIns, pThis->hHbaCccTimer);
         if (RT_FAILURE(rc))
             AssertMsgFailed(("%s: Failed to stop timer!\n", __FUNCTION__));
@@ -2043 +2073 @@
 
     /* Reset every port */
-    for (i = 0; i < pThis->cPortsImpl; i++)
-    {
-        PAHCIPort pAhciPort = &pThis->ahciPort[i];
-
-        pAhciPort->iLUN = i;
-        ahciPortSwReset(pAhciPort);
+    uint32_t const cPortsImpl = RT_MIN(pThis->cPortsImpl, RT_ELEMENTS(pThisCC->aPorts));
+    for (i = 0; i < cPortsImpl; i++)
+    {
+        PAHCIPORT   pAhciPort   = &pThis->ahciPort[i];
+        PAHCIPORTR3 pAhciPortR3 = &pThisCC->aPorts[i];
+
+        pAhciPort->iLUN   = i;
+        pAhciPortR3->iLUN = i;
+        ahciR3PortSwReset(pAhciPort, pAhciPortR3);
     }
 
     /* Init Global registers */
-    pThis->regHbaCap      = AHCI_HBA_CAP_ISS_SHIFT(AHCI_HBA_CAP_ISS_GEN2) |
-                            AHCI_HBA_CAP_S64A | /* 64bit addressing supported */
-                            AHCI_HBA_CAP_SAM  | /* AHCI mode only */
-                            AHCI_HBA_CAP_SNCQ | /* Support native command queuing */
-                            AHCI_HBA_CAP_SSS  | /* Staggered spin up */
-                            AHCI_HBA_CAP_CCCS | /* Support command completion coalescing */
-                            AHCI_HBA_CAP_NCS_SET(pThis->cCmdSlotsAvail) | /* Number of command slots we support */
-                            AHCI_HBA_CAP_NP_SET(pThis->cPortsImpl); /* Number of supported ports */
+    pThis->regHbaCap      = AHCI_HBA_CAP_ISS_SHIFT(AHCI_HBA_CAP_ISS_GEN2)
+                          | AHCI_HBA_CAP_S64A /* 64bit addressing supported */
+                          | AHCI_HBA_CAP_SAM  /* AHCI mode only */
+                          | AHCI_HBA_CAP_SNCQ /* Support native command queuing */
+                          | AHCI_HBA_CAP_SSS  /* Staggered spin up */
+                          | AHCI_HBA_CAP_CCCS /* Support command completion coalescing */
+                          | AHCI_HBA_CAP_NCS_SET(pThis->cCmdSlotsAvail) /* Number of command slots we support */
+                          | AHCI_HBA_CAP_NP_SET(pThis->cPortsImpl); /* Number of supported ports */
     pThis->regHbaCtrl     = AHCI_HBA_CTRL_AE;
     pThis->regHbaPi       = ahciGetPortsImplemented(pThis->cPortsImpl);
@@ -2072 +2105 @@
     pThis->regHbaIs            = 0;
     pThis->u32PortsInterrupted = 0;
-    ahciHbaClearInterrupt(pThis);
+    ahciHbaClearInterrupt(pDevIns);
 
     pThis->f64BitAddr = false;
@@ -2080 +2113 @@
     pThis->regHbaCtrl &= ~AHCI_HBA_CTRL_HR;
 }
-#endif
+
+#endif /* IN_RING3 */
 
 /**
  * Reads from a AHCI controller register.
  *
- * @returns VBox status code.
- *
- * @param   pThis       The AHCI instance.
+ * @returns Strict VBox status code.
+ *
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
  * @param   uReg        The register to write.
  * @param   pv          Where to store the result.
  * @param   cb          Number of bytes read.
  */
-static int ahciRegisterRead(PAHCI pThis, uint32_t uReg, void *pv, unsigned cb)
-{
-    int rc = VINF_SUCCESS;
+static VBOXSTRICTRC ahciRegisterRead(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t uReg, void *pv, unsigned cb)
+{
+    VBOXSTRICTRC rc;
     uint32_t iReg;
 
@@ -2108 +2143 @@
         {
             const AHCIOPREG *pReg = &g_aOpRegs[iReg];
-            rc = pReg->pfnRead(pThis, iReg, (uint32_t *)pv);
+            rc = pReg->pfnRead(pDevIns, pThis, iReg, (uint32_t *)pv);
         }
         else
@@ -2114 +2149 @@
             Log3(("%s: Trying to read global register %u/%u!!!\n", __FUNCTION__, iReg, RT_ELEMENTS(g_aOpRegs)));
             *(uint32_t *)pv = 0;
+            rc = VINF_SUCCESS;
         }
     }
@@ -2129 +2165 @@
         Log3(("%s: Trying to read from port %u and register %u\n", __FUNCTION__, iPort, iReg));
 
-        if (RT_LIKELY(   iPort < pThis->cPortsImpl
+        if (RT_LIKELY(   iPort < RT_MIN(pThis->cPortsImpl, RT_ELEMENTS(pThis->ahciPort))
                       && iReg < RT_ELEMENTS(g_aPortOpRegs)))
         {
             const AHCIPORTOPREG *pPortReg = &g_aPortOpRegs[iReg];
-            rc = pPortReg->pfnRead(pThis, &pThis->ahciPort[iPort], iReg, (uint32_t *)pv);
+            rc = pPortReg->pfnRead(pDevIns, pThis, &pThis->ahciPort[iPort], iReg, (uint32_t *)pv);
         }
         else
@@ -2163 +2199 @@
                 }
                 default:
-                    AssertMsgFailed(("%s: unsupported access width cb=%d iPort=%x iRegOffset=%x iReg=%x!!!\n",
-                                     __FUNCTION__, cb, iPort, iRegOffset, iReg));
+                    ASSERT_GUEST_MSG_FAILED(("%s: unsupported access width cb=%d iPort=%x iRegOffset=%x iReg=%x!!!\n",
+                                             __FUNCTION__, cb, iPort, iRegOffset, iReg));
             }
         }
@@ -2175 +2211 @@
  * Writes a value to one of the AHCI controller registers.
  *
- * @returns VBox status code.
- *
- * @param   pThis       The AHCI instance.
+ * @returns Strict VBox status code.
+ *
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
  * @param   offReg      The offset of the register to write to.
  * @param   u32Value    The value to write.
  */
-static int ahciRegisterWrite(PAHCI pThis, uint32_t offReg, uint32_t u32Value)
-{
-    int rc;
+static VBOXSTRICTRC ahciRegisterWrite(PPDMDEVINS pDevIns, PAHCI pThis, uint32_t offReg, uint32_t u32Value)
+{
+    VBOXSTRICTRC rc;
     uint32_t iReg;
 
@@ -2197 +2234 @@
         {
             const AHCIOPREG *pReg = &g_aOpRegs[iReg];
-            rc = pReg->pfnWrite(pThis, iReg, u32Value);
+            rc = pReg->pfnWrite(pDevIns, pThis, iReg, u32Value);
         }
         else
@@ -2214 +2251 @@
         iReg    = (offReg % AHCI_PORT_REGISTER_SIZE) >> 2;
         Log3(("%s: Trying to write to port %u and register %u\n", __FUNCTION__, iPort, iReg));
-        if (RT_LIKELY(   iPort < pThis->cPortsImpl
+        if (RT_LIKELY(   iPort < RT_MIN(pThis->cPortsImpl, RT_ELEMENTS(pThis->ahciPort))
                       && iReg < RT_ELEMENTS(g_aPortOpRegs)))
         {
             const AHCIPORTOPREG *pPortReg = &g_aPortOpRegs[iReg];
-            rc = pPortReg->pfnWrite(pThis, &pThis->ahciPort[iPort], iReg, u32Value);
+            rc = pPortReg->pfnWrite(pDevIns, pThis, &pThis->ahciPort[iPort], iReg, u32Value);
         }
         else
@@ -2240 +2277 @@
     RT_NOREF(pvUser);
 
-    VBOXSTRICTRC rc = ahciRegisterRead(pThis, off, pv, cb);
+    VBOXSTRICTRC rc = ahciRegisterRead(pDevIns, pThis, off, pv, cb);
 
     Log2(("#%d ahciMMIORead: return pvUser=%p:{%.*Rhxs} cb=%d off=%RGp rc=%Rrc\n",
@@ -2292 +2329 @@
     /* Do the access. */
     Log2(("#%d ahciMMIOWrite: pvUser=%p:{%.*Rhxs} cb=%d GCPhysAddr=%RGp\n", pDevIns->iInstance, pv, cb, pv, cb, off));
-    return ahciRegisterWrite(pThis, off, *(uint32_t const *)pv);
+    return ahciRegisterWrite(pDevIns, pThis, off, *(uint32_t const *)pv);
 }
 
@@ -2346 +2383 @@
             /** @todo range check? */
             ASSERT_GUEST(iReg == 1);
-            rc = ahciRegisterWrite(pThis, pThis->regIdx, u32);
+            rc = ahciRegisterWrite(pDevIns, pThis, pThis->regIdx, u32);
             if (rc == VINF_IOM_R3_MMIO_WRITE)
                 rc = VINF_IOM_R3_IOPORT_WRITE;
@@ -2382 +2419 @@
             /** @todo range check? */
             ASSERT_GUEST(iReg == 1);
-            rc = ahciRegisterRead(pThis, pThis->regIdx, pu32, cb);
+            rc = ahciRegisterRead(pDevIns, pThis, pThis->regIdx, pu32, cb);
             if (rc == VINF_IOM_R3_MMIO_READ)
                 rc = VINF_IOM_R3_IOPORT_READ;
@@ -2411 +2448 @@
 static DECLCALLBACK(int) ahciR3Status_QueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
 {
-    PAHCI pThis = PDMILEDPORTS_2_PAHCI(pInterface);
+    PAHCICC pThisCC = RT_FROM_MEMBER(pInterface, AHCICC, ILeds);
     if (iLUN < AHCI_MAX_NR_PORTS_IMPL)
     {
+        PAHCI pThis = PDMDEVINS_2_DATA(pThisCC->pDevIns, PAHCI);
         *ppLed = &pThis->ahciPort[iLUN].Led;
         Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
@@ -2426 +2464 @@
 static DECLCALLBACK(void *) ahciR3Status_QueryInterface(PPDMIBASE pInterface, const char *pszIID)
 {
-    PAHCI pThis = PDMIBASE_2_PAHCI(pInterface);
-    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
-    PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
+    PAHCICC pThisCC = RT_FROM_MEMBER(pInterface, AHCICC, IBase);
+    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThisCC->IBase);
+    PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThisCC->ILeds);
     return NULL;
 }
@@ -2437 +2475 @@
 static DECLCALLBACK(void *) ahciR3PortQueryInterface(PPDMIBASE pInterface, const char *pszIID)
 {
-    PAHCIPort pAhciPort = PDMIBASE_2_PAHCIPORT(pInterface);
-    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pAhciPort->IBase);
-    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pAhciPort->IPort);
-    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAEXPORT, &pAhciPort->IMediaExPort);
+    PAHCIPORTR3 pAhciPortR3 = RT_FROM_MEMBER(pInterface, AHCIPORTR3, IBase);
+    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pAhciPortR3->IBase);
+    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pAhciPortR3->IPort);
+    PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAEXPORT, &pAhciPortR3->IMediaExPort);
     return NULL;
 }
@@ -2450 +2488 @@
                                                        uint32_t *piInstance, uint32_t *piLUN)
 {
-    PAHCIPort pAhciPort = PDMIMEDIAPORT_2_PAHCIPORT(pInterface);
-    PPDMDEVINS pDevIns = pAhciPort->CTX_SUFF(pDevIns);
+    PAHCIPORTR3 pAhciPortR3 = RT_FROM_MEMBER(pInterface, AHCIPORTR3, IPort);
+    PPDMDEVINS  pDevIns     = pAhciPortR3->pDevIns;
 
     AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
@@ -2459 +2497 @@
     *ppcszController = pDevIns->pReg->szName;
     *piInstance = pDevIns->iInstance;
-    *piLUN = pAhciPort->iLUN;
+    *piLUN = pAhciPortR3->iLUN;
 
     return VINF_SUCCESS;
@@ -2470 +2508 @@
                                                        const char **ppszProductId, const char **ppszRevision)
 {
-    PAHCIPort pAhciPort = PDMIMEDIAPORT_2_PAHCIPORT(pInterface);
+    PAHCIPORTR3 pAhciPortR3 = RT_FROM_MEMBER(pInterface, AHCIPORTR3, IPort);
+    PAHCI       pThis       = PDMDEVINS_2_DATA(pAhciPortR3->pDevIns, PAHCI);
+    PAHCIPORT   pAhciPort   = &RT_SAFE_SUBSCRIPT(pThis->ahciPort, pAhciPortR3->iLUN);
 
     if (ppszVendorId)
@@ -2490 +2530 @@
  * @param   cmdFis        The FIS to print info from.
  */
-static void ahciDumpFisInfo(PAHCIPort pAhciPort, uint8_t *cmdFis)
+static void ahciDumpFisInfo(PAHCIPORT pAhciPort, uint8_t *cmdFis)
 {
     ahciLog(("%s: *** Begin FIS info dump. ***\n", __FUNCTION__));
@@ -2572 +2612 @@
  * @param   pCmdHdr     The command header to print info from.
  */
-static void ahciDumpCmdHdrInfo(PAHCIPort pAhciPort, CmdHdr *pCmdHdr)
+static void ahciDumpCmdHdrInfo(PAHCIPORT pAhciPort, CmdHdr *pCmdHdr)
 {
     ahciLog(("%s: *** Begin command header info dump. ***\n", __FUNCTION__));
@@ -2603 +2643 @@
  *
  * @returns nothing
- * @param   pAhciPort    Pointer to the port which "receives" the FIS.
- */
-static void ahciPostFirstD2HFisIntoMemory(PAHCIPort pAhciPort)
+ * @param   pDevIns     The device instance.
+ * @param   pAhciPort   Pointer to the port which "receives" the FIS.
+ */
+static void ahciPostFirstD2HFisIntoMemory(PPDMDEVINS pDevIns, PAHCIPORT pAhciPort)
 {
     uint8_t d2hFis[AHCI_CMDFIS_TYPE_D2H_SIZE];
@@ -2638 +2679 @@
         pAhciPort->regTFD |= ATA_STAT_READY;
 
-    ahciPostFisIntoMemory(pAhciPort, AHCI_CMDFIS_TYPE_D2H, d2hFis);
+    ahciPostFisIntoMemory(pDevIns, pAhciPort, AHCI_CMDFIS_TYPE_D2H, d2hFis);
 }
 
@@ -2645 +2686 @@
  *
  * @returns VBox status code
+ * @param   pDevIns     The device instance.
  * @param   pAhciPort  The port which "receives" the FIS.
  * @param   uFisType   The type of the FIS.
  * @param   pCmdFis    Pointer to the FIS which is to be posted into memory.
  */
-static int ahciPostFisIntoMemory(PAHCIPort pAhciPort, unsigned uFisType, uint8_t *pCmdFis)
+static int ahciPostFisIntoMemory(PPDMDEVINS pDevIns, PAHCIPORT pAhciPort, unsigned uFisType, uint8_t *pCmdFis)
 {
     int         rc = VINF_SUCCESS;
@@ -2698 +2740 @@
         /* Post the FIS into memory. */
         ahciLog(("%s: PDMDevHlpPCIPhysWrite GCPhysAddrRecFis=%RGp cbFis=%u\n", __FUNCTION__, GCPhysAddrRecFis, cbFis));
-        PDMDevHlpPCIPhysWrite(pAhciPort->CTX_SUFF(pDevIns), GCPhysAddrRecFis, pCmdFis, cbFis);
+        PDMDevHlpPCIPhysWrite(pDevIns, GCPhysAddrRecFis, pCmdFis, cbFis);
     }
 
@@ -2734 +2776 @@
 }
 
-static int ahciIdentifySS(PAHCIPort pAhciPort, void *pvBuf)
+static int ahciIdentifySS(PAHCI pThis, PAHCIPORT pAhciPort, PAHCIPORTR3 pAhciPortR3, void *pvBuf)
 {
     uint16_t *p = (uint16_t *)pvBuf;
@@ -2785 +2827 @@
     if (   pAhciPort->fTrimEnabled
         || pAhciPort->cbSector != 512
-        || pAhciPort->pDrvMedia->pfnIsNonRotational(pAhciPort->pDrvMedia))
+        || pAhciPortR3->pDrvMedia->pfnIsNonRotational(pAhciPortR3->pDrvMedia))
     {
         p[80] = RT_H2LE_U16(0x1f0); /* support everything up to ATA/ATAPI-8 ACS */
@@ -2821 +2863 @@
     }
 
-    if (pAhciPort->pDrvMedia->pfnIsNonRotational(pAhciPort->pDrvMedia))
+    if (pAhciPortR3->pDrvMedia->pfnIsNonRotational(pAhciPortR3->pDrvMedia))
         p[217] = RT_H2LE_U16(1); /* Non-rotational medium */
 
@@ -2828 +2870 @@
 
     /* The following are SATA specific */
-    p[75] = RT_H2LE_U16(pAhciPort->CTX_SUFF(pAhci)->cCmdSlotsAvail-1); /* Number of commands we support, 0's based */
+    p[75] = RT_H2LE_U16(pThis->cCmdSlotsAvail - 1); /* Number of commands we support, 0's based */
     p[76] = RT_H2LE_U16((1 << 8) | (1 << 2)); /* Native command queuing and Serial ATA Gen2 (3.0 Gbps) speed supported */
 
@@ -2837 +2879 @@
 }
 
-static int ahciR3AtapiIdentify(PAHCIREQ pAhciReq, PAHCIPort pAhciPort, size_t cbData, size_t *pcbData)
+static int ahciR3AtapiIdentify(PPDMDEVINS pDevIns, PAHCIREQ pAhciReq, PAHCIPORT pAhciPort, size_t cbData, size_t *pcbData)
 {
     uint16_t p[256];
@@ -2878 +2920 @@
 
     /* Copy the buffer in to the scatter gather list. */
-    *pcbData = ahciR3CopyBufferToPrdtl(pAhciPort->CTX_SUFF(pAhci), pAhciReq, (void *)&p[0],
-                                       RT_MIN(cbData, sizeof(p)), 0 /* cbSkip */);
+    *pcbData = ahciR3CopyBufferToPrdtl(pDevIns, pAhciReq, (void *)&p[0], RT_MIN(cbData, sizeof(p)), 0 /* cbSkip */);
     return VINF_SUCCESS;
 }
@@ -2887 +2928 @@
  *
  * @returns nothing
- * @param pAhciPort             The port the device is attached to.
- * @param pAhciReq    The state to get the tag number from.
- */
-static void ahciFinishStorageDeviceReset(PAHCIPort pAhciPort, PAHCIREQ pAhciReq)
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
+ * @param   pAhciPort   The port the device is attached to, shared bits.
+ * @param   pAhciReq    The state to get the tag number from.
+ */
+static void ahciFinishStorageDeviceReset(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, PAHCIREQ pAhciReq)
 {
     int rc;
@@ -2897 +2940 @@
     pAhciPort->fResetDevice = false;
     if (pAhciPort->regCMD & AHCI_PORT_CMD_FRE)
-        ahciPostFirstD2HFisIntoMemory(pAhciPort);
+        ahciPostFirstD2HFisIntoMemory(pDevIns, pAhciPort);
 
     /* As this is the first D2H FIS after the reset update the signature in the SIG register of the port. */
@@ -2906 +2949 @@
     ASMAtomicOrU32(&pAhciPort->u32TasksFinished, (1 << pAhciReq->uTag));
 
-    rc = ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VERR_IGNORED);
+    rc = ahciHbaSetInterrupt(pDevIns, pThis, pAhciPort->iLUN, VERR_IGNORED);
     AssertRC(rc);
 }
@@ -2914 +2957 @@
  *
  * @returns nothing.
- * @param   pAhciPort          The device to reset.
- * @param   pAhciReq The task state.
- */
-static void ahciDeviceReset(PAHCIPort pAhciPort, PAHCIREQ pAhciReq)
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
+ * @param   pAhciPort   The device to reset.
+ * @param   pAhciReq    The task state.
+ */
+static void ahciDeviceReset(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, PAHCIREQ pAhciReq)
 {
     ASMAtomicWriteBool(&pAhciPort->fResetDevice, true);
@@ -2927 +2972 @@
      */
     Assert(ASMAtomicReadU32(&pAhciPort->cTasksActive) == 0);
-    ahciFinishStorageDeviceReset(pAhciPort, pAhciReq);
+    ahciFinishStorageDeviceReset(pDevIns, pThis, pAhciPort, pAhciReq);
 }
 
@@ -2934 +2979 @@
  *
  * @returns nothing.
- * @param   pAhciPort          The port of the SATA controller.
- * @param   cbTransfer         Transfer size of the request.
- * @param   pCmdFis            Pointer to the command FIS from the guest.
- * @param   fRead              Flag whether this is a read request.
- * @param   fInterrupt         If an interrupt should be send to the guest.
- */
-static void ahciSendPioSetupFis(PAHCIPort pAhciPort, size_t cbTransfer, uint8_t *pCmdFis,
-                                bool fRead, bool fInterrupt)
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
+ * @param   pAhciPort   The port of the SATA controller.
+ * @param   cbTransfer  Transfer size of the request.
+ * @param   pCmdFis     Pointer to the command FIS from the guest.
+ * @param   fRead       Flag whether this is a read request.
+ * @param   fInterrupt  If an interrupt should be send to the guest.
+ */
+static void ahciSendPioSetupFis(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort,
+                                size_t cbTransfer, uint8_t *pCmdFis, bool fRead, bool fInterrupt)
 {
     uint8_t abPioSetupFis[20];
     bool fAssertIntr = false;
-    PAHCI pThis = pAhciPort->CTX_SUFF(pAhci);
 
     ahciLog(("%s: building PIO setup Fis\n", __FUNCTION__));
@@ -2979 +3025 @@
         pAhciPort->regTFD = (pCmdFis[AHCI_CMDFIS_ERR] << 8) | pCmdFis[AHCI_CMDFIS_STS];
 
-        ahciPostFisIntoMemory(pAhciPort, AHCI_CMDFIS_TYPE_PIOSETUP, abPioSetupFis);
+        ahciPostFisIntoMemory(pDevIns, pAhciPort, AHCI_CMDFIS_TYPE_PIOSETUP, abPioSetupFis);
 
         if (fInterrupt)
@@ -2991 +3037 @@
         if (fAssertIntr)
         {
-            int rc = ahciHbaSetInterrupt(pThis, pAhciPort->iLUN, VERR_IGNORED);
+            int rc = ahciHbaSetInterrupt(pDevIns, pThis, pAhciPort->iLUN, VERR_IGNORED);
             AssertRC(rc);
         }
@@ -3001 +3047 @@
  *
  * @returns Nothing
- * @param   pAhciPort          The port of the SATA controller.
- * @param   uTag               The tag of the request.
- * @param   pCmdFis            Pointer to the command FIS from the guest.
- * @param   fInterrupt         If an interrupt should be send to the guest.
- */
-static void ahciSendD2HFis(PAHCIPort pAhciPort, uint32_t uTag, uint8_t *pCmdFis, bool fInterrupt)
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
+ * @param   pAhciPort   The port of the SATA controller.
+ * @param   uTag        The tag of the request.
+ * @param   pCmdFis     Pointer to the command FIS from the guest.
+ * @param   fInterrupt  If an interrupt should be send to the guest.
+ */
+static void ahciSendD2HFis(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, uint32_t uTag, uint8_t *pCmdFis, bool fInterrupt)
 {
     uint8_t d2hFis[20];
     bool fAssertIntr = false;
-    PAHCI pThis = pAhciPort->CTX_SUFF(pAhci);
 
     ahciLog(("%s: building D2H Fis\n", __FUNCTION__));
@@ -3034 +3081 @@
         pAhciPort->regTFD = (pCmdFis[AHCI_CMDFIS_ERR] << 8) | pCmdFis[AHCI_CMDFIS_STS];
 
-        ahciPostFisIntoMemory(pAhciPort, AHCI_CMDFIS_TYPE_D2H, d2hFis);
+        ahciPostFisIntoMemory(pDevIns, pAhciPort, AHCI_CMDFIS_TYPE_D2H, d2hFis);
 
         if (pCmdFis[AHCI_CMDFIS_STS] & ATA_STAT_ERR)
@@ -3060 +3107 @@
         if (fAssertIntr)
         {
-            int rc = ahciHbaSetInterrupt(pThis, pAhciPort->iLUN, VERR_IGNORED);
+            int rc = ahciHbaSetInterrupt(pDevIns, pThis, pAhciPort->iLUN, VERR_IGNORED);
             AssertRC(rc);
         }
@@ -3070 +3117 @@
  *
  * @returns Nothing
- * @param   pAhciPort           The port for which the SDB Fis is send.
- * @param   uFinishedTasks      Bitmask of finished tasks.
- * @param   fInterrupt          If an interrupt should be asserted.
- */
-static void ahciSendSDBFis(PAHCIPort pAhciPort, uint32_t uFinishedTasks, bool fInterrupt)
+ * @param   pDevIns         The device instance.
+ * @param   pThis           The shared AHCI state.
+ * @param   pAhciPort       The port for which the SDB Fis is send, shared bits.
+ * @param   pAhciPortR3     The port for which the SDB Fis is send, ring-3 bits.
+ * @param   uFinishedTasks  Bitmask of finished tasks.
+ * @param   fInterrupt      If an interrupt should be asserted.
+ */
+static void ahciSendSDBFis(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, PAHCIPORTR3 pAhciPortR3,
+                           uint32_t uFinishedTasks, bool fInterrupt)
 {
     uint32_t sdbFis[2];
     bool fAssertIntr = false;
-    PAHCI pThis = pAhciPort->CTX_SUFF(pAhci);
-    PAHCIREQ pTaskErr = ASMAtomicReadPtrT(&pAhciPort->pTaskErr, PAHCIREQ);
+    PAHCIREQ pTaskErr = ASMAtomicReadPtrT(&pAhciPortR3->pTaskErr, PAHCIREQ);
 
     ahciLog(("%s: Building SDB FIS\n", __FUNCTION__));
@@ -3105 +3155 @@
         sdbFis[1] = pAhciPort->u32QueuedTasksFinished | uFinishedTasks;
 
-        ahciPostFisIntoMemory(pAhciPort, AHCI_CMDFIS_TYPE_SETDEVBITS, (uint8_t *)sdbFis);
+        ahciPostFisIntoMemory(pDevIns, pAhciPort, AHCI_CMDFIS_TYPE_SETDEVBITS, (uint8_t *)sdbFis);
 
         if (RT_UNLIKELY(pTaskErr))
@@ -3127 +3177 @@
         if (fAssertIntr)
         {
-            int rc = ahciHbaSetInterrupt(pThis, pAhciPort->iLUN, VERR_IGNORED);
+            int rc = ahciHbaSetInterrupt(pDevIns, pThis, pAhciPort->iLUN, VERR_IGNORED);
             AssertRC(rc);
         }
@@ -3152 +3202 @@
 }
 
-static uint64_t ahciGetSector(PAHCIPort pAhciPort, uint8_t *pCmdFis, bool fLBA48)
+static uint64_t ahciGetSector(PAHCIPORT pAhciPort, uint8_t *pCmdFis, bool fLBA48)
 {
     uint64_t iLBA;
@@ -3212 +3262 @@
  * @copydoc AHCIR3MEMCOPYCALLBACK
  */
-static DECLCALLBACK(void) ahciR3CopyBufferFromGuestWorker(PAHCI pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
+static DECLCALLBACK(void) ahciR3CopyBufferFromGuestWorker(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
                                                           size_t cbCopy, size_t *pcbSkip)
 {
@@ -3226 +3276 @@
 
         AssertPtr(pvSeg);
-        PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
+        PDMDevHlpPhysRead(pDevIns, GCPhys, pvSeg, cbSeg);
         GCPhys += cbSeg;
         cbCopy -= cbSeg;
@@ -3237 +3287 @@
  * @copydoc AHCIR3MEMCOPYCALLBACK
  */
-static DECLCALLBACK(void) ahciR3CopyBufferToGuestWorker(PAHCI pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
+static DECLCALLBACK(void) ahciR3CopyBufferToGuestWorker(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
                                                         size_t cbCopy, size_t *pcbSkip)
 {
@@ -3251 +3301 @@
 
         AssertPtr(pvSeg);
-        PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
+        PDMDevHlpPCIPhysWrite(pDevIns, GCPhys, pvSeg, cbSeg);
         GCPhys += cbSeg;
         cbCopy -= cbSeg;
@@ -3261 +3311 @@
  *
  * @returns Amount of bytes copied.
- * @param   pThis          The AHCI controller device instance.
- * @param   pAhciReq       AHCI request structure.
- * @param   pfnCopyWorker  The copy method to apply for each guest buffer.
- * @param   pSgBuf         The host S/G buffer.
- * @param   cbSkip         How many bytes to skip in advance before starting to copy.
- * @param   cbCopy         How many bytes to copy.
- */
-static size_t ahciR3PrdtlWalk(PAHCI pThis, PAHCIREQ pAhciReq,
+ * @param   pDevIns         The device instance.
+ * @param   pAhciReq        AHCI request structure.
+ * @param   pfnCopyWorker   The copy method to apply for each guest buffer.
+ * @param   pSgBuf          The host S/G buffer.
+ * @param   cbSkip          How many bytes to skip in advance before starting to copy.
+ * @param   cbCopy          How many bytes to copy.
+ */
+static size_t ahciR3PrdtlWalk(PPDMDEVINS pDevIns, PAHCIREQ pAhciReq,
                               PAHCIR3MEMCOPYCALLBACK pfnCopyWorker,
                               PRTSGBUF pSgBuf, size_t cbSkip, size_t cbCopy)
@@ -3291 +3341 @@
                                    : RT_ELEMENTS(aPrdtlEntries);
 
-        PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhysPrdtl, &aPrdtlEntries[0],
+        PDMDevHlpPhysRead(pDevIns, GCPhysPrdtl, &aPrdtlEntries[0],
                           cPrdtlEntriesRead * sizeof(SGLEntry));
 
@@ -3302 +3352 @@
 
             /* Copy into SG entry. */
-            pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, cbThisCopy, &cbSkip);
+            pfnCopyWorker(pDevIns, GCPhysAddrDataBase, pSgBuf, cbThisCopy, &cbSkip);
 
             cbCopy   -= cbThisCopy;
@@ -3322 +3372 @@
  *
  * @returns Amount of bytes copied to the PRDTL.
- * @param   pThis          The AHCI controller device instance.
- * @param   pAhciReq       AHCI request structure.
- * @param   pSgBuf         The S/G buffer to copy from.
- * @param   cbSkip         How many bytes to skip in advance before starting to copy.
- * @param   cbCopy         How many bytes to copy.
- */
-static size_t ahciR3CopySgBufToPrdtl(PAHCI pThis, PAHCIREQ pAhciReq, PRTSGBUF pSgBuf,
-                                     size_t cbSkip, size_t cbCopy)
-{
-    return ahciR3PrdtlWalk(pThis, pAhciReq, ahciR3CopyBufferToGuestWorker,
-                           pSgBuf, cbSkip, cbCopy);
+ * @param   pDevIns     The device instance.
+ * @param   pAhciReq    AHCI request structure.
+ * @param   pSgBuf      The S/G buffer to copy from.
+ * @param   cbSkip      How many bytes to skip in advance before starting to copy.
+ * @param   cbCopy      How many bytes to copy.
+ */
+static size_t ahciR3CopySgBufToPrdtl(PPDMDEVINS pDevIns, PAHCIREQ pAhciReq, PRTSGBUF pSgBuf, size_t cbSkip, size_t cbCopy)
+{
+    return ahciR3PrdtlWalk(pDevIns, pAhciReq, ahciR3CopyBufferToGuestWorker, pSgBuf, cbSkip, cbCopy);
 }
 
@@ -3339 +3387 @@
  *
  * @returns Amount of bytes copied from the PRDTL.
- * @param   pThis          The AHCI controller device instance.
- * @param   pAhciReq       AHCI request structure.
- * @param   pSgBuf         The S/G buffer to copy into.
- * @param   cbSkip         How many bytes to skip in advance before starting to copy.
- * @param   cbCopy         How many bytes to copy.
- */
-static size_t ahciR3CopySgBufFromPrdtl(PAHCI pThis, PAHCIREQ pAhciReq, PRTSGBUF pSgBuf,
-                                       size_t cbSkip, size_t cbCopy)
-{
-    return ahciR3PrdtlWalk(pThis, pAhciReq, ahciR3CopyBufferFromGuestWorker,
-                           pSgBuf, cbSkip, cbCopy);
+ * @param   pDevIns     The device instance.
+ * @param   pAhciReq    AHCI request structure.
+ * @param   pSgBuf      The S/G buffer to copy into.
+ * @param   cbSkip      How many bytes to skip in advance before starting to copy.
+ * @param   cbCopy      How many bytes to copy.
+ */
+static size_t ahciR3CopySgBufFromPrdtl(PPDMDEVINS pDevIns, PAHCIREQ pAhciReq, PRTSGBUF pSgBuf, size_t cbSkip, size_t cbCopy)
+{
+    return ahciR3PrdtlWalk(pDevIns, pAhciReq, ahciR3CopyBufferFromGuestWorker, pSgBuf, cbSkip, cbCopy);
 }
 
@@ -3356 +3402 @@
  *
  * @returns Amount of bytes copied from the PRDTL.
- * @param   pThis          The AHCI controller device instance.
- * @param   pAhciReq       AHCI request structure.
- * @param   pvSrc          The buffer to copy from.
- * @param   cbSrc          How many bytes to copy.
- * @param   cbSkip         How many bytes to skip initially.
- */
-static size_t ahciR3CopyBufferToPrdtl(PAHCI pThis, PAHCIREQ pAhciReq, const void *pvSrc,
-                                      size_t cbSrc, size_t cbSkip)
+ * @param   pDevIns     The device instance.
+ * @param   pAhciReq    AHCI request structure.
+ * @param   pvSrc       The buffer to copy from.
+ * @param   cbSrc       How many bytes to copy.
+ * @param   cbSkip      How many bytes to skip initially.
+ */
+static size_t ahciR3CopyBufferToPrdtl(PPDMDEVINS pDevIns, PAHCIREQ pAhciReq, const void *pvSrc, size_t cbSrc, size_t cbSkip)
 {
     RTSGSEG Seg;
@@ -3370 +3415 @@
     Seg.cbSeg = cbSrc;
     RTSgBufInit(&SgBuf, &Seg, 1);
-    return ahciR3CopySgBufToPrdtl(pThis, pAhciReq, &SgBuf, cbSkip, cbSrc);
+    return ahciR3CopySgBufToPrdtl(pDevIns, pAhciReq, &SgBuf, cbSkip, cbSrc);
 }
 
@@ -3377 +3422 @@
  *
  * @returns VBox status code.
- * @param   pThis          The AHCI controller device instance.
- * @param   pAhciReq       AHCI request structure.
- * @param   pcbPrdt        Where to store the size of the guest buffer.
- */
-static int ahciR3PrdtQuerySize(PAHCI pThis, PAHCIREQ pAhciReq, size_t *pcbPrdt)
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The AHCI controller device instance.
+ * @param   pAhciReq    AHCI request structure.
+ * @param   pcbPrdt     Where to store the size of the guest buffer.
+ */
+static int ahciR3PrdtQuerySize(PPDMDEVINS pDevIns, PAHCIREQ pAhciReq, size_t *pcbPrdt)
 {
     RTGCPHYS GCPhysPrdtl = pAhciReq->GCPhysPrdtl;
@@ -3390 +3436 @@
     {
         SGLEntry aPrdtlEntries[32];
-        uint32_t cPrdtlEntriesRead = cPrdtlEntries < RT_ELEMENTS(aPrdtlEntries)
-                                   ? cPrdtlEntries
-                                   : RT_ELEMENTS(aPrdtlEntries);
-
-        PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhysPrdtl, &aPrdtlEntries[0],
-                          cPrdtlEntriesRead * sizeof(SGLEntry));
+        uint32_t const cPrdtlEntriesRead = RT_MIN(cPrdtlEntries,  RT_ELEMENTS(aPrdtlEntries));
+
+        PDMDevHlpPhysRead(pDevIns, GCPhysPrdtl, &aPrdtlEntries[0], cPrdtlEntriesRead * sizeof(SGLEntry));
 
         for (uint32_t i = 0; i < cPrdtlEntriesRead; i++)
@@ -3412 +3455 @@
  *
  * @returns Whether all active tasks were canceled.
- * @param   pAhciPort        The AHCI port.
- */
-static bool ahciCancelActiveTasks(PAHCIPort pAhciPort)
-{
-    if (pAhciPort->pDrvMediaEx)
-    {
-        int rc = pAhciPort->pDrvMediaEx->pfnIoReqCancelAll(pAhciPort->pDrvMediaEx);
+ * @param   pAhciPortR3 The AHCI port, ring-3 bits.
+ */
+static bool ahciR3CancelActiveTasks(PAHCIPORTR3 pAhciPortR3)
+{
+    if (pAhciPortR3->pDrvMediaEx)
+    {
+        int rc = pAhciPortR3->pDrvMediaEx->pfnIoReqCancelAll(pAhciPortR3->pDrvMediaEx);
         AssertRC(rc);
     }
@@ -3428 +3471 @@
  *
  * @returns VBox status code.
- * @param   pAhciPort     AHCI port state.
- * @param   pAhciReq      The request handling the TRIM request.
- * @param   idxRangeStart Index of the first range to start copying.
- * @param   paRanges      Where to store the ranges.
- * @param   cRanges       Number of ranges fitting into the array.
- * @param   pcRanges      Where to store the amount of ranges actually copied on success.
- */
-static int ahciTrimRangesCreate(PAHCIPort pAhciPort, PAHCIREQ pAhciReq, uint32_t idxRangeStart,
+ * @param   pDevIns         The device instance.
+ * @param   pAhciPort       AHCI port state.
+ * @param   pAhciReq        The request handling the TRIM request.
+ * @param   idxRangeStart   Index of the first range to start copying.
+ * @param   paRanges        Where to store the ranges.
+ * @param   cRanges         Number of ranges fitting into the array.
+ * @param   pcRanges        Where to store the amount of ranges actually copied on success.
+ */
+static int ahciTrimRangesCreate(PPDMDEVINS pDevIns, PAHCIPORT pAhciPort, PAHCIREQ pAhciReq, uint32_t idxRangeStart,
                                 PRTRANGE paRanges, uint32_t cRanges, uint32_t *pcRanges)
 {
@@ -3442 +3486 @@
     uint32_t cPrdtlEntries = pAhciReq->cPrdtlEntries;
     RTGCPHYS GCPhysPrdtl   = pAhciReq->GCPhysPrdtl;
-    PPDMDEVINS pDevIns     = pAhciPort->CTX_SUFF(pDevIns);
     int rc = VERR_PDM_MEDIAEX_IOBUF_OVERFLOW;
     uint32_t idxRange = 0;
@@ -3506 +3549 @@
  *
  * @returns A new AHCI request structure or NULL if out of memory.
- * @param   pAhciPort    The AHCI port.
- * @param   uTag         The tag to assign.
- */
-static PAHCIREQ ahciR3ReqAlloc(PAHCIPort pAhciPort, uint32_t uTag)
+ * @param   pAhciPortR3 The AHCI port, ring-3 bits.
+ * @param   uTag        The tag to assign.
+ */
+static PAHCIREQ ahciR3ReqAlloc(PAHCIPORTR3 pAhciPortR3, uint32_t uTag)
 {
     PAHCIREQ pAhciReq = NULL;
     PDMMEDIAEXIOREQ hIoReq = NULL;
 
-    int rc = pAhciPort->pDrvMediaEx->pfnIoReqAlloc(pAhciPort->pDrvMediaEx, &hIoReq, (void **)&pAhciReq,
-                                                   uTag, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
+    int rc = pAhciPortR3->pDrvMediaEx->pfnIoReqAlloc(pAhciPortR3->pDrvMediaEx, &hIoReq, (void **)&pAhciReq,
+                                                     uTag, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
     if (RT_SUCCESS(rc))
     {
@@ -3530 +3573 @@
  *
  * @returns nothing.
- * @param   pAhciPort    The AHCI port.
- * @param   pAhciReq     The request to free.
- */
-static void ahciR3ReqFree(PAHCIPort pAhciPort, PAHCIREQ pAhciReq)
+ * @param   pAhciPort   The AHCI port, shared bits.
+ * @param   pAhciPortR3 The AHCI port, ring-3 bits.
+ * @param   pAhciReq    The request to free.
+ */
+static void ahciR3ReqFree(PAHCIPORTR3 pAhciPortR3, PAHCIREQ pAhciReq)
 {
     if (   pAhciReq
         && !(pAhciReq->fFlags & AHCI_REQ_IS_ON_STACK))
     {
-        int rc = pAhciPort->pDrvMediaEx->pfnIoReqFree(pAhciPort->pDrvMediaEx, pAhciReq->hIoReq);
+        int rc = pAhciPortR3->pDrvMediaEx->pfnIoReqFree(pAhciPortR3->pDrvMediaEx, pAhciReq->hIoReq);
         AssertRC(rc);
     }
@@ -3549 +3593 @@
  * @returns Flag whether the given request was canceled inbetween;
  *
- * @param pAhciPort    Pointer to the port where to request completed.
- * @param pAhciReq     Pointer to the task which finished.
- * @param rcReq        IPRT status code of the completed request.
- */
-static bool ahciTransferComplete(PAHCIPort pAhciPort, PAHCIREQ pAhciReq, int rcReq)
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
+ * @param   pThisCC     The ring-3 AHCI state.
+ * @param   pAhciPort   Pointer to the port where to request completed, shared bits.
+ * @param   pAhciPortR3 Pointer to the port where to request completed, ring-3 bits.
+ * @param   pAhciReq    Pointer to the task which finished.
+ * @param   rcReq       IPRT status code of the completed request.
+ */
+static bool ahciR3TransferComplete(PPDMDEVINS pDevIns, PAHCI pThis, PAHCICC pThisCC,
+                                   PAHCIPORT pAhciPort, PAHCIPORTR3 pAhciPortR3, PAHCIREQ pAhciReq, int rcReq)
 {
     bool fCanceled = false;
@@ -3563 +3612 @@
 
     if (pAhciReq->fMapped)
-        PDMDevHlpPhysReleasePageMappingLock(pAhciPort->CTX_SUFF(pAhci)->CTX_SUFF(pDevIns),
-                                            &pAhciReq->PgLck);
+        PDMDevHlpPhysReleasePageMappingLock(pDevIns, &pAhciReq->PgLck);
 
     if (rcReq != VERR_PDM_MEDIAEX_IOREQ_CANCELED)
@@ -3587 +3635 @@
                 if (pAhciReq->enmType == PDMMEDIAEXIOREQTYPE_FLUSH)
                     LogRel(("AHCI#%uP%u: Flush returned rc=%Rrc\n",
-                            pAhciPort->CTX_SUFF(pDevIns)->iInstance, pAhciPort->iLUN, rcReq));
+                            pDevIns->iInstance, pAhciPort->iLUN, rcReq));
                 else if (pAhciReq->enmType == PDMMEDIAEXIOREQTYPE_DISCARD)
                     LogRel(("AHCI#%uP%u: Trim returned rc=%Rrc\n",
-                            pAhciPort->CTX_SUFF(pDevIns)->iInstance, pAhciPort->iLUN, rcReq));
+                            pDevIns->iInstance, pAhciPort->iLUN, rcReq));
                 else
                     LogRel(("AHCI#%uP%u: %s at offset %llu (%zu bytes left) returned rc=%Rrc\n",
-                            pAhciPort->CTX_SUFF(pDevIns)->iInstance, pAhciPort->iLUN,
+                            pDevIns->iInstance, pAhciPort->iLUN,
                             pAhciReq->enmType == PDMMEDIAEXIOREQTYPE_READ
                             ? "Read"
@@ -3608 +3656 @@
             PAHCIREQ pReqDup = (PAHCIREQ)RTMemDup(pAhciReq, sizeof(AHCIREQ));
             if (   pReqDup
-                && !ASMAtomicCmpXchgPtr(&pAhciPort->pTaskErr, pReqDup, NULL))
+                && !ASMAtomicCmpXchgPtr(&pAhciPortR3->pTaskErr, pReqDup, NULL))
                 RTMemFree(pReqDup);
         }
@@ -3640 +3688 @@
             {
                 size_t cbXfer = 0;
-                int rc = pAhciPort->pDrvMediaEx->pfnIoReqQueryXferSize(pAhciPort->pDrvMediaEx, pAhciReq->hIoReq, &cbXfer);
+                int rc = pAhciPortR3->pDrvMediaEx->pfnIoReqQueryXferSize(pAhciPortR3->pDrvMediaEx, pAhciReq->hIoReq, &cbXfer);
                 AssertRC(rc);
                 u32PRDBC = (uint32_t)RT_MIN(cbXfer, pAhciReq->cbTransfer);
@@ -3647 +3695 @@
                 u32PRDBC = (uint32_t)pAhciReq->cbTransfer;
 
-            PDMDevHlpPCIPhysWrite(pAhciPort->CTX_SUFF(pDevIns), pAhciReq->GCPhysCmdHdrAddr + RT_UOFFSETOF(CmdHdr, u32PRDBC),
+            PDMDevHlpPCIPhysWrite(pDevIns, pAhciReq->GCPhysCmdHdrAddr + RT_UOFFSETOF(CmdHdr, u32PRDBC),
                                   &u32PRDBC, sizeof(u32PRDBC));
 
@@ -3659 +3707 @@
                 ASMAtomicOrU32(&pAhciPort->regIS, AHCI_PORT_IS_OFS);
                 if (pAhciPort->regIE & AHCI_PORT_IE_OFE)
-                    ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VERR_IGNORED);
+                    ahciHbaSetInterrupt(pDevIns, pThis, pAhciPort->iLUN, VERR_IGNORED);
             }
         }
@@ -3675 +3723 @@
         memcpy(&cmdFis[0], &pAhciReq->cmdFis[0], sizeof(cmdFis));
 
-        ahciR3ReqFree(pAhciPort, pAhciReq);
+        ahciR3ReqFree(pAhciPortR3, pAhciReq);
 
         /* Post a PIO setup FIS first if this is a PIO command which transfers data. */
         if (fFlags & AHCI_REQ_PIO_DATA)
-            ahciSendPioSetupFis(pAhciPort, cbTransfer, &cmdFis[0], fRead, false /* fInterrupt */);
+            ahciSendPioSetupFis(pDevIns, pThis, pAhciPort, cbTransfer, &cmdFis[0], fRead, false /* fInterrupt */);
 
         if (fFlags & AHCI_REQ_CLEAR_SACT)
         {
-            if (RT_SUCCESS(rcReq) && !ASMAtomicReadPtrT(&pAhciPort->pTaskErr, PAHCIREQ))
+            if (RT_SUCCESS(rcReq) && !ASMAtomicReadPtrT(&pAhciPortR3->pTaskErr, PAHCIREQ))
                 ASMAtomicOrU32(&pAhciPort->u32QueuedTasksFinished, RT_BIT_32(uTag));
         }
@@ -3694 +3742 @@
              * impact on performance (see @bugref{5071})
              */
-            ahciSendSDBFis(pAhciPort, 0, true);
+            ahciSendSDBFis(pDevIns, pThis, pAhciPort, pAhciPortR3, 0, true);
         }
         else
-            ahciSendD2HFis(pAhciPort, uTag, &cmdFis[0], true);
+            ahciSendD2HFis(pDevIns, pThis, pAhciPort, uTag, &cmdFis[0], true);
     }
     else
@@ -3712 +3760 @@
             if (pAhciReq->enmType == PDMMEDIAEXIOREQTYPE_FLUSH)
                 LogRel(("AHCI#%uP%u: Canceled flush returned rc=%Rrc\n",
-                        pAhciPort->CTX_SUFF(pDevIns)->iInstance, pAhciPort->iLUN, rcReq));
+                        pDevIns->iInstance, pAhciPort->iLUN, rcReq));
             else if (pAhciReq->enmType == PDMMEDIAEXIOREQTYPE_DISCARD)
                 LogRel(("AHCI#%uP%u: Canceled trim returned rc=%Rrc\n",
-                        pAhciPort->CTX_SUFF(pDevIns)->iInstance,pAhciPort->iLUN, rcReq));
+                        pDevIns->iInstance,pAhciPort->iLUN, rcReq));
             else
                 LogRel(("AHCI#%uP%u: Canceled %s at offset %llu (%zu bytes left) returned rc=%Rrc\n",
-                        pAhciPort->CTX_SUFF(pDevIns)->iInstance, pAhciPort->iLUN,
+                        pDevIns->iInstance, pAhciPort->iLUN,
                         pAhciReq->enmType == PDMMEDIAEXIOREQTYPE_READ
                         ? "read"
@@ -3726 +3774 @@
          }
 
-         ahciR3ReqFree(pAhciPort, pAhciReq);
+         ahciR3ReqFree(pAhciPortR3, pAhciReq);
     }
 
@@ -3739 +3787 @@
     ASMAtomicDecU32(&pAhciPort->cTasksActive);
 
-    if (pAhciPort->cTasksActive == 0 && pAhciPort->pAhciR3->fSignalIdle)
-        PDMDevHlpAsyncNotificationCompleted(pAhciPort->pDevInsR3);
+    if (pAhciPort->cTasksActive == 0 && pThisCC->fSignalIdle)
+        PDMDevHlpAsyncNotificationCompleted(pDevIns);
 
     return fCanceled;
@@ -3752 +3800 @@
                                                 size_t cbCopy)
 {
-    RT_NOREF(hIoReq);
-    PAHCIPort pAhciPort = RT_FROM_MEMBER(pInterface, AHCIPort, IMediaExPort);
+    PAHCIPORTR3 pAhciPortR3 = RT_FROM_MEMBER(pInterface, AHCIPORTR3, IMediaExPort);
     int rc = VINF_SUCCESS;
     PAHCIREQ pIoReq = (PAHCIREQ)pvIoReqAlloc;
-
-    ahciR3CopySgBufToPrdtl(pAhciPort->CTX_SUFF(pAhci), pIoReq, pSgBuf, offDst, cbCopy);
+    RT_NOREF(hIoReq);
+
+    ahciR3CopySgBufToPrdtl(pAhciPortR3->pDevIns, pIoReq, pSgBuf, offDst, cbCopy);
 
     if (pIoReq->fFlags & AHCI_REQ_OVERFLOW)
@@ -3772 +3820 @@
                                               size_t cbCopy)
 {
-    RT_NOREF(hIoReq);
-    PAHCIPort pAhciPort = RT_FROM_MEMBER(pInterface, AHCIPort, IMediaExPort);
+    PAHCIPORTR3 pAhciPortR3 = RT_FROM_MEMBER(pInterface, AHCIPORTR3, IMediaExPort);
     int rc = VINF_SUCCESS;
     PAHCIREQ pIoReq = (PAHCIREQ)pvIoReqAlloc;
-
-    ahciR3CopySgBufFromPrdtl(pAhciPort->CTX_SUFF(pAhci), pIoReq, pSgBuf, offSrc, cbCopy);
+    RT_NOREF(hIoReq);
+
+    ahciR3CopySgBufFromPrdtl(pAhciPortR3->pDevIns, pIoReq, pSgBuf, offSrc, cbCopy);
     if (pIoReq->fFlags & AHCI_REQ_OVERFLOW)
         rc = VERR_PDM_MEDIAEX_IOBUF_UNDERRUN;
@@ -3790 +3838 @@
                                              void *pvIoReqAlloc, void **ppvBuf, size_t *pcbBuf)
 {
+    PAHCIPORTR3 pAhciPortR3 = RT_FROM_MEMBER(pInterface, AHCIPORTR3, IMediaExPort);
+    PPDMDEVINS  pDevIns     = pAhciPortR3->pDevIns;
+    PAHCIREQ    pIoReq      = (PAHCIREQ)pvIoReqAlloc;
+    int         rc          = VERR_NOT_SUPPORTED;
     RT_NOREF(hIoReq);
-    int rc              = VERR_NOT_SUPPORTED;
-    PAHCIPort pAhciPort = RT_FROM_MEMBER(pInterface, AHCIPort, IMediaExPort);
-    PAHCIREQ pIoReq     = (PAHCIREQ)pvIoReqAlloc;
-    PAHCI pThis         = pAhciPort->CTX_SUFF(pAhci);
 
     /* Only allow single 4KB page aligned buffers at the moment. */
@@ -3803 +3851 @@
         SGLEntry PrdtEntry;
 
-        PDMDevHlpPhysRead(pThis->pDevInsR3, GCPhysPrdt, &PrdtEntry, sizeof(SGLEntry));
+        PDMDevHlpPhysRead(pDevIns, GCPhysPrdt, &PrdtEntry, sizeof(SGLEntry));
 
         RTGCPHYS GCPhysAddrDataBase = AHCI_RTGCPHYS_FROM_U32(PrdtEntry.u32DBAUp, PrdtEntry.u32DBA);
@@ -3811 +3859 @@
             && !(GCPhysAddrDataBase & (_4K - 1)))
         {
-            rc = PDMDevHlpPhysGCPhys2CCPtr(pThis->pDevInsR3, GCPhysAddrDataBase,
-                                           0, ppvBuf, &pIoReq->PgLck);
+            rc = PDMDevHlpPhysGCPhys2CCPtr(pDevIns, GCPhysAddrDataBase, 0, ppvBuf, &pIoReq->PgLck);
             if (RT_SUCCESS(rc))
             {
@@ -3834 +3881 @@
                                                        uint32_t *pcRanges)
 {
+    PAHCIPORTR3 pAhciPortR3 = RT_FROM_MEMBER(pInterface, AHCIPORTR3, IMediaExPort);
+    PPDMDEVINS  pDevIns     = pAhciPortR3->pDevIns;
+    PAHCI       pThis       = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIPORT   pAhciPort   = &RT_SAFE_SUBSCRIPT(pThis->ahciPort, pAhciPortR3->iLUN);
+    PAHCIREQ    pIoReq      = (PAHCIREQ)pvIoReqAlloc;
     RT_NOREF(hIoReq);
-    PAHCIPort pAhciPort = RT_FROM_MEMBER(pInterface, AHCIPort, IMediaExPort);
-    PAHCIREQ pIoReq = (PAHCIREQ)pvIoReqAlloc;
-
-    return ahciTrimRangesCreate(pAhciPort, pIoReq, idxRangeStart, paRanges, cRanges, pcRanges);
+
+    return ahciTrimRangesCreate(pDevIns, pAhciPort, pIoReq, idxRangeStart, paRanges, cRanges, pcRanges);
 }
 
@@ -3847 +3897 @@
                                                    void *pvIoReqAlloc, int rcReq)
 {
+    PAHCIPORTR3 pAhciPortR3 = RT_FROM_MEMBER(pInterface, AHCIPORTR3, IMediaExPort);
+    PPDMDEVINS  pDevIns     = pAhciPortR3->pDevIns;
+    PAHCIR3     pThisCC     = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+    PAHCI       pThis       = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIPORT   pAhciPort   = &RT_SAFE_SUBSCRIPT(pThis->ahciPort, pAhciPortR3->iLUN);
+    PAHCIREQ    pIoReq      = (PAHCIREQ)pvIoReqAlloc;
     RT_NOREF(hIoReq);
-    PAHCIPort pAhciPort = RT_FROM_MEMBER(pInterface, AHCIPort, IMediaExPort);
-    ahciTransferComplete(pAhciPort, (PAHCIREQ)pvIoReqAlloc, rcReq);
+
+    ahciR3TransferComplete(pDevIns, pThis, pThisCC, pAhciPort, pAhciPortR3, pIoReq, rcReq);
     return VINF_SUCCESS;
 }
@@ -3859 +3915 @@
                                                   void *pvIoReqAlloc, PDMMEDIAEXIOREQSTATE enmState)
 {
+    PAHCIPORTR3 pAhciPortR3 = RT_FROM_MEMBER(pInterface, AHCIPORTR3, IMediaExPort);
+    PPDMDEVINS  pDevIns     = pAhciPortR3->pDevIns;
+    PAHCIR3     pThisCC     = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+    PAHCI       pThis       = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIPORT   pAhciPort   = &RT_SAFE_SUBSCRIPT(pThis->ahciPort, pAhciPortR3->iLUN);
     RT_NOREF(hIoReq, pvIoReqAlloc);
-    PAHCIPort pAhciPort = RT_FROM_MEMBER(pInterface, AHCIPort, IMediaExPort);
 
     switch (enmState)
@@ -3868 +3928 @@
             /* Make sure the request is not accounted for so the VM can suspend successfully. */
             uint32_t cTasksActive = ASMAtomicDecU32(&pAhciPort->cTasksActive);
-            if (!cTasksActive && pAhciPort->pAhciR3->fSignalIdle)
-                PDMDevHlpAsyncNotificationCompleted(pAhciPort->pDevInsR3);
+            if (!cTasksActive && pThisCC->fSignalIdle)
+                PDMDevHlpAsyncNotificationCompleted(pDevIns);
             break;
         }
@@ -3886 +3946 @@
 static DECLCALLBACK(void) ahciR3MediumEjected(PPDMIMEDIAEXPORT pInterface)
 {
-    PAHCIPort pAhciPort = RT_FROM_MEMBER(pInterface, AHCIPort, IMediaExPort);
-    PAHCI pThis = pAhciPort->CTX_SUFF(pAhci);
-
-    if (pThis->pMediaNotify)
-    {
-        int rc = VMR3ReqCallNoWait(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), VMCPUID_ANY,
-                                   (PFNRT)pThis->pMediaNotify->pfnEjected, 2,
-                                   pThis->pMediaNotify, pAhciPort->iLUN);
+    PAHCIPORTR3 pAhciPortR3 = RT_FROM_MEMBER(pInterface, AHCIPORTR3, IMediaExPort);
+    PPDMDEVINS  pDevIns     = pAhciPortR3->pDevIns;
+    PAHCIR3     pThisCC     = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+    PAHCI       pThis       = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIPORT   pAhciPort   = &RT_SAFE_SUBSCRIPT(pThis->ahciPort, pAhciPortR3->iLUN);
+
+    if (pThisCC->pMediaNotify)
+    {
+        int rc = VMR3ReqCallNoWait(PDMDevHlpGetVM(pDevIns), VMCPUID_ANY,
+                                   (PFNRT)pThisCC->pMediaNotify->pfnEjected, 2,
+                                   pThisCC->pMediaNotify, pAhciPort->iLUN);
         AssertRC(rc);
     }
@@ -3902 +3965 @@
  *
  * @returns The direction of the data transfer
- * @param   pAhciPort     The AHCI port of the request.
- * @param   pAhciReq      The AHCI request state.
- * @param   pCmdFis       Pointer to the command FIS.
- */
-static PDMMEDIAEXIOREQTYPE ahciProcessCmd(PAHCIPort pAhciPort, PAHCIREQ pAhciReq, uint8_t *pCmdFis)
+ * @param   pDevIns         The device instance.
+ * @param   pThis           The shared AHCI state.
+ * @param   pAhciPort       The AHCI port of the request, shared bits.
+ * @param   pAhciPortR3     The AHCI port of the request, ring-3 bits.
+ * @param   pAhciReq        The AHCI request state.
+ * @param   pCmdFis         Pointer to the command FIS.
+ */
+static PDMMEDIAEXIOREQTYPE ahciProcessCmd(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, PAHCIPORTR3 pAhciPortR3,
+                                          PAHCIREQ pAhciReq, uint8_t *pCmdFis)
 {
     PDMMEDIAEXIOREQTYPE enmType = PDMMEDIAEXIOREQTYPE_INVALID;
@@ -3919 +3986 @@
         case ATA_IDENTIFY_DEVICE:
         {
-            if (pAhciPort->pDrvMedia && !pAhciPort->fATAPI)
+            if (pAhciPortR3->pDrvMedia && !pAhciPort->fATAPI)
             {
                 uint16_t u16Temp[256];
 
                 /* Fill the buffer. */
-                ahciIdentifySS(pAhciPort, u16Temp);
+                ahciIdentifySS(pThis, pAhciPort, pAhciPortR3, u16Temp);
 
                 /* Copy the buffer. */
-                size_t cbCopied = ahciR3CopyBufferToPrdtl(pAhciPort->CTX_SUFF(pAhci), pAhciReq,
-                                                          &u16Temp[0], sizeof(u16Temp), 0 /* cbSkip */);
+                size_t cbCopied = ahciR3CopyBufferToPrdtl(pDevIns, pAhciReq, &u16Temp[0], sizeof(u16Temp), 0 /* cbSkip */);
 
                 pAhciReq->fFlags |= AHCI_REQ_PIO_DATA;
@@ -3986 +4052 @@
             {
                 /* Reset the device. */
-                ahciDeviceReset(pAhciPort, pAhciReq);
+                ahciDeviceReset(pDevIns, pThis, pAhciPort, pAhciReq);
             }
             break;
@@ -4006 +4072 @@
             {
                 size_t cbData;
-                ahciR3AtapiIdentify(pAhciReq, pAhciPort, 512, &cbData);
+                ahciR3AtapiIdentify(pDevIns, pAhciReq, pAhciPort, 512, &cbData);
 
                 pAhciReq->fFlags |= AHCI_REQ_PIO_DATA;
@@ -4099 +4165 @@
                     {
                         LogFlow(("Reading error page\n"));
-                        PAHCIREQ pTaskErr = ASMAtomicXchgPtrT(&pAhciPort->pTaskErr, NULL, PAHCIREQ);
+                        PAHCIREQ pTaskErr = ASMAtomicXchgPtrT(&pAhciPortR3->pTaskErr, NULL, PAHCIREQ);
                         if (pTaskErr)
                         {
@@ -4132 +4198 @@
                          * See SATA2 1.2 spec chapter 4.2.3.4
                          */
-                        bool fAbortedAll = ahciCancelActiveTasks(pAhciPort);
+                        bool fAbortedAll = ahciR3CancelActiveTasks(pAhciPortR3);
                         Assert(fAbortedAll); NOREF(fAbortedAll);
-                        ahciSendSDBFis(pAhciPort, 0xffffffff, true);
+                        ahciSendSDBFis(pDevIns, pThis, pAhciPort, pAhciPortR3, UINT32_C(0xffffffff), true);
 
                         break;
@@ -4141 +4207 @@
 
                 /* Copy the buffer. */
-                size_t cbCopied = ahciR3CopyBufferToPrdtl(pAhciPort->CTX_SUFF(pAhci), pAhciReq,
-                                                          &aBuf[offLogRead], cbLogRead, 0 /* cbSkip */);
+                size_t cbCopied = ahciR3CopyBufferToPrdtl(pDevIns, pAhciReq, &aBuf[offLogRead], cbLogRead, 0 /* cbSkip */);
 
                 pAhciReq->fFlags |= AHCI_REQ_PIO_DATA;
@@ -4185 +4250 @@
  *
  * @returns whether the H2D FIS was successfully read from the guest memory.
- * @param pAhciPort    The AHCI port of the request.
- * @param pAhciReq     The state of the actual task.
- */
-static bool ahciPortTaskGetCommandFis(PAHCIPort pAhciPort, PAHCIREQ pAhciReq)
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
+ * @param   pAhciPort   The AHCI port of the request.
+ * @param   pAhciReq    The state of the actual task.
+ */
+static bool ahciPortTaskGetCommandFis(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, PAHCIREQ pAhciReq)
 {
     AssertMsgReturn(pAhciPort->GCPhysAddrClb && pAhciPort->GCPhysAddrFb,
@@ -4203 +4270 @@
     LogFlow(("%s: PDMDevHlpPhysRead GCPhysAddrCmdLst=%RGp cbCmdHdr=%u\n", __FUNCTION__,
              pAhciReq->GCPhysCmdHdrAddr, sizeof(CmdHdr)));
-    PDMDevHlpPhysRead(pAhciPort->CTX_SUFF(pDevIns), pAhciReq->GCPhysCmdHdrAddr, &cmdHdr, sizeof(CmdHdr));
+    PDMDevHlpPhysRead(pDevIns, pAhciReq->GCPhysCmdHdrAddr, &cmdHdr, sizeof(CmdHdr));
 
 #ifdef LOG_ENABLED
@@ -4218 +4285 @@
     /* Read the command Fis. */
     LogFlow(("%s: PDMDevHlpPhysRead GCPhysAddrCmdTbl=%RGp cbCmdFis=%u\n", __FUNCTION__, GCPhysAddrCmdTbl, AHCI_CMDFIS_TYPE_H2D_SIZE));
-    PDMDevHlpPhysRead(pAhciPort->CTX_SUFF(pDevIns), GCPhysAddrCmdTbl, &pAhciReq->cmdFis[0], AHCI_CMDFIS_TYPE_H2D_SIZE);
+    PDMDevHlpPhysRead(pDevIns, GCPhysAddrCmdTbl, &pAhciReq->cmdFis[0], AHCI_CMDFIS_TYPE_H2D_SIZE);
 
     AssertMsgReturn(pAhciReq->cmdFis[AHCI_CMDFIS_TYPE] == AHCI_CMDFIS_TYPE_H2D,
@@ -4231 +4298 @@
     {
         GCPhysAddrCmdTbl += AHCI_CMDHDR_ACMD_OFFSET;
-        PDMDevHlpPhysRead(pAhciPort->CTX_SUFF(pDevIns), GCPhysAddrCmdTbl, &pAhciReq->aATAPICmd[0], ATAPI_PACKET_SIZE);
+        PDMDevHlpPhysRead(pDevIns, GCPhysAddrCmdTbl, &pAhciReq->aATAPICmd[0], ATAPI_PACKET_SIZE);
     }
 
@@ -4241 +4308 @@
          * but this FIS does not assert an interrupt
          */
-        ahciSendD2HFis(pAhciPort, pAhciReq->uTag, pAhciReq->cmdFis, false);
+        ahciSendD2HFis(pDevIns, pThis, pAhciPort, pAhciReq->uTag, pAhciReq->cmdFis, false);
         pAhciPort->regTFD &= ~AHCI_PORT_TFD_BSY;
     }
@@ -4261 +4328 @@
 
         ahciLog(("Entry %u at address %RGp\n", i, GCPhysPrdtl));
-        PDMDevHlpPhysRead(pAhciPort->CTX_SUFF(pDevIns), GCPhysPrdtl, &SGEntry, sizeof(SGLEntry));
+        PDMDevHlpPhysRead(pDevIns, GCPhysPrdtl, &SGEntry, sizeof(SGLEntry));
 
         RTGCPHYS GCPhysDataAddr = AHCI_RTGCPHYS_FROM_U32(SGEntry.u32DBAUp, SGEntry.u32DBA);
@@ -4277 +4344 @@
  *
  * @returns Flag whether the request was canceled inbetween.
- * @param   pAhciPort    The port the request is for.
- * @param   pAhciReq     The request to submit.
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
+ * @param   pThisCC     The ring-3 AHCI state.
+ * @param   pAhciPort   The port the request is for.
+ * @param   pAhciReq    The request to submit.
  * @param   enmType     The request type.
  */
-static bool ahciR3ReqSubmit(PAHCIPort pAhciPort, PAHCIREQ pAhciReq, PDMMEDIAEXIOREQTYPE enmType)
+static bool ahciR3ReqSubmit(PPDMDEVINS pDevIns, PAHCI pThis, PAHCICC pThisCC, PAHCIPORT pAhciPort, PAHCIPORTR3 pAhciPortR3,
+                            PAHCIREQ pAhciReq, PDMMEDIAEXIOREQTYPE enmType)
 {
     int rc = VINF_SUCCESS;
@@ -4289 +4360 @@
 
     if (enmType == PDMMEDIAEXIOREQTYPE_FLUSH)
-        rc = pAhciPort->pDrvMediaEx->pfnIoReqFlush(pAhciPort->pDrvMediaEx, pAhciReq->hIoReq);
+        rc = pAhciPortR3->pDrvMediaEx->pfnIoReqFlush(pAhciPortR3->pDrvMediaEx, pAhciReq->hIoReq);
     else if (enmType == PDMMEDIAEXIOREQTYPE_DISCARD)
     {
@@ -4301 +4372 @@
 
         pAhciPort->Led.Asserted.s.fWriting = pAhciPort->Led.Actual.s.fWriting = 1;
-        rc = pAhciPort->pDrvMediaEx->pfnIoReqDiscard(pAhciPort->pDrvMediaEx, pAhciReq->hIoReq,
+        rc = pAhciPortR3->pDrvMediaEx->pfnIoReqDiscard(pAhciPortR3->pDrvMediaEx, pAhciReq->hIoReq,
                                                      cRangesMax);
     }
@@ -4307 +4378 @@
     {
         pAhciPort->Led.Asserted.s.fReading = pAhciPort->Led.Actual.s.fReading = 1;
-        rc = pAhciPort->pDrvMediaEx->pfnIoReqRead(pAhciPort->pDrvMediaEx, pAhciReq->hIoReq,
+        rc = pAhciPortR3->pDrvMediaEx->pfnIoReqRead(pAhciPortR3->pDrvMediaEx, pAhciReq->hIoReq,
                                                   pAhciReq->uOffset, pAhciReq->cbTransfer);
     }
@@ -4313 +4384 @@
     {
         pAhciPort->Led.Asserted.s.fWriting = pAhciPort->Led.Actual.s.fWriting = 1;
-        rc = pAhciPort->pDrvMediaEx->pfnIoReqWrite(pAhciPort->pDrvMediaEx, pAhciReq->hIoReq,
+        rc = pAhciPortR3->pDrvMediaEx->pfnIoReqWrite(pAhciPortR3->pDrvMediaEx, pAhciReq->hIoReq,
                                                    pAhciReq->uOffset, pAhciReq->cbTransfer);
     }
@@ -4321 +4392 @@
 
         if (pAhciReq->cPrdtlEntries)
-            rc = ahciR3PrdtQuerySize(pAhciPort->CTX_SUFF(pAhci), pAhciReq, &cbBuf);
+            rc = ahciR3PrdtQuerySize(pDevIns, pAhciReq, &cbBuf);
         pAhciReq->cbTransfer = cbBuf;
         if (RT_SUCCESS(rc))
@@ -4329 +4400 @@
             else if (cbBuf)
                 pAhciPort->Led.Asserted.s.fWriting = pAhciPort->Led.Actual.s.fWriting = 1;
-            rc = pAhciPort->pDrvMediaEx->pfnIoReqSendScsiCmd(pAhciPort->pDrvMediaEx, pAhciReq->hIoReq,
+            rc = pAhciPortR3->pDrvMediaEx->pfnIoReqSendScsiCmd(pAhciPortR3->pDrvMediaEx, pAhciReq->hIoReq,
                                                              0, &pAhciReq->aATAPICmd[0], ATAPI_PACKET_SIZE,
                                                              PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN, NULL, cbBuf,
@@ -4338 +4409 @@
 
     if (rc == VINF_SUCCESS)
-        fReqCanceled = ahciTransferComplete(pAhciPort, pAhciReq, VINF_SUCCESS);
+        fReqCanceled = ahciR3TransferComplete(pDevIns, pThis, pThisCC, pAhciPort, pAhciPortR3, pAhciReq, VINF_SUCCESS);
     else if (rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
-        fReqCanceled = ahciTransferComplete(pAhciPort, pAhciReq, rc);
+        fReqCanceled = ahciR3TransferComplete(pDevIns, pThis, pThisCC, pAhciPort, pAhciPortR3, pAhciReq, rc);
 
     return fReqCanceled;
@@ -4351 +4422 @@
  * @returns Whether the command was successfully fetched from guest memory and
  *          can be continued.
- * @param   pAhciPort    The AHCI port the request is for.
- * @param   pAhciReq     Request structure to copy the command to.
- */
-static bool ahciR3CmdPrepare(PAHCIPort pAhciPort, PAHCIREQ pAhciReq)
+ * @param   pDevIns     The device instance.
+ * @param   pThis       The shared AHCI state.
+ * @param   pAhciPort   The AHCI port the request is for.
+ * @param   pAhciReq    Request structure to copy the command to.
+ */
+static bool ahciR3CmdPrepare(PPDMDEVINS pDevIns, PAHCI pThis, PAHCIPORT pAhciPort, PAHCIREQ pAhciReq)
 {
     /* Set current command slot */
     ASMAtomicWriteU32(&pAhciPort->u32CurrentCommandSlot, pAhciReq->uTag);
 
-    bool fContinue = ahciPortTaskGetCommandFis(pAhciPort, pAhciReq);
+    bool fContinue = ahciPortTaskGetCommandFis(pDevIns, pThis, pAhciPort, pAhciReq);
     if (fContinue)
     {
@@ -4380 +4453 @@
             AssertLogRelMsg(ASMAtomicReadU32(&pAhciPort->cTasksActive) <= AHCI_NR_COMMAND_SLOTS,
                             ("AHCI#%uP%u: There are more than %u (+1) requests active",
-                             pAhciPort->CTX_SUFF(pDevIns)->iInstance, pAhciPort->iLUN,
+                             pDevIns->iInstance, pAhciPort->iLUN,
                              AHCI_NR_COMMAND_SLOTS));
             ASMAtomicIncU32(&pAhciPort->cTasksActive);
@@ -4391 +4464 @@
                 ahciLog(("%s: Setting device into reset state\n", __FUNCTION__));
                 pAhciPort->fResetDevice = true;
-                ahciSendD2HFis(pAhciPort, pAhciReq->uTag, pAhciReq->cmdFis, true);
+                ahciSendD2HFis(pDevIns, pThis, pAhciPort, pAhciReq->uTag, pAhciReq->cmdFis, true);
             }
             else if (pAhciPort->fResetDevice) /* The bit is not set and we are in a reset state. */
-                ahciFinishStorageDeviceReset(pAhciPort, pAhciReq);
+                ahciFinishStorageDeviceReset(pDevIns, pThis, pAhciPort, pAhciReq);
             else /* We are not in a reset state update the control registers. */
                 AssertMsgFailed(("%s: Update the control register\n", __FUNCTION__));
@@ -4422 +4495 @@
 static DECLCALLBACK(int) ahciAsyncIOLoop(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
 {
-    RT_NOREF(pDevIns);
-    PAHCIPort pAhciPort = (PAHCIPort)pThread->pvUser;
-    PAHCI     pThis     = pAhciPort->CTX_SUFF(pAhci);
-    int       rc        = VINF_SUCCESS;
+    PAHCIPORTR3 pAhciPortR3 = (PAHCIPORTR3)pThread->pvUser;
+    PAHCI       pThis       = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIR3     pThisCC     = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+    PAHCIPORT   pAhciPort   = &RT_SAFE_SUBSCRIPT(pThis->ahciPort, pAhciPortR3->iLUN);
+    int         rc          = VINF_SUCCESS;
 
     ahciLog(("%s: Port %d entering async IO loop.\n", __FUNCTION__, pAhciPort->iLUN));
@@ -4455 +4529 @@
 
         /* Check whether the thread should be suspended. */
-        if (pThis->fSignalIdle)
+        if (pThisCC->fSignalIdle)
         {
             if (!ASMAtomicDecU32(&pThis->cThreadsActive))
-                PDMDevHlpAsyncNotificationCompleted(pAhciPort->pDevInsR3);
+                PDMDevHlpAsyncNotificationCompleted(pDevIns);
             continue;
         }
@@ -4470 +4544 @@
             && !ASMAtomicDecU32(&pThis->cThreadsActive))
         {
-            ahciHBAReset(pThis);
-            if (pThis->fSignalIdle)
-                PDMDevHlpAsyncNotificationCompleted(pAhciPort->pDevInsR3);
+            ahciR3HBAReset(pDevIns, pThis, pThisCC);
+            if (pThisCC->fSignalIdle)
+                PDMDevHlpAsyncNotificationCompleted(pDevIns);
             continue;
         }
@@ -4486 +4560 @@
             ahciLog(("%s: Processing command at slot %d\n", __FUNCTION__, idx));
 
-            PAHCIREQ pAhciReq = ahciR3ReqAlloc(pAhciPort, idx);
+            PAHCIREQ pAhciReq = ahciR3ReqAlloc(pAhciPortR3, idx);
             if (RT_LIKELY(pAhciReq))
             {
@@ -4492 +4566 @@
                 pAhciReq->fFlags        = 0;
 
-                bool fContinue = ahciR3CmdPrepare(pAhciPort, pAhciReq);
+                bool fContinue = ahciR3CmdPrepare(pDevIns, pThis, pAhciPort, pAhciReq);
                 if (fContinue)
                 {
-                    PDMMEDIAEXIOREQTYPE enmType = ahciProcessCmd(pAhciPort, pAhciReq, pAhciReq->cmdFis);
+                    PDMMEDIAEXIOREQTYPE enmType = ahciProcessCmd(pDevIns, pThis, pAhciPort, pAhciPortR3,
+                                                                 pAhciReq, pAhciReq->cmdFis);
                     pAhciReq->enmType = enmType;
 
                     if (enmType != PDMMEDIAEXIOREQTYPE_INVALID)
-                        fReqCanceled = ahciR3ReqSubmit(pAhciPort, pAhciReq, enmType);
+                        fReqCanceled = ahciR3ReqSubmit(pDevIns, pThis, pThisCC, pAhciPort, pAhciPortR3, pAhciReq, enmType);
                     else
-                        fReqCanceled = ahciTransferComplete(pAhciPort, pAhciReq, VINF_SUCCESS);
+                        fReqCanceled = ahciR3TransferComplete(pDevIns, pThis, pThisCC, pAhciPort, pAhciPortR3,
+                                                              pAhciReq, VINF_SUCCESS);
                 } /* Command */
                 else
-                    ahciR3ReqFree(pAhciPort, pAhciReq);
+                    ahciR3ReqFree(pAhciPortR3, pAhciReq);
             }
             else /* !Request allocated, use on stack variant to signal the error. */
@@ -4516 +4592 @@
                 Req.enmType    = PDMMEDIAEXIOREQTYPE_INVALID;
 
-                bool fContinue = ahciR3CmdPrepare(pAhciPort, &Req);
+                bool fContinue = ahciR3CmdPrepare(pDevIns, pThis, pAhciPort, &Req);
                 if (fContinue)
-                    fReqCanceled = ahciTransferComplete(pAhciPort, &Req, VERR_NO_MEMORY);
+                    fReqCanceled = ahciR3TransferComplete(pDevIns, pThis, pThisCC, pAhciPort, pAhciPortR3, &Req, VERR_NO_MEMORY);
             }
 
@@ -4535 +4611 @@
         if (   ASMAtomicReadBool(&pAhciPort->fPortReset)
             && (pAhciPort->regSCTL & AHCI_PORT_SCTL_DET) == AHCI_PORT_SCTL_DET_NINIT)
-            ahciPortResetFinish(pAhciPort);
+            ahciPortResetFinish(pDevIns, pThis, pAhciPort, pAhciPortR3);
 
         /*
@@ -4545 +4621 @@
         if (   (u32RegHbaCtrl & AHCI_HBA_CTRL_HR)
             && !cThreadsActive)
-            ahciHBAReset(pThis);
-
-        if (!cThreadsActive && pThis->fSignalIdle)
-            PDMDevHlpAsyncNotificationCompleted(pAhciPort->pDevInsR3);
+            ahciR3HBAReset(pDevIns, pThis, pThisCC);
+
+        if (!cThreadsActive && pThisCC->fSignalIdle)
+            PDMDevHlpAsyncNotificationCompleted(pDevIns);
     } /* While running */
 
@@ -4560 +4636 @@
 static DECLCALLBACK(int) ahciAsyncIOLoopWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
 {
-    PAHCIPort pAhciPort = (PAHCIPort)pThread->pvUser;
+    PAHCIPORTR3 pAhciPortR3 = (PAHCIPORTR3)pThread->pvUser;
+    PAHCI       pThis       = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIPORT   pAhciPort   = &RT_SAFE_SUBSCRIPT(pThis->ahciPort, pAhciPortR3->iLUN);
     return PDMDevHlpSUPSemEventSignal(pDevIns, pAhciPort->hEvtProcess);
 }
@@ -4605 +4683 @@
      * Per port data.
      */
-    for (unsigned i = 0; i < pThis->cPortsImpl; i++)
-    {
-        PAHCIPort pThisPort = &pThis->ahciPort[i];
-
-        pHlp->pfnPrintf(pHlp, "Port %d: device-attached=%RTbool\n",
-                        pThisPort->iLUN, pThisPort->pDrvBase != NULL);
+    uint32_t const cPortsImpl = RT_MIN(pThis->cPortsImpl, RT_ELEMENTS(pThis->ahciPort));
+    for (unsigned i = 0; i < cPortsImpl; i++)
+    {
+        PAHCIPORT pThisPort = &pThis->ahciPort[i];
+
+        pHlp->pfnPrintf(pHlp, "Port %d: device-attached=%RTbool\n", pThisPort->iLUN, pThisPort->fPresent);
         pHlp->pfnPrintf(pHlp, "PortClb=%#x\n", pThisPort->regCLB);
         pHlp->pfnPrintf(pHlp, "PortClbU=%#x\n", pThisPort->regCLBU);
@@ -4659 +4737 @@
     for (uint32_t i = 0; i < RT_ELEMENTS(pThis->ahciPort); i++)
     {
-        PAHCIPort pThisPort = &pThis->ahciPort[i];
-        if (pThisPort->pDrvBase)
+        PAHCIPORT pThisPort = &pThis->ahciPort[i];
+        if (pThisPort->fPresent)
         {
             if (   (pThisPort->cTasksActive != 0)
@@ -4705 +4783 @@
     for (uint32_t i = 0; i < AHCI_MAX_NR_PORTS_IMPL; i++)
     {
-        pHlp->pfnSSMPutBool(pSSM, pThis->ahciPort[i].pDrvBase != NULL);
+        pHlp->pfnSSMPutBool(pSSM, pThis->ahciPort[i].fPresent);
         pHlp->pfnSSMPutBool(pSSM, pThis->ahciPort[i].fHotpluggable);
         pHlp->pfnSSMPutStrZ(pSSM, pThis->ahciPort[i].szSerialNumber);
@@ -4909 +4987 @@
             rc = pHlp->pfnSSMGetBool(pSSM, &fInUse);
             AssertRCReturn(rc, rc);
-            if (fInUse != (pThis->ahciPort[i].pDrvBase != NULL))
+            if (fInUse != pThis->ahciPort[i].fPresent)
                 return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS,
                                                N_("The %s VM is missing a device on port %u. Please make sure the source and target VMs have compatible storage configurations"),
@@ -4995 +5073 @@
         for (uint32_t i = 0; i < AHCI_MAX_NR_PORTS_IMPL; i++)
         {
-            PAHCIPort pAhciPort = &pThis->ahciPort[i];
+            PAHCIPORT pAhciPort = &pThis->ahciPort[i];
 
             pHlp->pfnSSMGetU32(pSSM, &pThis->ahciPort[i].regCLB);
@@ -5087 +5165 @@
 /* -=-=-=-=- device PDM interface -=-=-=-=- */
 
-static DECLCALLBACK(void) ahciR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
-{
-    uint32_t i;
-    PAHCI pThis = PDMDEVINS_2_DATA(pDevIns, PAHCI);
-
-    pThis->pDevInsRC += offDelta;
-
-    /* Relocate every port. */
-    for (i = 0; i < RT_ELEMENTS(pThis->ahciPort); i++)
-    {
-        PAHCIPort pAhciPort = &pThis->ahciPort[i];
-        pAhciPort->pAhciRC += offDelta;
-        pAhciPort->pDevInsRC += offDelta;
-    }
-}
-
 /**
  * Configure the attached device for a port.
@@ -5110 +5172 @@
  * @returns VBox status code
  * @param   pDevIns     The device instance data.
- * @param   pAhciPort   The port for which the device is to be configured.
- */
-static int ahciR3ConfigureLUN(PPDMDEVINS pDevIns, PAHCIPort pAhciPort)
+ * @param   pAhciPort   The port for which the device is to be configured, shared bits.
+ * @param   pAhciPortR3 The port for which the device is to be configured, ring-3 bits.
+ */
+static int ahciR3ConfigureLUN(PPDMDEVINS pDevIns, PAHCIPORT pAhciPort, PAHCIPORTR3 pAhciPortR3)
 {
     /* Query the media interface. */
-    pAhciPort->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pAhciPort->pDrvBase, PDMIMEDIA);
-    AssertMsgReturn(VALID_PTR(pAhciPort->pDrvMedia),
+    pAhciPortR3->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pAhciPortR3->pDrvBase, PDMIMEDIA);
+    AssertMsgReturn(VALID_PTR(pAhciPortR3->pDrvMedia),
                     ("AHCI configuration error: LUN#%d misses the basic media interface!\n", pAhciPort->iLUN),
                     VERR_PDM_MISSING_INTERFACE);
 
     /* Get the extended media interface. */
-    pAhciPort->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pAhciPort->pDrvBase, PDMIMEDIAEX);
-    AssertMsgReturn(VALID_PTR(pAhciPort->pDrvMediaEx),
+    pAhciPortR3->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pAhciPortR3->pDrvBase, PDMIMEDIAEX);
+    AssertMsgReturn(VALID_PTR(pAhciPortR3->pDrvMediaEx),
                     ("AHCI configuration error: LUN#%d misses the extended media interface!\n", pAhciPort->iLUN),
                     VERR_PDM_MISSING_INTERFACE);
@@ -5129 +5192 @@
      * Validate type.
      */
-    PDMMEDIATYPE enmType = pAhciPort->pDrvMedia->pfnGetType(pAhciPort->pDrvMedia);
+    PDMMEDIATYPE enmType = pAhciPortR3->pDrvMedia->pfnGetType(pAhciPortR3->pDrvMedia);
     AssertMsgReturn(enmType == PDMMEDIATYPE_HARD_DISK || enmType == PDMMEDIATYPE_CDROM || enmType == PDMMEDIATYPE_DVD,
                     ("AHCI configuration error: LUN#%d isn't a disk or cd/dvd. enmType=%u\n", pAhciPort->iLUN, enmType),
                     VERR_PDM_UNSUPPORTED_BLOCK_TYPE);
 
-    int rc = pAhciPort->pDrvMediaEx->pfnIoReqAllocSizeSet(pAhciPort->pDrvMediaEx, sizeof(AHCIREQ));
+    int rc = pAhciPortR3->pDrvMediaEx->pfnIoReqAllocSizeSet(pAhciPortR3->pDrvMediaEx, sizeof(AHCIREQ));
     if (RT_FAILURE(rc))
         return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
@@ -5141 +5204 @@
 
     uint32_t fFeatures = 0;
-    rc = pAhciPort->pDrvMediaEx->pfnQueryFeatures(pAhciPort->pDrvMediaEx, &fFeatures);
+    rc = pAhciPortR3->pDrvMediaEx->pfnQueryFeatures(pAhciPortR3->pDrvMediaEx, &fFeatures);
     if (RT_FAILURE(rc))
         return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
@@ -5150 +5213 @@
         pAhciPort->fTrimEnabled = true;
 
+    pAhciPort->fPresent = true;
+
     pAhciPort->fATAPI =    (enmType == PDMMEDIATYPE_CDROM || enmType == PDMMEDIATYPE_DVD)
                         && RT_BOOL(fFeatures & PDMIMEDIAEX_FEATURE_F_RAWSCSICMD);
@@ -5161 +5226 @@
     else
     {
-        pAhciPort->cbSector = pAhciPort->pDrvMedia->pfnGetSectorSize(pAhciPort->pDrvMedia);
-        pAhciPort->cTotalSectors = pAhciPort->pDrvMedia->pfnGetSize(pAhciPort->pDrvMedia) / pAhciPort->cbSector;
-        rc = pAhciPort->pDrvMedia->pfnBiosGetPCHSGeometry(pAhciPort->pDrvMedia, &pAhciPort->PCHSGeometry);
+        pAhciPort->cbSector = pAhciPortR3->pDrvMedia->pfnGetSectorSize(pAhciPortR3->pDrvMedia);
+        pAhciPort->cTotalSectors = pAhciPortR3->pDrvMedia->pfnGetSize(pAhciPortR3->pDrvMedia) / pAhciPort->cbSector;
+        rc = pAhciPortR3->pDrvMedia->pfnBiosGetPCHSGeometry(pAhciPortR3->pDrvMedia, &pAhciPort->PCHSGeometry);
         if (rc == VERR_PDM_MEDIA_NOT_MOUNTED)
         {
@@ -5186 +5251 @@
             pAhciPort->PCHSGeometry.cSectors = 63;
             /* Set the disk geometry information. Ignore errors. */
-            pAhciPort->pDrvMedia->pfnBiosSetPCHSGeometry(pAhciPort->pDrvMedia, &pAhciPort->PCHSGeometry);
+            pAhciPortR3->pDrvMedia->pfnBiosSetPCHSGeometry(pAhciPortR3->pDrvMedia, &pAhciPort->PCHSGeometry);
             rc = VINF_SUCCESS;
         }
@@ -5210 +5275 @@
         return false;
 
-    PAHCI pThis = PDMDEVINS_2_DATA(pDevIns, PAHCI);
-    ASMAtomicWriteBool(&pThis->fSignalIdle, false);
+    PAHCIR3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+    ASMAtomicWriteBool(&pThisCC->fSignalIdle, false);
     return true;
 }
@@ -5220 +5285 @@
 static void ahciR3SuspendOrPowerOff(PPDMDEVINS pDevIns)
 {
-    PAHCI pThis = PDMDEVINS_2_DATA(pDevIns, PAHCI);
-
-    ASMAtomicWriteBool(&pThis->fSignalIdle, true);
+    PAHCIR3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+
+    ASMAtomicWriteBool(&pThisCC->fSignalIdle, true);
     if (!ahciR3AllAsyncIOIsFinished(pDevIns))
         PDMDevHlpSetAsyncNotification(pDevIns, ahciR3IsAsyncSuspendOrPowerOffDone);
     else
-        ASMAtomicWriteBool(&pThis->fSignalIdle, false);
-
-    for (uint32_t i = 0; i < RT_ELEMENTS(pThis->ahciPort); i++)
-    {
-        PAHCIPort pThisPort = &pThis->ahciPort[i];
+        ASMAtomicWriteBool(&pThisCC->fSignalIdle, false);
+
+    for (uint32_t i = 0; i < RT_ELEMENTS(pThisCC->aPorts); i++)
+    {
+        PAHCIPORTR3 pThisPort = &pThisCC->aPorts[i];
         if (pThisPort->pDrvMediaEx)
             pThisPort->pDrvMediaEx->pfnNotifySuspend(pThisPort->pDrvMediaEx);
@@ -5262 +5327 @@
     for (unsigned i = 0; i < RT_ELEMENTS(pThis->ahciPort); i++)
     {
-        PAHCIPort pAhciPort = &pThis->ahciPort[i];
+        PAHCIPORT pAhciPort = &pThis->ahciPort[i];
 
         if (pAhciPort->u32TasksRedo)
@@ -5285 +5350 @@
  *
  * @returns VBox status code.
- * @param   pDevIns      The device instance.
- * @param   pAhciPort    The attached device.
- * @param   pszName      Name of the port to get the CFGM node.
- */
-static int ahciR3VpdInit(PPDMDEVINS pDevIns, PAHCIPort pAhciPort, const char *pszName)
+ * @param   pDevIns         The device instance.
+ * @param   pAhciPort       The attached device, shared bits.
+ * @param   pAhciPortR3     The attached device, ring-3 bits.
+ * @param   pszName         Name of the port to get the CFGM node.
+ */
+static int ahciR3VpdInit(PPDMDEVINS pDevIns, PAHCIPORT pAhciPort, PAHCIPORTR3 pAhciPortR3, const char *pszName)
 {
     PCPDMDEVHLPR3   pHlp = pDevIns->pHlpR3;
@@ -5298 +5364 @@
 
     int rc = VINF_SUCCESS;
-    if (pAhciPort->pDrvMedia)
-        rc = pAhciPort->pDrvMedia->pfnGetUuid(pAhciPort->pDrvMedia, &Uuid);
+    if (pAhciPortR3->pDrvMedia)
+        rc = pAhciPortR3->pDrvMedia->pfnGetUuid(pAhciPortR3->pDrvMedia, &Uuid);
     else
         RTUuidClear(&Uuid);
@@ -5401 +5467 @@
 static DECLCALLBACK(void) ahciR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
 {
-    PAHCI           pThis = PDMDEVINS_2_DATA(pDevIns, PAHCI);
-    PAHCIPort       pAhciPort = &pThis->ahciPort[iLUN];
-    int             rc = VINF_SUCCESS;
+    PAHCI       pThis   = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIR3     pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+    int         rc = VINF_SUCCESS;
 
     Log(("%s:\n", __FUNCTION__));
 
-    AssertMsg(iLUN < pThis->cPortsImpl, ("iLUN=%u", iLUN));
+    AssertMsgReturnVoid(iLUN < RT_MIN(pThis->cPortsImpl, RT_ELEMENTS(pThisCC->aPorts)), ("iLUN=%u", iLUN));
+    PAHCIPORT   pAhciPort   = &pThis->ahciPort[iLUN];
+    PAHCIPORTR3 pAhciPortR3 = &pThisCC->aPorts[iLUN];
     AssertMsgReturnVoid(   pAhciPort->fHotpluggable
                         || (fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG),
@@ -5413 +5481 @@
 
 
-    if (pAhciPort->pAsyncIOThread)
+    if (pAhciPortR3->pAsyncIOThread)
     {
         int rcThread;
         /* Destroy the thread. */
-        rc = PDMDevHlpThreadDestroy(pDevIns, pAhciPort->pAsyncIOThread, &rcThread);
+        rc = PDMDevHlpThreadDestroy(pDevIns, pAhciPortR3->pAsyncIOThread, &rcThread);
         if (RT_FAILURE(rc) || RT_FAILURE(rcThread))
             AssertMsgFailed(("%s Failed to destroy async IO thread rc=%Rrc rcThread=%Rrc\n", __FUNCTION__, rc, rcThread));
 
-        pAhciPort->pAsyncIOThread = NULL;
+        pAhciPortR3->pAsyncIOThread = NULL;
         pAhciPort->fWrkThreadSleeping = true;
     }
@@ -5440 +5508 @@
         ASMAtomicOrU32(&pAhciPort->regSERR, AHCI_PORT_SERR_X | AHCI_PORT_SERR_N);
         if (pAhciPort->regIE & (AHCI_PORT_IE_CPDE | AHCI_PORT_IE_PCE | AHCI_PORT_IE_PRCE))
-            ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VERR_IGNORED);
+            ahciHbaSetInterrupt(pDevIns, pThis, pAhciPort->iLUN, VERR_IGNORED);
     }
 
@@ -5446 +5514 @@
      * Zero some important members.
      */
-    pAhciPort->pDrvBase = NULL;
-    pAhciPort->pDrvMedia = NULL;
-    pAhciPort->pDrvMediaEx = NULL;
+    pAhciPortR3->pDrvBase    = NULL;
+    pAhciPortR3->pDrvMedia   = NULL;
+    pAhciPortR3->pDrvMediaEx = NULL;
+    pAhciPort->fPresent      = false;
 }
 
@@ -5464 +5533 @@
 static DECLCALLBACK(int)  ahciR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
 {
-    PAHCI       pThis = PDMDEVINS_2_DATA(pDevIns, PAHCI);
-    PAHCIPort   pAhciPort = &pThis->ahciPort[iLUN];
+    PAHCI       pThis     = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIR3     pThisCC   = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
     int         rc;
 
@@ -5471 +5540 @@
 
     /* the usual paranoia */
-    AssertMsg(iLUN < pThis->cPortsImpl, ("iLUN=%u", iLUN));
-    AssertRelease(!pAhciPort->pDrvBase);
-    AssertRelease(!pAhciPort->pDrvMedia);
-    AssertRelease(!pAhciPort->pDrvMediaEx);
+    AssertMsgReturn(iLUN < RT_MIN(pThis->cPortsImpl, RT_ELEMENTS(pThisCC->aPorts)), ("iLUN=%u", iLUN), VERR_PDM_LUN_NOT_FOUND);
+    PAHCIPORT   pAhciPort   = &pThis->ahciPort[iLUN];
+    PAHCIPORTR3 pAhciPortR3 = &pThisCC->aPorts[iLUN];
+    AssertRelease(!pAhciPortR3->pDrvBase);
+    AssertRelease(!pAhciPortR3->pDrvMedia);
+    AssertRelease(!pAhciPortR3->pDrvMediaEx);
     Assert(pAhciPort->iLUN == iLUN);
+    Assert(pAhciPortR3->iLUN == iLUN);
 
     AssertMsgReturn(   pAhciPort->fHotpluggable
@@ -5486 +5558 @@
      * required as well as optional.
      */
-    rc = PDMDevHlpDriverAttach(pDevIns, pAhciPort->iLUN, &pAhciPort->IBase, &pAhciPort->pDrvBase, pAhciPort->pszDesc);
+    rc = PDMDevHlpDriverAttach(pDevIns, pAhciPort->iLUN, &pAhciPortR3->IBase, &pAhciPortR3->pDrvBase, pAhciPortR3->szDesc);
     if (RT_SUCCESS(rc))
-        rc = ahciR3ConfigureLUN(pDevIns, pAhciPort);
+        rc = ahciR3ConfigureLUN(pDevIns, pAhciPort, pAhciPortR3);
     else
         AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pAhciPort->iLUN, rc));
@@ -5494 +5566 @@
     if (RT_FAILURE(rc))
     {
-        pAhciPort->pDrvBase = NULL;
-        pAhciPort->pDrvMedia = NULL;
+        pAhciPortR3->pDrvBase    = NULL;
+        pAhciPortR3->pDrvMedia   = NULL;
+        pAhciPortR3->pDrvMediaEx = NULL;
+        pAhciPort->fPresent      = false;
     }
     else
@@ -5505 +5579 @@
 
         /* Create the async IO thread. */
-        rc = PDMDevHlpThreadCreate(pDevIns, &pAhciPort->pAsyncIOThread, pAhciPort, ahciAsyncIOLoop, ahciAsyncIOLoopWakeUp, 0,
-                                   RTTHREADTYPE_IO, pAhciPort->pszDesc);
+        rc = PDMDevHlpThreadCreate(pDevIns, &pAhciPortR3->pAsyncIOThread, pAhciPortR3, ahciAsyncIOLoop,
+                                   ahciAsyncIOLoopWakeUp, 0, RTTHREADTYPE_IO, pAhciPortR3->szDesc);
         if (RT_FAILURE(rc))
             return rc;
@@ -5514 +5588 @@
          */
         if (RT_SUCCESS(rc))
-            rc = ahciR3VpdInit(pDevIns, pAhciPort, pAhciPort->pszDesc);
+            rc = ahciR3VpdInit(pDevIns, pAhciPort, pAhciPortR3, pAhciPortR3->szDesc);
 
         /* Inform the guest about the added device in case of hotplugging. */
@@ -5542 +5616 @@
                 || (pAhciPort->regIE & AHCI_PORT_IE_PCE)
                 || (pAhciPort->regIE & AHCI_PORT_IE_PRCE))
-                ahciHbaSetInterrupt(pAhciPort->CTX_SUFF(pAhci), pAhciPort->iLUN, VERR_IGNORED);
+                ahciHbaSetInterrupt(pDevIns, pThis, pAhciPort->iLUN, VERR_IGNORED);
         }
 
@@ -5557 +5631 @@
 static int ahciR3ResetCommon(PPDMDEVINS pDevIns)
 {
-    PAHCI pThis = PDMDEVINS_2_DATA(pDevIns, PAHCI);
-
-    ahciHBAReset(pThis);
+    PAHCI   pThis   = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIR3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+    ahciR3HBAReset(pDevIns, pThis, pThisCC);
 
     /* Hardware reset for the ports. */
@@ -5575 +5649 @@
 static DECLCALLBACK(bool) ahciR3IsAsyncResetDone(PPDMDEVINS pDevIns)
 {
-    PAHCI pThis = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIR3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
 
     if (!ahciR3AllAsyncIOIsFinished(pDevIns))
         return false;
-    ASMAtomicWriteBool(&pThis->fSignalIdle, false);
+    ASMAtomicWriteBool(&pThisCC->fSignalIdle, false);
 
     ahciR3ResetCommon(pDevIns);
@@ -5592 +5666 @@
 static DECLCALLBACK(void) ahciR3Reset(PPDMDEVINS pDevIns)
 {
-    PAHCI pThis = PDMDEVINS_2_DATA(pDevIns, PAHCI);
-
-    ASMAtomicWriteBool(&pThis->fSignalIdle, true);
+    PAHCIR3 pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+
+    ASMAtomicWriteBool(&pThisCC->fSignalIdle, true);
     if (!ahciR3AllAsyncIOIsFinished(pDevIns))
         PDMDevHlpSetAsyncNotification(pDevIns, ahciR3IsAsyncResetDone);
     else
     {
-        ASMAtomicWriteBool(&pThis->fSignalIdle, false);
+        ASMAtomicWriteBool(&pThisCC->fSignalIdle, false);
         ahciR3ResetCommon(pDevIns);
     }
@@ -5626 +5700 @@
 {
     PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
-    PAHCI       pThis = PDMDEVINS_2_DATA(pDevIns, PAHCI);
-    int         rc    = VINF_SUCCESS;
+    PAHCI   pThis   = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    int     rc      = VINF_SUCCESS;
 
     /*
@@ -5640 +5714 @@
 
         Log(("%s: Destruct every port\n", __FUNCTION__));
-        for (unsigned iActPort = 0; iActPort < pThis->cPortsImpl; iActPort++)
-        {
-            PAHCIPort pAhciPort = &pThis->ahciPort[iActPort];
+        uint32_t const cPortsImpl = RT_MIN(pThis->cPortsImpl, RT_ELEMENTS(pThis->ahciPort));
+        for (unsigned iActPort = 0; iActPort < cPortsImpl; iActPort++)
+        {
+            PAHCIPORT pAhciPort = &pThis->ahciPort[iActPort];
 
             if (pAhciPort->hEvtProcess != NIL_SUPSEMEVENT)
@@ -5649 +5724 @@
                 pAhciPort->hEvtProcess = NIL_SUPSEMEVENT;
             }
-
-            if (pAhciPort->pszDesc)
-                RTStrFree(pAhciPort->pszDesc);
         }
 
@@ -5666 +5738 @@
 {
     PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
-    PAHCI           pThis = PDMDEVINS_2_DATA(pDevIns, PAHCI);
-    PCPDMDEVHLPR3   pHlp  = pDevIns->pHlpR3;
+    PAHCI           pThis   = PDMDEVINS_2_DATA(pDevIns, PAHCI);
+    PAHCIR3         pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PAHCICC);
+    PCPDMDEVHLPR3   pHlp    = pDevIns->pHlpR3;
     PPDMIBASE       pBase;
-    int             rc = VINF_SUCCESS;
-    unsigned        i = 0;
-    uint32_t        cbTotalBufferSize = 0;
+    int             rc;
+    unsigned        i;
+    uint32_t        cbTotalBufferSize = 0; /** @todo r=bird: cbTotalBufferSize isn't ever set. */
 
     LogFlowFunc(("pThis=%#p\n", pThis));
+    /*
+     * Initialize the instance data (everything touched by the destructor need
+     * to be initialized here!).
+     */
+    PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0];
+    PDMPCIDEV_ASSERT_VALID(pDevIns, pPciDev);
+
+    PDMPciDevSetVendorId(pPciDev,          0x8086); /* Intel */
+    PDMPciDevSetDeviceId(pPciDev,          0x2829); /* ICH-8M */
+    PDMPciDevSetCommand(pPciDev,           0x0000);
+#ifdef VBOX_WITH_MSI_DEVICES
+    PDMPciDevSetStatus(pPciDev,            VBOX_PCI_STATUS_CAP_LIST);
+    PDMPciDevSetCapabilityList(pPciDev,    0x80);
+#else
+    PDMPciDevSetCapabilityList(pPciDev,    0x70);
+#endif
+    PDMPciDevSetRevisionId(pPciDev,        0x02);
+    PDMPciDevSetClassProg(pPciDev,         0x01);
+    PDMPciDevSetClassSub(pPciDev,          0x06);
+    PDMPciDevSetClassBase(pPciDev,         0x01);
+    PDMPciDevSetBaseAddress(pPciDev, 5, false, false, false, 0x00000000);
+
+    PDMPciDevSetInterruptLine(pPciDev,     0x00);
+    PDMPciDevSetInterruptPin(pPciDev,      0x01);
+
+    PDMPciDevSetByte(pPciDev,  0x70,       VBOX_PCI_CAP_ID_PM); /* Capability ID: PCI Power Management Interface */
+    PDMPciDevSetByte(pPciDev,  0x71,       0xa8); /* next */
+    PDMPciDevSetByte(pPciDev,  0x72,       0x03); /* version ? */
+
+    PDMPciDevSetByte(pPciDev,  0x90,       0x40); /* AHCI mode. */
+    PDMPciDevSetByte(pPciDev,  0x92,       0x3f);
+    PDMPciDevSetByte(pPciDev,  0x94,       0x80);
+    PDMPciDevSetByte(pPciDev,  0x95,       0x01);
+    PDMPciDevSetByte(pPciDev,  0x97,       0x78);
+
+    PDMPciDevSetByte(pPciDev,  0xa8,       0x12);              /* SATACR capability */
+    PDMPciDevSetByte(pPciDev,  0xa9,       0x00);              /* next */
+    PDMPciDevSetWord(pPciDev,  0xaa,       0x0010);      /* Revision */
+    PDMPciDevSetDWord(pPciDev, 0xac,       0x00000028); /* SATA Capability Register 1 */
+
+    pThis->cThreadsActive = 0;
+
+    pThisCC->pDevIns                 = pDevIns;
+    pThisCC->IBase.pfnQueryInterface = ahciR3Status_QueryInterface;
+    pThisCC->ILeds.pfnQueryStatusLed = ahciR3Status_QueryStatusLed;
+
+    /* Initialize port members. */
+    for (i = 0; i < AHCI_MAX_NR_PORTS_IMPL; i++)
+    {
+        PAHCIPORT   pAhciPort           = &pThis->ahciPort[i];
+        PAHCIPORTR3 pAhciPortR3         = &pThisCC->aPorts[i];
+        pAhciPortR3->pDevIns            = pDevIns;
+        pAhciPort->iLUN                 = i;
+        pAhciPortR3->iLUN               = i;
+        pAhciPort->Led.u32Magic         = PDMLED_MAGIC;
+        pAhciPortR3->pDrvBase           = NULL;
+        pAhciPortR3->pAsyncIOThread     = NULL;
+        pAhciPort->hEvtProcess          = NIL_SUPSEMEVENT;
+        pAhciPort->fHotpluggable        = true;
+    }
+
+    /*
+     * Init locks, using explicit locking where necessary.
+     */
+    rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
+    AssertRCReturn(rc, rc);
+
+    rc = PDMDevHlpCritSectInit(pDevIns, &pThis->lock, RT_SRC_POS, "AHCI#%u", iInstance);
+    if (RT_FAILURE(rc))
+    {
+        Log(("%s: Failed to create critical section.\n", __FUNCTION__));
+        return rc;
+    }
 
     /*
@@ -5718 +5864 @@
         return PDMDEV_SET_ERROR(pDevIns, rc, N_("AHCI configuration error: failed to read TigerHack as boolean"));
 
-    /*
-     * Initialize the instance data (everything touched by the destructor need
-     * to be initialized here!).
-     */
-    pThis->pDevInsR3 = pDevIns;
-    pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
-    pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
-
-    PPDMPCIDEV pPciDev = pDevIns->apPciDevs[0];
-    PDMPCIDEV_ASSERT_VALID(pDevIns, pPciDev);
-
-    PDMPciDevSetVendorId(pPciDev,          0x8086); /* Intel */
-    PDMPciDevSetDeviceId(pPciDev,          0x2829); /* ICH-8M */
-    PDMPciDevSetCommand(pPciDev,           0x0000);
-#ifdef VBOX_WITH_MSI_DEVICES
-    PDMPciDevSetStatus(pPciDev,            VBOX_PCI_STATUS_CAP_LIST);
-    PDMPciDevSetCapabilityList(pPciDev,    0x80);
-#else
-    PDMPciDevSetCapabilityList(pPciDev,    0x70);
-#endif
-    PDMPciDevSetRevisionId(pPciDev,        0x02);
-    PDMPciDevSetClassProg(pPciDev,         0x01);
-    PDMPciDevSetClassSub(pPciDev,          0x06);
-    PDMPciDevSetClassBase(pPciDev,         0x01);
-    PDMPciDevSetBaseAddress(pPciDev, 5, false, false, false, 0x00000000);
-
-    PDMPciDevSetInterruptLine(pPciDev,     0x00);
-    PDMPciDevSetInterruptPin(pPciDev,      0x01);
-
-    PDMPciDevSetByte(pPciDev,  0x70,       VBOX_PCI_CAP_ID_PM); /* Capability ID: PCI Power Management Interface */
-    PDMPciDevSetByte(pPciDev,  0x71,       0xa8); /* next */
-    PDMPciDevSetByte(pPciDev,  0x72,       0x03); /* version ? */
-
-    PDMPciDevSetByte(pPciDev,  0x90,       0x40); /* AHCI mode. */
-    PDMPciDevSetByte(pPciDev,  0x92,       0x3f);
-    PDMPciDevSetByte(pPciDev,  0x94,       0x80);
-    PDMPciDevSetByte(pPciDev,  0x95,       0x01);
-    PDMPciDevSetByte(pPciDev,  0x97,       0x78);
-
-    PDMPciDevSetByte(pPciDev,  0xa8,       0x12);              /* SATACR capability */
-    PDMPciDevSetByte(pPciDev,  0xa9,       0x00);              /* next */
-    PDMPciDevSetWord(pPciDev,  0xaa,       0x0010);      /* Revision */
-    PDMPciDevSetDWord(pPciDev, 0xac,       0x00000028); /* SATA Capability Register 1 */
-
-    pThis->cThreadsActive = 0;
-
-    pThis->IBase.pfnQueryInterface = ahciR3Status_QueryInterface;
-    pThis->ILeds.pfnQueryStatusLed = ahciR3Status_QueryStatusLed;
-
-    /* Initialize port members. */
-    for (i = 0; i < AHCI_MAX_NR_PORTS_IMPL; i++)
-    {
-        PAHCIPort pAhciPort             = &pThis->ahciPort[i];
-        pAhciPort->pDevInsR3            = pDevIns;
-        pAhciPort->pDevInsR0            = PDMDEVINS_2_R0PTR(pDevIns);
-        pAhciPort->pDevInsRC            = PDMDEVINS_2_RCPTR(pDevIns);
-        pAhciPort->iLUN                 = i;
-        pAhciPort->pAhciR3              = pThis;
-        pAhciPort->pAhciR0              = PDMINS_2_DATA_R0PTR(pDevIns);
-        pAhciPort->pAhciRC              = PDMINS_2_DATA_RCPTR(pDevIns);
-        pAhciPort->Led.u32Magic         = PDMLED_MAGIC;
-        pAhciPort->pDrvBase             = NULL;
-        pAhciPort->pAsyncIOThread       = NULL;
-        pAhciPort->hEvtProcess          = NIL_SUPSEMEVENT;
-        pAhciPort->fHotpluggable        = true;
-    }
-
-    /*
-     * Init locks, using explicit locking where necessary.
-     */
-    rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
-    AssertRCReturn(rc, rc);
-
-    rc = PDMDevHlpCritSectInit(pDevIns, &pThis->lock, RT_SRC_POS, "AHCI#%u", iInstance);
-    if (RT_FAILURE(rc))
-    {
-        Log(("%s: Failed to create critical section.\n", __FUNCTION__));
-        return rc;
-    }
 
     /*
@@ -5885 +5952 @@
     for (i = 0; i < pThis->cPortsImpl; i++)
     {
-        PAHCIPort pAhciPort      = &pThis->ahciPort[i];
-
-        if (RTStrAPrintf(&pAhciPort->pszDesc, "Port%u", i) <= 0)
-            AssertLogRelFailedReturn(VERR_NO_MEMORY);
+        PAHCIPORT   pAhciPort   = &pThis->ahciPort[i];
+        PAHCIPORTR3 pAhciPortR3 = &pThisCC->aPorts[i];
+
+        RTStrPrintf(pAhciPortR3->szDesc, sizeof(pAhciPortR3->szDesc), "Port%u", i);
 
         /*
          * Init interfaces.
          */
-        pAhciPort->IBase.pfnQueryInterface                 = ahciR3PortQueryInterface;
-        pAhciPort->IMediaExPort.pfnIoReqCompleteNotify     = ahciR3IoReqCompleteNotify;
-        pAhciPort->IMediaExPort.pfnIoReqCopyFromBuf        = ahciR3IoReqCopyFromBuf;
-        pAhciPort->IMediaExPort.pfnIoReqCopyToBuf          = ahciR3IoReqCopyToBuf;
-        pAhciPort->IMediaExPort.pfnIoReqQueryBuf           = ahciR3IoReqQueryBuf;
-        pAhciPort->IMediaExPort.pfnIoReqQueryDiscardRanges = ahciR3IoReqQueryDiscardRanges;
-        pAhciPort->IMediaExPort.pfnIoReqStateChanged       = ahciR3IoReqStateChanged;
-        pAhciPort->IMediaExPort.pfnMediumEjected           = ahciR3MediumEjected;
-        pAhciPort->IPort.pfnQueryDeviceLocation            = ahciR3PortQueryDeviceLocation;
-        pAhciPort->IPort.pfnQueryScsiInqStrings            = ahciR3PortQueryScsiInqStrings;
-        pAhciPort->fWrkThreadSleeping                      = true;
+        pAhciPortR3->IBase.pfnQueryInterface                 = ahciR3PortQueryInterface;
+        pAhciPortR3->IMediaExPort.pfnIoReqCompleteNotify     = ahciR3IoReqCompleteNotify;
+        pAhciPortR3->IMediaExPort.pfnIoReqCopyFromBuf        = ahciR3IoReqCopyFromBuf;
+        pAhciPortR3->IMediaExPort.pfnIoReqCopyToBuf          = ahciR3IoReqCopyToBuf;
+        pAhciPortR3->IMediaExPort.pfnIoReqQueryBuf           = ahciR3IoReqQueryBuf;
+        pAhciPortR3->IMediaExPort.pfnIoReqQueryDiscardRanges = ahciR3IoReqQueryDiscardRanges;
+        pAhciPortR3->IMediaExPort.pfnIoReqStateChanged       = ahciR3IoReqStateChanged;
+        pAhciPortR3->IMediaExPort.pfnMediumEjected           = ahciR3MediumEjected;
+        pAhciPortR3->IPort.pfnQueryDeviceLocation            = ahciR3PortQueryDeviceLocation;
+        pAhciPortR3->IPort.pfnQueryScsiInqStrings            = ahciR3PortQueryScsiInqStrings;
+        pAhciPort->fWrkThreadSleeping                        = true;
 
         /* Query per port configuration options if available. */
-        PCFGMNODE pCfgPort = pHlp->pfnCFGMGetChild(pDevIns->pCfg, pAhciPort->pszDesc);
+        PCFGMNODE pCfgPort = pHlp->pfnCFGMGetChild(pDevIns->pCfg, pAhciPortR3->szDesc);
         if (pCfgPort)
         {
@@ -5917 +5984 @@
          * Attach the block driver
          */
-        rc = PDMDevHlpDriverAttach(pDevIns, pAhciPort->iLUN, &pAhciPort->IBase, &pAhciPort->pDrvBase, pAhciPort->pszDesc);
+        rc = PDMDevHlpDriverAttach(pDevIns, pAhciPort->iLUN, &pAhciPortR3->IBase, &pAhciPortR3->pDrvBase, pAhciPortR3->szDesc);
         if (RT_SUCCESS(rc))
         {
-            rc = ahciR3ConfigureLUN(pDevIns, pAhciPort);
+            rc = ahciR3ConfigureLUN(pDevIns, pAhciPort, pAhciPortR3);
             if (RT_FAILURE(rc))
             {
-                Log(("%s: Failed to configure the %s.\n", __FUNCTION__, pAhciPort->pszDesc));
+                Log(("%s: Failed to configure the %s.\n", __FUNCTION__, pAhciPortR3->szDesc));
                 return rc;
             }
@@ -5934 +6001 @@
              * Init vendor product data.
              */
-            rc = ahciR3VpdInit(pDevIns, pAhciPort, pAhciPort->pszDesc);
+            rc = ahciR3VpdInit(pDevIns, pAhciPort, pAhciPortR3, pAhciPortR3->szDesc);
             if (RT_FAILURE(rc))
                 return rc;
@@ -5943 +6010 @@
                                            N_("AHCI: Failed to create SUP event semaphore"));
 
-            rc = PDMDevHlpThreadCreate(pDevIns, &pAhciPort->pAsyncIOThread, pAhciPort, ahciAsyncIOLoop,
-                                       ahciAsyncIOLoopWakeUp, 0, RTTHREADTYPE_IO, pAhciPort->pszDesc);
+            rc = PDMDevHlpThreadCreate(pDevIns, &pAhciPortR3->pAsyncIOThread, pAhciPortR3, ahciAsyncIOLoop,
+                                       ahciAsyncIOLoopWakeUp, 0, RTTHREADTYPE_IO, pAhciPortR3->szDesc);
             if (RT_FAILURE(rc))
                 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
-                                           N_("AHCI: Failed to create worker thread %s"), pAhciPort->pszDesc);
+                                           N_("AHCI: Failed to create worker thread %s"), pAhciPortR3->szDesc);
         }
         else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
         {
-            pAhciPort->pDrvBase = NULL;
+            pAhciPortR3->pDrvBase = NULL;
+            pAhciPort->fPresent   = false;
             rc = VINF_SUCCESS;
-            LogRel(("AHCI: %s: No driver attached\n", pAhciPort->pszDesc));
+            LogRel(("AHCI: %s: No driver attached\n", pAhciPortR3->szDesc));
         }
         else
             return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
-                                       N_("AHCI: Failed to attach drive to %s"), pAhciPort->pszDesc);
+                                       N_("AHCI: Failed to attach drive to %s"), pAhciPortR3->szDesc);
     }
 
@@ -5963 +6031 @@
      * Attach status driver (optional).
      */
-    rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
+    rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThisCC->IBase, &pBase, "Status Port");
     if (RT_SUCCESS(rc))
     {
-        pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
-        pThis->pMediaNotify = PDMIBASE_QUERY_INTERFACE(pBase, PDMIMEDIANOTIFY);
+        pThisCC->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
+        pThisCC->pMediaNotify   = PDMIBASE_QUERY_INTERFACE(pBase, PDMIMEDIANOTIFY);
     }
     else
@@ -6034 +6102 @@
     /* .uReserved0 = */             0,
     /* .szName = */                 "ahci",
-    /* .fFlags = */                 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RZ |
-                                    PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION | PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION |
-                                    PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
+    /* .fFlags = */                 PDM_DEVREG_FLAGS_DEFAULT_BITS | PDM_DEVREG_FLAGS_RZ | PDM_DEVREG_FLAGS_NEW_STYLE
+                                    | PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION | PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION
+                                    | PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
     /* .fClass = */                 PDM_DEVREG_CLASS_STORAGE,
     /* .cMaxInstances = */          ~0U,
     /* .uSharedVersion = */         42,
     /* .cbInstanceShared = */       sizeof(AHCI),
-    /* .cbInstanceCC = */           0,
-    /* .cbInstanceRC = */           0,
+    /* .cbInstanceCC = */           sizeof(AHCICC),
+    /* .cbInstanceRC = */           sizeof(AHCIRC),
     /* .cMaxPciDevices = */         1,
     /* .cMaxMsixVectors = */        0,
@@ -6051 +6119 @@
     /* .pfnConstruct = */           ahciR3Construct,
     /* .pfnDestruct = */            ahciR3Destruct,
-    /* .pfnRelocate = */            ahciR3Relocate,
+    /* .pfnRelocate = */            NULL,
     /* .pfnMemSetup = */            NULL,
     /* .pfnPowerOn = */             NULL,