VirtualBox

Changeset 81888 in vbox for trunk/src/VBox/Devices/Serial


Ignore:
Timestamp:
Nov 15, 2019 10:37:45 PM (5 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
134683
Message:

DevSerial: Working on converting to the new PDM device style - CFGM, SSM, ++. bugref:9218

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Serial/DevSerial.cpp

    r81765 r81888  
    137137static DECLCALLBACK(int) serialR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
    138138{
     139    PDEVSERIAL      pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
     140    PCPDMDEVHLPR3   pHlp  = pDevIns->pHlpR3;
    139141    RT_NOREF(uPass);
    140     PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
    141     SSMR3PutU8(pSSM, pThis->uIrq);
    142     SSMR3PutIOPort(pSSM, pThis->PortBase);
    143     SSMR3PutU32(pSSM, pThis->UartCore.enmType);
     142
     143    pHlp->pfnSSMPutU8(pSSM, pThis->uIrq);
     144    pHlp->pfnSSMPutIOPort(pSSM, pThis->PortBase);
     145    pHlp->pfnSSMPutU32(pSSM, pThis->UartCore.enmType);
    144146
    145147    return VINF_SSM_DONT_CALL_AGAIN;
    … …  
    152154static DECLCALLBACK(int) serialR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
    153155{
    154     PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
    155 
    156     SSMR3PutU8(    pSSM, pThis->uIrq);
    157     SSMR3PutIOPort(pSSM, pThis->PortBase);
    158     SSMR3PutU32(   pSSM, pThis->UartCore.enmType);
     156    PDEVSERIAL      pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
     157    PCPDMDEVHLPR3   pHlp  = pDevIns->pHlpR3;
     158
     159    pHlp->pfnSSMPutU8(    pSSM, pThis->uIrq);
     160    pHlp->pfnSSMPutIOPort(pSSM, pThis->PortBase);
     161    pHlp->pfnSSMPutU32(   pSSM, pThis->UartCore.enmType);
    159162
    160163    uartR3SaveExec(&pThis->UartCore, pSSM);
    161     return SSMR3PutU32(pSSM, UINT32_MAX); /* sanity/terminator */
     164    return pHlp->pfnSSMPutU32(pSSM, UINT32_MAX); /* sanity/terminator */
    162165}
    163166
    … …  
    168171static DECLCALLBACK(int) serialR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
    169172{
    170     PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
    171     uint8_t    bIrq;
    172     RTIOPORT   PortBase;
    173     UARTTYPE   enmType;
     173    PDEVSERIAL      pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
     174    PCPDMDEVHLPR3   pHlp  = pDevIns->pHlpR3;
     175    uint8_t         bIrq;
     176    RTIOPORT        PortBase;
     177    UARTTYPE        enmType;
    174178    int rc;
    175179
    … …  
    177181    if (uVersion > UART_SAVED_STATE_VERSION_LEGACY_CODE)
    178182    {
    179         SSMR3GetU8(    pSSM, &bIrq);
    180         SSMR3GetIOPort(pSSM, &PortBase);
    181         PDMDEVHLP_SSM_GET_ENUM32_RET(pDevIns->pHlpR3, pSSM, enmType, UARTTYPE);
     183        pHlp->pfnSSMGetU8(    pSSM, &bIrq);
     184        pHlp->pfnSSMGetIOPort(pSSM, &PortBase);
     185        PDMDEVHLP_SSM_GET_ENUM32_RET(pHlp, pSSM, enmType, UARTTYPE);
    182186        if (uPass == SSM_PASS_FINAL)
    183187        {
    … …  
    192196        {
    193197            int32_t iIrqTmp;
    194             SSMR3GetS32(pSSM, &iIrqTmp);
     198            pHlp->pfnSSMGetS32(pSSM, &iIrqTmp);
    195199            uint32_t uPortBaseTmp;
    196             rc = SSMR3GetU32(pSSM, &uPortBaseTmp);
     200            rc = pHlp->pfnSSMGetU32(pSSM, &uPortBaseTmp);
    197201            AssertRCReturn(rc, rc);
    198202
    … …  
    211215        /* The marker. */
    212216        uint32_t u32;
    213         rc = SSMR3GetU32(pSSM, &u32);
     217        rc = pHlp->pfnSSMGetU32(pSSM, &u32);
    214218        AssertRCReturn(rc, rc);
    215219        AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
    … …  
    222226        ||  pThis->PortBase != PortBase
    223227        ||  pThis->UartCore.enmType != enmType)
    224         return SSMR3SetCfgError(pSSM, RT_SRC_POS,
    225                                 N_("Config mismatch - saved IRQ=%#x PortBase=%#x Type=%d; configured IRQ=%#x PortBase=%#x Type=%d"),
    226                                 bIrq, PortBase, enmType, pThis->uIrq, pThis->PortBase, pThis->UartCore.enmType);
     228        return pHlp->pfnSSMSetCfgError(pSSM, RT_SRC_POS,
     229                                       N_("Config mismatch - saved IRQ=%#x PortBase=%#x Type=%d; configured IRQ=%#x PortBase=%#x Type=%d"),
     230                                       bIrq, PortBase, enmType, pThis->uIrq, pThis->PortBase, pThis->UartCore.enmType);
    227231
    228232    return VINF_SUCCESS;
    … …  
    289293static DECLCALLBACK(int) serialR3Destruct(PPDMDEVINS pDevIns)
    290294{
    291     PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
    292295    PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
     296    PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
    293297
    294298    uartR3Destruct(&pThis->UartCore);
    … …  
    302306static DECLCALLBACK(int) serialR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
    303307{
    304     PDEVSERIAL pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
    305     int        rc = VINF_SUCCESS;
     308    PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
     309    PDEVSERIAL      pThis = PDMDEVINS_2_DATA(pDevIns, PDEVSERIAL);
     310    PCPDMDEVHLPR3   pHlp  = pDevIns->pHlpR3;
     311    int             rc;
    306312
    307313    Assert(iInstance < 4);
    308     PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
    309314
    310315    /*
    … …  
    319324     * Validate and read the configuration.
    320325     */
    321     if (!CFGMR3AreValuesValid(pCfg, "IRQ\0"
    322                                     "IOBase\0"
    323                                     "GCEnabled\0"
    324                                     "R0Enabled\0"
    325                                     "YieldOnLSRRead\0"
    326                                     "UartType\0"
    327                                     ))
    328     {
    329         AssertMsgFailed(("serialConstruct Invalid configuration values\n"));
    330         return VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES;
    331     }
    332 
    333     rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fRCEnabled, true);
     326    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ|IOBase|YieldOnLSRRead|UartType", "");
     327
     328    rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "GCEnabled", &pThis->fRCEnabled, true);
    334329    if (RT_FAILURE(rc))
    335         return PDMDEV_SET_ERROR(pDevIns, rc,
    336                                 N_("Configuration error: Failed to get the \"GCEnabled\" value"));
    337 
    338     rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
     330        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to get the \"GCEnabled\" value"));
     331
     332    rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
    339333    if (RT_FAILURE(rc))
    340         return PDMDEV_SET_ERROR(pDevIns, rc,
    341                                 N_("Configuration error: Failed to get the \"R0Enabled\" value"));
     334        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to get the \"R0Enabled\" value"));
    342335
    343336    bool fYieldOnLSRRead = false;
    344     rc = CFGMR3QueryBoolDef(pCfg, "YieldOnLSRRead", &fYieldOnLSRRead, false);
     337    rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "YieldOnLSRRead", &fYieldOnLSRRead, false);
    345338    if (RT_FAILURE(rc))
    346         return PDMDEV_SET_ERROR(pDevIns, rc,
    347                                 N_("Configuration error: Failed to get the \"YieldOnLSRRead\" value"));
     339        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to get the \"YieldOnLSRRead\" value"));
    348340
    349341    uint8_t uIrq = 0;
    350     rc = CFGMR3QueryU8(pCfg, "IRQ", &uIrq);
     342    rc = pHlp->pfnCFGMQueryU8(pCfg, "IRQ", &uIrq);
    351343    if (rc == VERR_CFGM_VALUE_NOT_FOUND)
    352344    {
    … …  
    360352    }
    361353    else if (RT_FAILURE(rc))
    362         return PDMDEV_SET_ERROR(pDevIns, rc,
    363                                 N_("Configuration error: Failed to get the \"IRQ\" value"));
     354        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to get the \"IRQ\" value"));
    364355
    365356    uint16_t uIoBase = 0;
    366     rc = CFGMR3QueryU16(pCfg, "IOBase", &uIoBase);
     357    rc = pHlp->pfnCFGMQueryU16(pCfg, "IOBase", &uIoBase);
    367358    if (rc == VERR_CFGM_VALUE_NOT_FOUND)
    368359    {
    … …  
    378369                                N_("Configuration error: Failed to get the \"IOBase\" value"));
    379370
    380     char *pszUartType;
    381     rc = CFGMR3QueryStringAllocDef(pCfg, "UartType", &pszUartType, "16550A");
     371    char szUartType[32];
     372    rc = pHlp->pfnCFGMQueryStringDef(pCfg, "UartType", szUartType, sizeof(szUartType), "16550A");
    382373    if (RT_FAILURE(rc))
    383         return PDMDEV_SET_ERROR(pDevIns, rc,
    384                                 N_("Configuration error: failed to read \"UartType\" as string"));
    385 
    386     UARTTYPE enmUartType = serialR3GetUartTypeFromString(pszUartType);
    387 
     374        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: failed to read \"UartType\" as string"));
     375
     376    UARTTYPE enmUartType = serialR3GetUartTypeFromString(szUartType);
    388377    if (enmUartType != UARTTYPE_INVALID)
    389         LogRel(("Serial#%d: emulating %s (IOBase: %04x IRQ: %u)\n",
    390                 pDevIns->iInstance, pszUartType, uIoBase, uIrq));
    391 
    392     MMR3HeapFree(pszUartType);
    393 
    394     if (enmUartType == UARTTYPE_INVALID)
    395         return PDMDEV_SET_ERROR(pDevIns, VERR_INVALID_PARAMETER,
    396                                 N_("Configuration error: \"UartType\" contains invalid type"));
     378        LogRel(("Serial#%d: emulating %s (IOBase: %04x IRQ: %u)\n", pDevIns->iInstance, szUartType, uIoBase, uIrq));
     379    else
     380        return PDMDevHlpVMSetError(pDevIns, VERR_INVALID_PARAMETER, RT_SRC_POS,
     381                                   N_("Configuration error: Invalid \"UartType\" type value: %s"), szUartType);
    397382
    398383    pThis->uIrq     = uIrq;
    … …  
    403388     */
    404389    rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
    405     if (RT_FAILURE(rc))
    406         return rc;
     390    AssertRCReturn(rc, rc);
    407391
    408392    /*
    … …  
    420404
    421405#ifdef VBOX_WITH_RAW_MODE_KEEP
    422     if (pThis->fRCEnabled)
     406    if (pDevIns->fRCEnabled)
    423407    {
    424408        rc = PDMDevHlpIOPortRegisterRC(pDevIns, uIoBase, 8, 0, "serialIoPortWrite", "serialIoPortRead", NULL, NULL, "SERIAL");
    … …  
    431415#endif
    432416
    433     if (pThis->fR0Enabled)
     417    if (pDevIns->fR0Enabled)
    434418    {
    435419        rc = PDMDevHlpIOPortRegisterR0(pDevIns, uIoBase, 8, 0, "serialIoPortWrite", "serialIoPortRead", NULL, NULL, "SERIAL");
    … …  
    447431                                NULL, serialR3SaveExec, NULL,
    448432                                NULL, serialR3LoadExec, serialR3LoadDone);
    449     if (RT_FAILURE(rc))
    450         return rc;
     433    AssertRCReturn(rc, rc);
    451434
    452435    /* Init the UART core structure. */
    453436    rc = uartR3Init(&pThis->UartCore, pDevIns, enmUartType, 0,
    454437                    fYieldOnLSRRead ? UART_CORE_YIELD_ON_LSR_READ : 0, serialIrqReq, pfnSerialIrqReqR0, pfnSerialIrqReqRC);
    455     if (RT_FAILURE(rc))
    456         return rc;
     438    AssertRCReturn(rc, rc);
    457439
    458440    serialR3Reset(pDevIns);
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