- Timestamp:
- Nov 17, 2019 8:00:34 PM (5 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/PC/DevPIC.cpp
r81909 r81910 109 109 /** The IRQ tags and source IDs for each (tracing purposes). */ 110 110 uint32_t auTags[8]; 111 /** The two I/O ports at 0x20 or 0xa0. */ 112 IOMIOPORTHANDLE hIoPorts0; 113 /** The ELCR I/O port at 0x4d0 or 0x4d1. */ 114 IOMIOPORTHANDLE hIoPorts1; 111 115 } PICSTATE; 116 AssertCompileMemberAlignment(PICSTATE, hIoPorts0, 8); 112 117 /** Pointer to the state of one PIC. */ 113 118 typedef PICSTATE *PPICSTATE; … … 137 142 uint32_t u32AlignmentPadding; 138 143 #ifdef VBOX_WITH_STATISTICS 139 STAMCOUNTER StatSetIrq GC;140 STAMCOUNTER StatSetIrq HC;144 STAMCOUNTER StatSetIrqRZ; 145 STAMCOUNTER StatSetIrqR3; 141 146 STAMCOUNTER StatClearedActiveIRQ2; 142 147 STAMCOUNTER StatClearedActiveMasterIRQ; … … 338 343 DumpPICState(&pThis->aPics[0], "picSetIrq"); 339 344 DumpPICState(&pThis->aPics[1], "picSetIrq"); 340 STAM_COUNTER_INC(&pThis->CTX SUFF(StatSetIrq));345 STAM_COUNTER_INC(&pThis->CTX_SUFF_Z(StatSetIrq)); 341 346 if ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP) 342 347 { … … 437 442 static void pic_reset(PPICSTATE pPic) 438 443 { 439 PPDMDEVINSR3 pDevInsR3 = pPic->pDevInsR3; 440 PPDMDEVINSR0 pDevInsR0 = pPic->pDevInsR0; 441 PPDMDEVINSRC pDevInsRC = pPic->pDevInsRC; 442 int elcr_mask = pPic->elcr_mask; 443 int elcr = pPic->elcr; 444 445 memset(pPic, 0, sizeof(*pPic)); 446 447 pPic->elcr = elcr; 448 pPic->elcr_mask = elcr_mask; 449 pPic->pDevInsRC = pDevInsRC; 450 pPic->pDevInsR0 = pDevInsR0; 451 pPic->pDevInsR3 = pDevInsR3; 452 } 453 454 455 static int pic_ioport_write(PDEVPIC pThis, PPICSTATE pPic, uint32_t addr, uint32_t val) 456 { 457 int rc = VINF_SUCCESS; 458 int irq; 459 460 Log(("pic_write: addr=0x%02x val=0x%02x\n", addr, val)); 444 pPic->last_irr = 0; 445 pPic->irr = 0; 446 pPic->imr = 0; 447 pPic->isr = 0; 448 pPic->priority_add = 0; 449 pPic->irq_base = 0; 450 pPic->read_reg_select = 0; 451 pPic->poll = 0; 452 pPic->special_mask = 0; 453 pPic->init_state = 0; 454 pPic->auto_eoi = 0; 455 pPic->rotate_on_auto_eoi = 0; 456 pPic->special_fully_nested_mode = 0; 457 pPic->init4 = 0; 458 //pPic->elcr - not cleared; 459 //pPic->elcr_mask - not cleared; 460 RT_ZERO(pPic->auTags); 461 } 462 463 464 static VBOXSTRICTRC pic_ioport_write(PDEVPIC pThis, PPICSTATE pPic, uint32_t addr, uint32_t val) 465 { 466 VBOXSTRICTRC rc = VINF_SUCCESS; 467 int irq; 468 469 Log(("pic_write/%zu: addr=0x%02x val=0x%02x\n", pPic - pThis->aPics, addr, val)); 461 470 addr &= 1; 462 471 if (addr == 0) … … 645 654 * @callback_method_impl{FNIOMIOPORTIN} 646 655 */ 647 PDMBOTHCBDECL(int) picIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t *pu32, unsigned cb)656 static DECLCALLBACK(VBOXSTRICTRC) picIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 648 657 { 649 658 PDEVPIC pThis = PDMDEVINS_2_DATA(pDevIns, PDEVPIC); … … 655 664 int rc; 656 665 PIC_LOCK(pThis, VINF_IOM_R3_IOPORT_READ); 657 *pu32 = pic_ioport_read(& pThis->aPics[iPic], uPort, &rc);666 *pu32 = pic_ioport_read(&RT_SAFE_SUBSCRIPT(pThis->aPics, iPic), offPort, &rc); 658 667 PIC_UNLOCK(pThis); 659 668 return rc; … … 664 673 665 674 /** 666 * @callback_method_impl{FNIOMIOPORT OUT}667 */ 668 PDMBOTHCBDECL(int) picIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)675 * @callback_method_impl{FNIOMIOPORTNEWOUT} 676 */ 677 static DECLCALLBACK(VBOXSTRICTRC) picIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 669 678 { 670 679 PDEVPIC pThis = PDMDEVINS_2_DATA(pDevIns, PDEVPIC); … … 675 684 if (cb == 1) 676 685 { 677 intrc;686 VBOXSTRICTRC rc; 678 687 PIC_LOCK(pThis, VINF_IOM_R3_IOPORT_WRITE); 679 rc = pic_ioport_write(pThis, & pThis->aPics[iPic], uPort, u32);688 rc = pic_ioport_write(pThis, &RT_SAFE_SUBSCRIPT(pThis->aPics, iPic), offPort, u32); 680 689 PIC_UNLOCK(pThis); 681 690 return rc; … … 686 695 687 696 /** 688 * @callback_method_impl{FNIOMIOPORT IN, ELCR}689 */ 690 PDMBOTHCBDECL(int) picIOPortElcrRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORTPort, uint32_t *pu32, unsigned cb)697 * @callback_method_impl{FNIOMIOPORTNEWIN, ELCR} 698 */ 699 static DECLCALLBACK(VBOXSTRICTRC) picIOPortElcrRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb) 691 700 { 692 701 if (cb == 1) … … 698 707 return VINF_SUCCESS; 699 708 } 700 NOREF(Port);709 RT_NOREF(offPort); 701 710 return VERR_IOM_IOPORT_UNUSED; 702 711 } … … 704 713 705 714 /** 706 * @callback_method_impl{FNIOMIOPORT OUT, ELCR}707 */ 708 PDMBOTHCBDECL(int) picIOPortElcrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORTPort, uint32_t u32, unsigned cb)715 * @callback_method_impl{FNIOMIOPORTNEWOUT, ELCR} 716 */ 717 static DECLCALLBACK(VBOXSTRICTRC) picIOPortElcrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb) 709 718 { 710 719 if (cb == 1) … … 715 724 PIC_UNLOCK(PDMDEVINS_2_DATA(pDevIns, PDEVPIC)); 716 725 } 717 NOREF(Port);726 RT_NOREF(offPort); 718 727 return VINF_SUCCESS; 719 728 } … … 913 922 * Register I/O ports and save state. 914 923 */ 915 rc = PDMDevHlpIOPortRegister(pDevIns, 0x20, 2, (void *)0, picIOPortWrite, picIOPortRead, NULL, NULL, "i8259 PIC #0"); 916 if (RT_FAILURE(rc)) 917 return rc; 918 rc = PDMDevHlpIOPortRegister(pDevIns, 0xa0, 2, (void *)1, picIOPortWrite, picIOPortRead, NULL, NULL, "i8259 PIC #1"); 919 if (RT_FAILURE(rc)) 920 return rc; 921 if (pDevIns->fRCEnabled) 922 { 923 rc = PDMDevHlpIOPortRegisterRC(pDevIns, 0x20, 2, 0, "picIOPortWrite", "picIOPortRead", NULL, NULL, "i8259 PIC #0"); 924 if (RT_FAILURE(rc)) 925 return rc; 926 rc = PDMDevHlpIOPortRegisterRC(pDevIns, 0xa0, 2, 1, "picIOPortWrite", "picIOPortRead", NULL, NULL, "i8259 PIC #1"); 927 if (RT_FAILURE(rc)) 928 return rc; 929 } 930 if (pDevIns->fR0Enabled) 931 { 932 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x20, 2, 0, "picIOPortWrite", "picIOPortRead", NULL, NULL, "i8259 PIC #0"); 933 if (RT_FAILURE(rc)) 934 return rc; 935 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0xa0, 2, 1, "picIOPortWrite", "picIOPortRead", NULL, NULL, "i8259 PIC #1"); 936 if (RT_FAILURE(rc)) 937 return rc; 938 } 939 940 rc = PDMDevHlpIOPortRegister(pDevIns, 0x4d0, 1, &pThis->aPics[0], 941 picIOPortElcrWrite, picIOPortElcrRead, NULL, NULL, "i8259 PIC #0 - elcr"); 942 if (RT_FAILURE(rc)) 943 return rc; 944 rc = PDMDevHlpIOPortRegister(pDevIns, 0x4d1, 1, &pThis->aPics[1], 945 picIOPortElcrWrite, picIOPortElcrRead, NULL, NULL, "i8259 PIC #1 - elcr"); 946 if (RT_FAILURE(rc)) 947 return rc; 948 if (pDevIns->fRCEnabled) 949 { 950 RTRCPTR pDataRC = PDMINS_2_DATA_RCPTR(pDevIns); 951 rc = PDMDevHlpIOPortRegisterRC(pDevIns, 0x4d0, 1, pDataRC + RT_OFFSETOF(DEVPIC, aPics[0]), 952 "picIOPortElcrWrite", "picIOPortElcrRead", NULL, NULL, "i8259 PIC #0 - elcr"); 953 if (RT_FAILURE(rc)) 954 return rc; 955 rc = PDMDevHlpIOPortRegisterRC(pDevIns, 0x4d1, 1, pDataRC + RT_OFFSETOF(DEVPIC, aPics[1]), 956 "picIOPortElcrWrite", "picIOPortElcrRead", NULL, NULL, "i8259 PIC #1 - elcr"); 957 if (RT_FAILURE(rc)) 958 return rc; 959 } 960 if (pDevIns->fR0Enabled) 961 { 962 RTR0PTR pDataR0 = PDMINS_2_DATA_R0PTR(pDevIns); 963 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x4d0, 1, pDataR0 + RT_OFFSETOF(DEVPIC, aPics[0]), 964 "picIOPortElcrWrite", "picIOPortElcrRead", NULL, NULL, "i8259 PIC #0 - elcr"); 965 if (RT_FAILURE(rc)) 966 return rc; 967 rc = PDMDevHlpIOPortRegisterR0(pDevIns, 0x4d1, 1, pDataR0 + RT_OFFSETOF(DEVPIC, aPics[1]), 968 "picIOPortElcrWrite", "picIOPortElcrRead", NULL, NULL, "i8259 PIC #1 - elcr"); 969 if (RT_FAILURE(rc)) 970 return rc; 971 } 972 924 rc = PDMDevHlpIoPortCreateUAndMap(pDevIns, 0x20 /*uPort*/, 2 /*cPorts*/, picIOPortWrite, picIOPortRead, (void *)0, 925 "i8259 PIC #0", NULL /*paExtDesc*/, &pThis->aPics[0].hIoPorts0); 926 AssertRCReturn(rc, rc); 927 LogRel(("pThis->aPics[0].hIoPorts0=%RX64 - YYY pThis=%p &hIoPorts0=%p\n", pThis->aPics[0].hIoPorts0, pThis, &pThis->aPics[0].hIoPorts0)); 928 rc = PDMDevHlpIoPortCreateUAndMap(pDevIns, 0xa0 /*uPort*/, 2 /*cPorts*/, picIOPortWrite, picIOPortRead, (void *)1, 929 "i8259 PIC #1", NULL /*paExtDesc*/, &pThis->aPics[1].hIoPorts0); 930 AssertRCReturn(rc, rc); 931 932 933 rc = PDMDevHlpIoPortCreateUAndMap(pDevIns, 0x4d0 /*uPort*/, 1 /*cPorts*/, picIOPortElcrWrite, picIOPortElcrRead, 934 &pThis->aPics[0], "i8259 PIC #0 - elcr", NULL /*paExtDesc*/, &pThis->aPics[0].hIoPorts1); 935 AssertRCReturn(rc, rc); 936 rc = PDMDevHlpIoPortCreateUAndMap(pDevIns, 0x4d1 /*uPort*/, 1 /*cPorts*/, picIOPortElcrWrite, picIOPortElcrRead, 937 &pThis->aPics[1], "i8259 PIC #1 - elcr", NULL /*paExtDesc*/, &pThis->aPics[1].hIoPorts1); 938 AssertRCReturn(rc, rc); 939 940 /* 941 * Saved state. 942 */ 973 943 rc = PDMDevHlpSSMRegister(pDevIns, 1 /* uVersion */, sizeof(*pThis), picR3SaveExec, picR3LoadExec); 974 if (RT_FAILURE(rc)) 975 return rc; 976 944 AssertRCReturn(rc, rc); 977 945 978 946 /* … … 990 958 * Statistics. 991 959 */ 992 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatSetIrq GC, STAMTYPE_COUNTER, "/Devices/PIC/SetIrqGC", STAMUNIT_OCCURENCES, "Number of PIC SetIrq calls in GC.");993 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatSetIrq HC, STAMTYPE_COUNTER, "/Devices/PIC/SetIrqHC", STAMUNIT_OCCURENCES, "Number of PIC SetIrq calls in HC.");994 995 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveIRQ2, STAMTYPE_COUNTER, " /Devices/PIC/Masked/ActiveIRQ2", STAMUNIT_OCCURENCES, "Number of cleared irq 2.");996 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveMasterIRQ, STAMTYPE_COUNTER, " /Devices/PIC/Masked/ActiveMaster", STAMUNIT_OCCURENCES, "Number of cleared master irqs.");997 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveSlaveIRQ, STAMTYPE_COUNTER, " /Devices/PIC/Masked/ActiveSlave", STAMUNIT_OCCURENCES, "Number of cleared slave irqs.");960 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatSetIrqRZ, STAMTYPE_COUNTER, "SetIrqRZ", STAMUNIT_OCCURENCES, "Number of PIC SetIrq calls in ring-0/raw-mode."); 961 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatSetIrqR3, STAMTYPE_COUNTER, "SetIrqR3", STAMUNIT_OCCURENCES, "Number of PIC SetIrq calls in ring-3."); 962 963 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveIRQ2, STAMTYPE_COUNTER, "Masked/ActiveIRQ2", STAMUNIT_OCCURENCES, "Number of cleared irq 2."); 964 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveMasterIRQ, STAMTYPE_COUNTER, "Masked/ActiveMaster", STAMUNIT_OCCURENCES, "Number of cleared master irqs."); 965 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveSlaveIRQ, STAMTYPE_COUNTER, "Masked/ActiveSlave", STAMUNIT_OCCURENCES, "Number of cleared slave irqs."); 998 966 #endif 999 967 … … 1011 979 PDEVPIC pThis = PDMDEVINS_2_DATA(pDevIns, PDEVPIC); 1012 980 981 /* NOP the critsect: */ 1013 982 int rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns)); 1014 983 AssertRCReturn(rc, rc); 1015 984 985 /* Set up the PIC callbacks: */ 1016 986 PDMPICREG PicReg; 1017 987 PicReg.u32Version = PDM_PICREG_VERSION; … … 1021 991 rc = PDMDevHlpPICSetUpContext(pDevIns, &PicReg, &pThis->CTX_SUFF(pPicHlp)); 1022 992 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpPICSetUpContext -> %Rrc\n", rc), rc); 993 994 /* I/O port callbacks: */ 995 LogRel(("pThis->aPics[0].hIoPorts0=%RX64 - XXX pThis=%p &hIoPorts0=%p\n", pThis->aPics[0].hIoPorts0, pThis, &pThis->aPics[0].hIoPorts0)); 996 PRTLOGGER pLogger = RTLogRelGetDefaultInstance(); 997 if (pLogger) 998 RTLogLoggerEx(pLogger, 0, ~0U, "pThis->aPics[0].hIoPorts0=%RX64 - XX\n", pThis->aPics[0].hIoPorts0); 999 pLogger = RTLogGetDefaultInstance(); 1000 if (pLogger) 1001 RTLogLoggerEx(pLogger, 0, ~0U, "pThis->aPics[0].hIoPorts0=%RX64 - X\n", pThis->aPics[0].hIoPorts0); 1002 1003 rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->aPics[0].hIoPorts0, picIOPortWrite, picIOPortRead, (void *)0); 1004 AssertRCReturn(rc, VERR_INTERNAL_ERROR_2); 1005 AssertRCReturn(rc, rc); 1006 rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->aPics[1].hIoPorts0, picIOPortWrite, picIOPortRead, (void *)1); 1007 AssertRCReturn(rc, VERR_INTERNAL_ERROR_3); 1008 AssertRCReturn(rc, rc); 1009 1010 rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->aPics[0].hIoPorts1, picIOPortElcrWrite, picIOPortElcrRead, &pThis->aPics[0]); 1011 AssertRCReturn(rc, VERR_INTERNAL_ERROR_4); 1012 AssertRCReturn(rc, rc); 1013 rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->aPics[1].hIoPorts1, picIOPortElcrWrite, picIOPortElcrRead, &pThis->aPics[1]); 1014 AssertRCReturn(rc, VERR_INTERNAL_ERROR_5); 1015 AssertRCReturn(rc, rc); 1023 1016 1024 1017 return VINF_SUCCESS;
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