VirtualBox

Changeset 81913 in vbox


Ignore:
Timestamp:
Nov 17, 2019 8:14:50 PM (5 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
134710
Message:

DevPIC: Eliminated pDevIns pointers in the state structures. bugref:9218

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/PC/DevPIC.cpp

    r81912 r81913  
    6262/** @def PIC_UNLOCK
    6363 * Releases the PDM lock. This is a NOP if locking is disabled. */
    64 #define PIC_LOCK(pThis, rc) \
     64#define PIC_LOCK(a_pDevIns, a_pThis, rc) \
    6565    do { \
    66         int rc2 = (pThis)->CTX_SUFF(pPicHlp)->pfnLock((pThis)->CTX_SUFF(pDevIns), rc); \
     66        int rc2 = (a_pThis)->CTX_SUFF(pPicHlp)->pfnLock((a_pDevIns), rc); \
    6767        if (rc2 != VINF_SUCCESS) \
    6868            return rc2; \
    6969    } while (0)
    70 #define PIC_UNLOCK(pThis) \
    71     (pThis)->CTX_SUFF(pPicHlp)->pfnUnlock((pThis)->CTX_SUFF(pDevIns))
    72 
    73 
    74 /* debug PIC */
    75 #define DEBUG_PIC
    76 
    77 /*#define DEBUG_IRQ_COUNT*/
    78 
     70#define PIC_UNLOCK(a_pDevIns, a_pThis) \
     71    (a_pThis)->CTX_SUFF(pPicHlp)->pfnUnlock((a_pDevIns))
     72
     73
     74/*********************************************************************************************************************************
     75*   Structures and Typedefs                                                                                                      *
     76*********************************************************************************************************************************/
    7977/**
    8078 * The instance data of one (1) PIC.
    … …  
    8280typedef struct PICSTATE
    8381{
    84     uint8_t last_irr;       /**< edge detection */
    85     uint8_t irr;            /**< interrupt request register */
    86     uint8_t imr;            /**< interrupt mask register */
    87     uint8_t isr;            /**< interrupt service register */
    88     uint8_t priority_add;   /**< highest irq priority */
    89     uint8_t irq_base;
    90     uint8_t read_reg_select;
    91     uint8_t poll;
    92     uint8_t special_mask;
    93     uint8_t init_state;
    94     uint8_t auto_eoi;
    95     uint8_t rotate_on_auto_eoi;
    96     uint8_t special_fully_nested_mode;
    97     uint8_t init4;          /**< true if 4 byte init */
    98     uint8_t elcr;           /**< PIIX edge/trigger selection*/
    99     uint8_t elcr_mask;
    100     /** Pointer to the device instance, R3 Ptr. */
    101     PPDMDEVINSR3    pDevInsR3;
    102     /** Pointer to the device instance, R0 Ptr. */
    103     PPDMDEVINSR0    pDevInsR0;
    104     /** Pointer to the device instance, RC Ptr. */
    105     PPDMDEVINSRC    pDevInsRC;
     82    uint8_t         last_irr;       /**< edge detection */
     83    uint8_t         irr;            /**< interrupt request register */
     84    uint8_t         imr;            /**< interrupt mask register */
     85    uint8_t         isr;            /**< interrupt service register */
     86    uint8_t         priority_add;   /**< highest irq priority */
     87    uint8_t         irq_base;
     88    uint8_t         read_reg_select;
     89    uint8_t         poll;
     90    uint8_t         special_mask;
     91    uint8_t         init_state;
     92    uint8_t         auto_eoi;
     93    uint8_t         rotate_on_auto_eoi;
     94    uint8_t         special_fully_nested_mode;
     95    uint8_t         init4;          /**< true if 4 byte init */
     96    uint8_t         elcr;           /**< PIIX edge/trigger selection*/
     97    uint8_t         elcr_mask;
     98    /** The IRQ tags and source IDs for each (tracing purposes). */
     99    uint32_t        auTags[8];
    106100    /** The PIC index (0 or 1). */
    107101    uint8_t         idxPic;
    108     uint8_t         abAlignment0[3]; /**< Alignment padding. */
    109     /** The IRQ tags and source IDs for each (tracing purposes). */
    110     uint32_t        auTags[8];
     102    uint8_t         abAlignment0[7]; /**< Alignment padding. */
    111103    /** The two I/O ports at 0x20 or 0xa0. */
    112104    IOMIOPORTHANDLE hIoPorts0;
    … …  
    126118    /** The two interrupt controllers. */
    127119    PICSTATE                aPics[2];
    128     /** Pointer to the device instance - R3 Ptr. */
    129     PPDMDEVINSR3            pDevInsR3;
    130120    /** Pointer to the PIC R3 helpers. */
    131121    R3PTRTYPE(PCPDMPICHLP)  pPicHlpR3;
    132     /** Pointer to the device instance - R0 Ptr. */
    133     PPDMDEVINSR0            pDevInsR0;
    134122    /** Pointer to the PIC R0 helpers. */
    135123    R0PTRTYPE(PCPDMPICHLP)  pPicHlpR0;
    136     /** Pointer to the device instance - RC Ptr. */
    137     PPDMDEVINSRC            pDevInsRC;
    138124    /** Pointer to the PIC RC helpers. */
    139125    RCPTRTYPE(PCPDMPICHLP)  pPicHlpRC;
    140126    /** Number of release log entries. Used to prevent flooding. */
    141127    uint32_t                cRelLogEntries;
    142     uint32_t                u32AlignmentPadding;
    143128#ifdef VBOX_WITH_STATISTICS
    144129    STAMCOUNTER             StatSetIrqRZ;
    … …  
    153138
    154139
    155 #ifndef VBOX_DEVICE_STRUCT_TESTCASE
     140#ifndef VBOX_DEVICE_STRUCT_TESTCASE /* The rest of the file! */
     141
    156142#ifdef LOG_ENABLED
    157143DECLINLINE(void) DumpPICState(PPICSTATE pPic, const char *pszFn)
    158144{
    159     PDEVPIC pThis = PDMDEVINS_2_DATA(pPic->CTX_SUFF(pDevIns), PDEVPIC);
    160 
    161145    Log2(("%s: pic%d: elcr=%x last_irr=%x irr=%x imr=%x isr=%x irq_base=%x\n",
    162           pszFn, (&pThis->aPics[0] == pPic) ? 0 : 1,
    163           pPic->elcr, pPic->last_irr, pPic->irr, pPic->imr, pPic->isr, pPic->irq_base));
     146          pszFn, pPic->idxPic, pPic->elcr, pPic->last_irr, pPic->irr, pPic->imr, pPic->isr, pPic->irq_base));
    164147}
    165148#else
    … …  
    265248/* raise irq to CPU if necessary. must be called every time the active
    266249   irq may change */
    267 static int pic_update_irq(PDEVPIC pThis)
     250static int pic_update_irq(PPDMDEVINS pDevIns, PDEVPIC pThis)
    268251{
    269252    int irq2, irq;
    … …  
    291274        if (irq != 2 || irq2 != -1)
    292275        {
    293 #if defined(DEBUG_PIC)
    294276            for (int i = 0; i < 2; i++)
    295277                Log(("pic%d: imr=%x irr=%x padd=%d\n", i, pThis->aPics[i].imr, pThis->aPics[i].irr, pThis->aPics[i].priority_add));
    296278            Log(("pic: cpu_interrupt\n"));
    297 #endif
    298             pThis->CTX_SUFF(pPicHlp)->pfnSetInterruptFF(pThis->CTX_SUFF(pDevIns));
     279            pThis->CTX_SUFF(pPicHlp)->pfnSetInterruptFF(pDevIns);
    299280        }
    300281        else
    … …  
    305286
    306287            /* if this was the only pending irq, then we must clear the interrupt ff flag */
    307             pThis->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pThis->CTX_SUFF(pDevIns));
     288            pThis->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pDevIns);
    308289
    309290            /** @todo Is this correct? */
    … …  
    311292
    312293            /* Call ourselves again just in case other interrupts are pending */
    313             return pic_update_irq(pThis);
     294            return pic_update_irq(pDevIns, pThis);
    314295        }
    315296    }
    … …  
    319300
    320301        /* we must clear the interrupt ff flag */
    321         pThis->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pThis->CTX_SUFF(pDevIns));
     302        pThis->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pDevIns);
    322303    }
    323304    return VINF_SUCCESS;
    … …  
    335316{
    336317    PDEVPIC     pThis = PDMDEVINS_2_DATA(pDevIns, PDEVPIC);
    337     Assert(pThis->CTX_SUFF(pDevIns) == pDevIns);
    338     Assert(pThis->aPics[0].CTX_SUFF(pDevIns) == pDevIns);
    339     Assert(pThis->aPics[1].CTX_SUFF(pDevIns) == pDevIns);
    340318    AssertMsgReturnVoid(iIrq < 16, ("iIrq=%d\n", iIrq));
    341319
    … …  
    350328         * line must be held high for a while to avoid spurious interrupts.
    351329         */
    352         pic_set_irq1(&pThis->aPics[iIrq >> 3], iIrq & 7, 0, uTagSrc);
    353         pic_update_irq(pThis);
    354     }
    355     pic_set_irq1(&pThis->aPics[iIrq >> 3], iIrq & 7, iLevel & PDM_IRQ_LEVEL_HIGH, uTagSrc);
    356     pic_update_irq(pThis);
     330        pic_set_irq1(&RT_SAFE_SUBSCRIPT(pThis->aPics, iIrq >> 3), iIrq & 7, 0, uTagSrc);
     331        pic_update_irq(pDevIns, pThis);
     332    }
     333    pic_set_irq1(&RT_SAFE_SUBSCRIPT(pThis->aPics, iIrq >> 3), iIrq & 7, iLevel & PDM_IRQ_LEVEL_HIGH, uTagSrc);
     334    pic_update_irq(pDevIns, pThis);
    357335}
    358336
    … …  
    433411        *puTagSrc = 0;
    434412    }
    435     pic_update_irq(pThis);
     413    pic_update_irq(pDevIns, pThis);
    436414
    437415    Log(("picGetInterrupt: 0x%02x pending 0:%d 1:%d\n", intno, pic_get_irq(&pThis->aPics[0]), pic_get_irq(&pThis->aPics[1])));
    … …  
    462440
    463441
    464 static VBOXSTRICTRC pic_ioport_write(PDEVPIC pThis, PPICSTATE pPic, uint32_t addr, uint32_t val)
     442static VBOXSTRICTRC pic_ioport_write(PPDMDEVINS pDevIns, PDEVPIC pThis, PPICSTATE pPic, uint32_t addr, uint32_t val)
    465443{
    466444    VBOXSTRICTRC rc = VINF_SUCCESS;
    … …  
    476454            pic_reset(pPic);
    477455            /* deassert a pending interrupt */
    478             pThis->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pThis->CTX_SUFF(pDevIns));
     456            pThis->CTX_SUFF(pPicHlp)->pfnClearInterruptFF(pDevIns);
    479457
    480458            pPic->init_state = 1;
    … …  
    514492                        if (cmd == 5)
    515493                            pPic->priority_add = (irq + 1) & 7;
    516                         rc = pic_update_irq(pThis);
     494                        rc = pic_update_irq(pDevIns, pThis);
    517495                        Assert(rc == VINF_SUCCESS);
    518496                        DumpPICState(pPic, "eoi");
    … …  
    525503                    Log(("pic_write: EOI2 for irq %d\n", irq));
    526504                    pPic->isr &= ~(1 << irq);
    527                     rc = pic_update_irq(pThis);
     505                    rc = pic_update_irq(pDevIns, pThis);
    528506                    Assert(rc == VINF_SUCCESS);
    529507                    DumpPICState(pPic, "eoi2");
    … …  
    534512                    pPic->priority_add = (val + 1) & 7;
    535513                    Log(("pic_write: lowest priority %d (highest %d)\n", val & 7, pPic->priority_add));
    536                     rc = pic_update_irq(pThis);
     514                    rc = pic_update_irq(pDevIns, pThis);
    537515                    Assert(rc == VINF_SUCCESS);
    538516                    break;
    … …  
    544522                    pPic->isr &= ~(1 << irq);
    545523                    pPic->priority_add = (irq + 1) & 7;
    546                     rc = pic_update_irq(pThis);
     524                    rc = pic_update_irq(pDevIns, pThis);
    547525                    Assert(rc == VINF_SUCCESS);
    548526                    DumpPICState(pPic, "eoi3");
    … …  
    562540                /* normal mode */
    563541                pPic->imr = val;
    564                 rc = pic_update_irq(pThis);
     542                rc = pic_update_irq(pDevIns, pThis);
    565543                Assert(rc == VINF_SUCCESS);
    566544                break;
    … …  
    588566
    589567
    590 static uint32_t pic_poll_read(PPICSTATE pPic, uint32_t addr1)
    591 {
    592     PDEVPIC pThis = RT_FROM_MEMBER_DYN(pPic, DEVPIC, aPics[pPic->idxPic]);
    593 
     568static uint32_t pic_poll_read(PPDMDEVINS pDevIns, PDEVPIC pThis, PPICSTATE pPic, uint32_t addr1)
     569{
    594570    int ret = pic_get_irq(pPic);
    595571    if (ret >= 0)
    … …  
    605581        pPic->isr &= ~(1 << ret);
    606582        if (addr1 >> 7 || ret != 2)
    607             pic_update_irq(pThis);
     583            pic_update_irq(pDevIns, pThis);
    608584    }
    609585    else
    610586    {
    611587        ret = 0;
    612         pic_update_irq(pThis);
     588        pic_update_irq(pDevIns, pThis);
    613589    }
    614590
    … …  
    617593
    618594
    619 static uint32_t pic_ioport_read(PPICSTATE pPic, uint32_t addr1, int *pRC)
     595static uint32_t pic_ioport_read(PPDMDEVINS pDevIns, PDEVPIC pThis, PPICSTATE pPic, uint32_t addr1, int *pRC)
    620596{
    621597    unsigned int addr;
    … …  
    628604    if (pPic->poll)
    629605    {
    630         ret = pic_poll_read(pPic, addr1);
     606        ret = pic_poll_read(pDevIns, pThis, pPic, addr1);
    631607        pPic->poll = 0;
    632608    }
    … …  
    663639    {
    664640        int rc;
    665         PIC_LOCK(pThis, VINF_IOM_R3_IOPORT_READ);
    666         *pu32 = pic_ioport_read(&RT_SAFE_SUBSCRIPT(pThis->aPics, iPic), offPort, &rc);
    667         PIC_UNLOCK(pThis);
     641        PIC_LOCK(pDevIns, pThis, VINF_IOM_R3_IOPORT_READ);
     642        *pu32 = pic_ioport_read(pDevIns, pThis, &RT_SAFE_SUBSCRIPT(pThis->aPics, iPic), offPort, &rc);
     643        PIC_UNLOCK(pDevIns, pThis);
    668644        return rc;
    669645    }
    … …  
    685661    {
    686662        VBOXSTRICTRC rc;
    687         PIC_LOCK(pThis, VINF_IOM_R3_IOPORT_WRITE);
    688         rc = pic_ioport_write(pThis, &RT_SAFE_SUBSCRIPT(pThis->aPics, iPic), offPort, u32);
    689         PIC_UNLOCK(pThis);
     663        PIC_LOCK(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE);
     664        rc = pic_ioport_write(pDevIns, pThis, &RT_SAFE_SUBSCRIPT(pThis->aPics, iPic), offPort, u32);
     665        PIC_UNLOCK(pDevIns, pThis);
    690666        return rc;
    691667    }
    … …  
    701677    if (cb == 1)
    702678    {
    703         PPICSTATE pPic = (PPICSTATE)pvUser;
    704         PIC_LOCK(PDMDEVINS_2_DATA(pDevIns, PDEVPIC), VINF_IOM_R3_IOPORT_READ);
     679        PDEVPIC   pThis = PDMDEVINS_2_DATA(pDevIns, PDEVPIC);
     680        PPICSTATE pPic  = (PPICSTATE)pvUser;
     681        PIC_LOCK(pDevIns, pThis, VINF_IOM_R3_IOPORT_READ);
    705682        *pu32 = pPic->elcr;
    706         PIC_UNLOCK(PDMDEVINS_2_DATA(pDevIns, PDEVPIC));
     683        PIC_UNLOCK(pDevIns, pThis);
    707684        return VINF_SUCCESS;
    708685    }
    … …  
    719696    if (cb == 1)
    720697    {
    721         PPICSTATE pPic = (PPICSTATE)pvUser;
    722         PIC_LOCK(PDMDEVINS_2_DATA(pDevIns, PDEVPIC), VINF_IOM_R3_IOPORT_WRITE);
     698        PDEVPIC   pThis = PDMDEVINS_2_DATA(pDevIns, PDEVPIC);
     699        PPICSTATE pPic  = (PPICSTATE)pvUser;
     700        PIC_LOCK(pDevIns, pThis, VINF_IOM_R3_IOPORT_WRITE);
    723701        pPic->elcr = u32 & pPic->elcr_mask;
    724         PIC_UNLOCK(PDMDEVINS_2_DATA(pDevIns, PDEVPIC));
     702        PIC_UNLOCK(pDevIns, pThis);
    725703    }
    726704    RT_NOREF(offPort);
    … …  
    742720     * Show info.
    743721     */
    744     for (int i = 0; i < 2; i++)
     722    for (int i = 0; i < RT_ELEMENTS(pThis->aPics); i++)
    745723    {
    746724        PPICSTATE pPic = &pThis->aPics[i];
    … …  
    844822        pic_reset(&pThis->aPics[i]);
    845823
    846     PIC_UNLOCK(pThis);
     824    PIC_UNLOCK(pDevIns, pThis);
    847825}
    848826
    … …  
    853831static DECLCALLBACK(void) picR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
    854832{
    855     RT_NOREF1(offDelta);
    856     PDEVPIC         pThis = PDMDEVINS_2_DATA(pDevIns, PDEVPIC);
    857     unsigned        i;
    858 
    859     pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
     833    PDEVPIC pThis = PDMDEVINS_2_DATA(pDevIns, PDEVPIC);
    860834    pThis->pPicHlpRC += offDelta;
    861     for (i = 0; i < RT_ELEMENTS(pThis->aPics); i++)
    862         pThis->aPics[i].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    863835}
    864836
    … …  
    886858     */
    887859    Assert(RT_ELEMENTS(pThis->aPics) == 2);
    888     pThis->pDevInsR3 = pDevIns;
    889     pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
    890     pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    891860    pThis->aPics[0].elcr_mask = 0xf8;
    892861    pThis->aPics[1].elcr_mask = 0xde;
    893     pThis->aPics[0].pDevInsR3 = pDevIns;
    894     pThis->aPics[1].pDevInsR3 = pDevIns;
    895     pThis->aPics[0].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
    896     pThis->aPics[1].pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
    897     pThis->aPics[0].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    898     pThis->aPics[1].pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
    899862    pThis->aPics[0].idxPic    = 0;
    900863    pThis->aPics[1].idxPic    = 1;
    … …  
    953916    picR3Reset(pDevIns);
    954917
    955 #ifdef VBOX_WITH_STATISTICS
     918# ifdef VBOX_WITH_STATISTICS
    956919    /*
    957920     * Statistics.
    … …  
    963926    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveMasterIRQ,  STAMTYPE_COUNTER, "Masked/ActiveMaster", STAMUNIT_OCCURENCES, "Number of cleared master irqs.");
    964927    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatClearedActiveSlaveIRQ,   STAMTYPE_COUNTER, "Masked/ActiveSlave",  STAMUNIT_OCCURENCES, "Number of cleared slave irqs.");
    965 #endif
     928# endif
    966929
    967930    return VINF_SUCCESS;
    … …  
    992955
    993956    /* I/O port callbacks: */
     957    Assert(RT_ELEMENTS(pThis->aPics) == 2);
    994958    rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->aPics[0].hIoPorts0, picIOPortWrite, picIOPortRead, (void *)0);
    995959    AssertRCReturn(rc, VERR_INTERNAL_ERROR_2);
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