VirtualBox

Changeset 81979 in vbox


Ignore:
Timestamp:
Nov 19, 2019 9:55:09 AM (5 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
134777
Message:

DevDMA: Use devhlp for CFGM and SSM. bugref:9218

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/PC/DevDMA.cpp

    r81591 r81979  
    130130/* Complete DMA state information. */
    131131typedef struct {
     132    DMAControl              DMAC[2];    /* Two DMA controllers. */
    132133    PPDMDEVINSR3            pDevIns;    /* Device instance. */
    133134    R3PTRTYPE(PCPDMDMACHLP) pHlp;       /* PDM DMA helpers. */
    134     DMAControl              DMAC[2];    /* Two DMA controllers. */
    135     bool                    fRZEnabled;
    136     uint8_t                 abPadding[7];
    137 } DMAState;
     135} DMAState, DMASTATE;
     136/** Pointer to the shared DMA state information. */
     137typedef DMASTATE *PDMASTATE;
    138138
    139139/* DMA command register bits. */
    … …  
    638638static DECLCALLBACK(bool) dmaRun(PPDMDEVINS pDevIns)
    639639{
    640     DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
     640    DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
    641641    DMAControl  *dc;
    642642    int         ctlidx, chidx, mask;
    … …  
    670670                                      PFNDMATRANSFERHANDLER pfnTransferHandler, void *pvUser)
    671671{
    672     DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
     672    DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
    673673    DMAChannel  *ch = &pThis->DMAC[DMACH2C(uChannel)].ChState[uChannel & 3];
    674674
    … …  
    721721                                            void *pvBuffer, uint32_t off, uint32_t cbBlock)
    722722{
    723     DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
     723    DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
    724724    DMAControl  *dc = &pThis->DMAC[DMACH2C(uChannel)];
    725725    DMAChannel  *ch = &dc->ChState[uChannel & 3];
    … …  
    757757                                             const void *pvBuffer, uint32_t off, uint32_t cbBlock)
    758758{
    759     DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
     759    DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
    760760    DMAControl  *dc = &pThis->DMAC[DMACH2C(uChannel)];
    761761    DMAChannel  *ch = &dc->ChState[uChannel & 3];
    … …  
    801801static DECLCALLBACK(void) dmaSetDREQ(PPDMDEVINS pDevIns, unsigned uChannel, unsigned uLevel)
    802802{
    803     DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
     803    DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
    804804    DMAControl  *dc = &pThis->DMAC[DMACH2C(uChannel)];
    805805    int         chidx;
    … …  
    821821static DECLCALLBACK(uint8_t) dmaGetChannelMode(PPDMDEVINS pDevIns, unsigned uChannel)
    822822{
    823     DMAState *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
     823    PDMASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
    824824
    825825    LogFlow(("dmaGetChannelMode: pThis=%p uChannel=%u\n", pThis, uChannel));
    … …  
    837837static DECLCALLBACK(void) dmaReset(PPDMDEVINS pDevIns)
    838838{
    839     DMAState *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
     839    PDMASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
    840840
    841841    LogFlow(("dmaReset: pThis=%p\n", pThis));
    … …  
    851851static int dmaIORegister(PPDMDEVINS pDevIns, bool fHighPage)
    852852{
    853     DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
     853    DMAState    *pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
    854854    DMAControl  *dc8   = &pThis->DMAC[0];
    855855    DMAControl  *dc16  = &pThis->DMAC[1];
    … …  
    886886    }
    887887
    888     if (pThis->fRZEnabled)
     888    if (pDevIns->fRCEnabled)
    889889    {
    890890        /*
    … …  
    920920            AssertLogRelRCReturn(rc, rc);
    921921        }
    922 
     922    }
     923    if (pDevIns->fR0Enabled)
     924    {
    923925        /*
    924926         * Ditto for ring-0.
    … …  
    958960}
    959961
    960 static void dmaSaveController(PSSMHANDLE pSSM, DMAControl *dc)
     962static void dmaSaveController(PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM, DMAControl *dc)
    961963{
    962964    int         chidx;
    963965
    964966    /* Save controller state... */
    965     SSMR3PutU8(pSSM, dc->u8Command);
    966     SSMR3PutU8(pSSM, dc->u8Mask);
    967     SSMR3PutU8(pSSM, dc->fHiByte);
    968     SSMR3PutU32(pSSM, dc->is16bit);
    969     SSMR3PutU8(pSSM, dc->u8Status);
    970     SSMR3PutU8(pSSM, dc->u8Temp);
    971     SSMR3PutU8(pSSM, dc->u8ModeCtr);
    972     SSMR3PutMem(pSSM, &dc->au8Page, sizeof(dc->au8Page));
    973     SSMR3PutMem(pSSM, &dc->au8PageHi, sizeof(dc->au8PageHi));
     967    pHlp->pfnSSMPutU8(pSSM, dc->u8Command);
     968    pHlp->pfnSSMPutU8(pSSM, dc->u8Mask);
     969    pHlp->pfnSSMPutU8(pSSM, dc->fHiByte);
     970    pHlp->pfnSSMPutU32(pSSM, dc->is16bit);
     971    pHlp->pfnSSMPutU8(pSSM, dc->u8Status);
     972    pHlp->pfnSSMPutU8(pSSM, dc->u8Temp);
     973    pHlp->pfnSSMPutU8(pSSM, dc->u8ModeCtr);
     974    pHlp->pfnSSMPutMem(pSSM, &dc->au8Page, sizeof(dc->au8Page));
     975    pHlp->pfnSSMPutMem(pSSM, &dc->au8PageHi, sizeof(dc->au8PageHi));
    974976
    975977    /* ...and all four of its channels. */
    … …  
    978980        DMAChannel  *ch = &dc->ChState[chidx];
    979981
    980         SSMR3PutU16(pSSM, ch->u16CurAddr);
    981         SSMR3PutU16(pSSM, ch->u16CurCount);
    982         SSMR3PutU16(pSSM, ch->u16BaseAddr);
    983         SSMR3PutU16(pSSM, ch->u16BaseCount);
    984         SSMR3PutU8(pSSM, ch->u8Mode);
    985     }
    986 }
    987 
    988 static int dmaLoadController(PSSMHANDLE pSSM, DMAControl *dc, int version)
     982        pHlp->pfnSSMPutU16(pSSM, ch->u16CurAddr);
     983        pHlp->pfnSSMPutU16(pSSM, ch->u16CurCount);
     984        pHlp->pfnSSMPutU16(pSSM, ch->u16BaseAddr);
     985        pHlp->pfnSSMPutU16(pSSM, ch->u16BaseCount);
     986        pHlp->pfnSSMPutU8(pSSM, ch->u8Mode);
     987    }
     988}
     989
     990static int dmaLoadController(PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM, DMAControl *dc, int version)
    989991{
    990992    uint8_t     u8val;
    … …  
    992994    int         chidx;
    993995
    994     SSMR3GetU8(pSSM, &dc->u8Command);
    995     SSMR3GetU8(pSSM, &dc->u8Mask);
    996     SSMR3GetU8(pSSM, &u8val);
     996    pHlp->pfnSSMGetU8(pSSM, &dc->u8Command);
     997    pHlp->pfnSSMGetU8(pSSM, &dc->u8Mask);
     998    pHlp->pfnSSMGetU8(pSSM, &u8val);
    997999    dc->fHiByte = !!u8val;
    998     SSMR3GetU32(pSSM, &dc->is16bit);
     1000    pHlp->pfnSSMGetU32(pSSM, &dc->is16bit);
    9991001    if (version > DMA_SAVESTATE_OLD)
    10001002    {
    1001         SSMR3GetU8(pSSM, &dc->u8Status);
    1002         SSMR3GetU8(pSSM, &dc->u8Temp);
    1003         SSMR3GetU8(pSSM, &dc->u8ModeCtr);
    1004         SSMR3GetMem(pSSM, &dc->au8Page, sizeof(dc->au8Page));
    1005         SSMR3GetMem(pSSM, &dc->au8PageHi, sizeof(dc->au8PageHi));
     1003        pHlp->pfnSSMGetU8(pSSM, &dc->u8Status);
     1004        pHlp->pfnSSMGetU8(pSSM, &dc->u8Temp);
     1005        pHlp->pfnSSMGetU8(pSSM, &dc->u8ModeCtr);
     1006        pHlp->pfnSSMGetMem(pSSM, &dc->au8Page, sizeof(dc->au8Page));
     1007        pHlp->pfnSSMGetMem(pSSM, &dc->au8PageHi, sizeof(dc->au8PageHi));
    10061008    }
    10071009
    … …  
    10131015        {
    10141016            /* Convert from 17-bit to 16-bit format. */
    1015             SSMR3GetU32(pSSM, &u32val);
     1017            pHlp->pfnSSMGetU32(pSSM, &u32val);
    10161018            ch->u16CurAddr = u32val >> dc->is16bit;
    1017             SSMR3GetU32(pSSM, &u32val);
     1019            pHlp->pfnSSMGetU32(pSSM, &u32val);
    10181020            ch->u16CurCount = u32val >> dc->is16bit;
    10191021        }
    10201022        else
    10211023        {
    1022             SSMR3GetU16(pSSM, &ch->u16CurAddr);
    1023             SSMR3GetU16(pSSM, &ch->u16CurCount);
     1024            pHlp->pfnSSMGetU16(pSSM, &ch->u16CurAddr);
     1025            pHlp->pfnSSMGetU16(pSSM, &ch->u16CurCount);
    10241026        }
    1025         SSMR3GetU16(pSSM, &ch->u16BaseAddr);
    1026         SSMR3GetU16(pSSM, &ch->u16BaseCount);
    1027         SSMR3GetU8(pSSM, &ch->u8Mode);
     1027        pHlp->pfnSSMGetU16(pSSM, &ch->u16BaseAddr);
     1028        pHlp->pfnSSMGetU16(pSSM, &ch->u16BaseCount);
     1029        pHlp->pfnSSMGetU8(pSSM, &ch->u8Mode);
    10281030        /* Convert from old save state. */
    10291031        if (version == DMA_SAVESTATE_OLD)
    10301032        {
    10311033            /* Remap page register contents. */
    1032             SSMR3GetU8(pSSM, &u8val);
     1034            pHlp->pfnSSMGetU8(pSSM, &u8val);
    10331035            dc->au8Page[DMACX2PG(chidx)] = u8val;
    1034             SSMR3GetU8(pSSM, &u8val);
     1036            pHlp->pfnSSMGetU8(pSSM, &u8val);
    10351037            dc->au8PageHi[DMACX2PG(chidx)] = u8val;
    10361038            /* Throw away dack, eop. */
    1037             SSMR3GetU8(pSSM, &u8val);
    1038             SSMR3GetU8(pSSM, &u8val);
     1039            pHlp->pfnSSMGetU8(pSSM, &u8val);
     1040            pHlp->pfnSSMGetU8(pSSM, &u8val);
    10391041        }
    10401042    }
    … …  
    10451047static DECLCALLBACK(int) dmaSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
    10461048{
    1047     DMAState *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
    1048 
    1049     dmaSaveController(pSSM, &pThis->DMAC[0]);
    1050     dmaSaveController(pSSM, &pThis->DMAC[1]);
     1049    PDMASTATE       pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
     1050    PCPDMDEVHLPR3   pHlp  = pDevIns->pHlpR3;
     1051
     1052    dmaSaveController(pHlp, pSSM, &pThis->DMAC[0]);
     1053    dmaSaveController(pHlp, pSSM, &pThis->DMAC[1]);
    10511054    return VINF_SUCCESS;
    10521055}
    … …  
    10551058static DECLCALLBACK(int) dmaLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
    10561059{
    1057     DMAState *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
     1060    PDMASTATE       pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
     1061    PCPDMDEVHLPR3   pHlp  = pDevIns->pHlpR3;
    10581062
    10591063    AssertMsgReturn(uVersion <= DMA_SAVESTATE_CURRENT, ("%d\n", uVersion), VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
    10601064    Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
    10611065
    1062     dmaLoadController(pSSM, &pThis->DMAC[0], uVersion);
    1063     return dmaLoadController(pSSM, &pThis->DMAC[1], uVersion);
     1066    dmaLoadController(pHlp, pSSM, &pThis->DMAC[0], uVersion);
     1067    return dmaLoadController(pHlp, pSSM, &pThis->DMAC[1], uVersion);
    10641068}
    10651069
    … …  
    10701074{
    10711075    PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
     1076    PDMASTATE       pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE);
     1077    PCPDMDEVHLPR3   pHlp  = pDevIns->pHlpR3;
    10721078    RT_NOREF(iInstance);
    1073     DMAState *pThis = PDMDEVINS_2_DATA(pDevIns, DMAState *);
    10741079
    10751080    /*
    … …  
    10791084
    10801085    /*
    1081      * Validate configuration.
     1086     * Validate and read the configuration.
    10821087     */
    1083     if (!CFGMR3AreValuesValid(pCfg, "RZEnabled\0"
    1084                                     "\0")) /* "HighPageEnable\0")) */
    1085         return VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES;
    1086 
    1087     bool        bHighPage = false;
    1088 #if 0
    1089     rc = CFGMR3QueryBool(pCfg, "HighPageEnable", &bHighPage);
    1090     if (RT_FAILURE (rc))
    1091         return rc;
    1092 #endif
    1093 
    1094     int rc = CFGMR3QueryBoolDef(pCfg, "RZEnabled", &pThis->fRZEnabled, true);
     1088    PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "HighPageEnable", "");
     1089
     1090    bool fHighPage = false;
     1091    int rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "HighPageEnable", &fHighPage, false);
     1092    AssertReturn(rc, rc);
     1093
     1094    /*
     1095     * Register I/O callbacks.
     1096     */
     1097    rc = dmaIORegister(pDevIns, fHighPage);
    10951098    AssertLogRelRCReturn(rc, rc);
    10961099
    1097     rc = dmaIORegister(pDevIns, bHighPage);
    1098     AssertLogRelRCReturn(rc, rc);
    1099 
     1100    /*
     1101     * Reset controller state.
     1102     */
    11001103    dmaReset(pDevIns);
    11011104
     1105    /*
     1106     * Register ourselves with PDM as the DMA controller.
     1107     */
    11021108    PDMDMACREG Reg;
    11031109    Reg.u32Version        = PDM_DMACREG_VERSION;
    … …  
    11101116
    11111117    rc = PDMDevHlpDMACRegister(pDevIns, &Reg, &pThis->pHlp);
    1112     if (RT_FAILURE (rc))
    1113         return rc;
    1114 
     1118    AssertReturn(rc, rc);
     1119
     1120    /*
     1121     * Register the saved state.
     1122     */
    11151123    rc = PDMDevHlpSSMRegister(pDevIns, DMA_SAVESTATE_CURRENT, sizeof(*pThis), dmaSaveExec, dmaLoadExec);
    1116     if (RT_FAILURE(rc))
    1117         return rc;
     1124    AssertReturn(rc, rc);
    11181125
    11191126    return VINF_SUCCESS;
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