VirtualBox

Changeset 82009 in vbox


Ignore:
Timestamp:
Nov 19, 2019 11:04:49 PM (5 years ago)
Author:
vboxsync
Message:

DevACPI: Started converting I/O port registrations. bugref:9218

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/PC/DevACPI.cpp

    r81996 r82009  
    477477    uint32_t            uPmTimeB;
    478478    uint32_t            Alignment5;
     479
     480    /** @name PM1a, PM timer and GPE0 I/O ports - mapped/unmapped as a group.
     481     *  @{ */
     482    IOMIOPORTHANDLE     hIoPortPm1aEn;
     483    IOMIOPORTHANDLE     hIoPortPm1aSts;
     484    IOMIOPORTHANDLE     hIoPortPm1aCtl;
     485    IOMIOPORTHANDLE     hIoPortPmTimer;
     486    IOMIOPORTHANDLE     hIoPortGpe0En;
     487    IOMIOPORTHANDLE     hIoPortGpe0Sts;
     488    /** @} */
     489
    479490} ACPIState, ACPISTATE;
    480491/** Pointer to the shared ACPI device state. */
     
    766777*   Internal Functions                                                                                                           *
    767778*********************************************************************************************************************************/
    768 RT_C_DECLS_BEGIN
    769 PDMBOTHCBDECL(int) acpiPMTmrRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb);
    770 RT_C_DECLS_END
    771779#ifdef IN_RING3
    772780static int acpiR3PlantTables(PPDMDEVINS pDevIns, ACPIState *pThis);
     
    866874 * @returns Strict VBox status code.
    867875 */
    868 static int acpiR3DoPowerOff(PPDMDEVINS pDevIns)
    869 {
    870     int rc = PDMDevHlpVMPowerOff(pDevIns);
     876static VBOXSTRICTRC acpiR3DoPowerOff(PPDMDEVINS pDevIns)
     877{
     878    VBOXSTRICTRC rc = PDMDevHlpVMPowerOff(pDevIns);
    871879    AssertRC(rc);
    872880    return rc;
     
    880888 * @returns Strict VBox status code.
    881889 */
    882 static int acpiR3DoSleep(PPDMDEVINS pDevIns, ACPIState *pThis)
     890static VBOXSTRICTRC acpiR3DoSleep(PPDMDEVINS pDevIns, ACPIState *pThis)
    883891{
    884892    /* We must set WAK_STS on resume (includes restore) so the guest knows that
    885893       we've woken up and can continue executing code.  The guest is probably
    886894       reading the PMSTS register in a loop to check this. */
    887     int rc;
     895    VBOXSTRICTRC rc;
    888896    pThis->fSetWakeupOnResume = true;
    889897    if (pThis->fSuspendToSavedState)
     
    12061214 * @callback_method_impl{FNIOMIOPORTOUT, Battery status index}
    12071215 */
    1208 PDMBOTHCBDECL(int) acpiR3BatIndexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    1209 {
     1216PDMBOTHCBDECL(int) acpiR3BatIndexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     1217{
     1218    RT_NOREF(pvUser, offPort);
    12101219    Log(("acpiR3BatIndexWrite: %#x (%#x)\n", u32, u32 >> 2));
    12111220    if (cb != 4)
    1212         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
    1213 
    1214     ACPIState *pThis = (ACPIState *)pvUser;
     1221        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
     1222
     1223    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    12151224    DEVACPI_LOCK_R3(pDevIns, pThis);
    12161225
     
    12321241 * @callback_method_impl{FNIOMIOPORTIN, Battery status data}
    12331242 */
    1234 PDMBOTHCBDECL(int) acpiR3BatDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    1235 {
     1243PDMBOTHCBDECL(int) acpiR3BatDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     1244{
     1245    RT_NOREF(pvUser, offPort);
    12361246    if (cb != 4)
    12371247        return VERR_IOM_IOPORT_UNUSED;
    12381248
    1239     ACPIState *pThis = (ACPIState *)pvUser;
     1249    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    12401250    DEVACPI_LOCK_R3(pDevIns, pThis);
    12411251
     
    12751285
    12761286        default:
    1277             rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u idx=%u\n", cb, Port, pThis->uBatteryIndex);
     1287            rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u idx=%u\n", cb, offPort, pThis->uBatteryIndex);
    12781288            *pu32 = UINT32_MAX;
    12791289            break;
     
    12871297 * @callback_method_impl{FNIOMIOPORTOUT, System info index}
    12881298 */
    1289 PDMBOTHCBDECL(int) acpiR3SysInfoIndexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    1290 {
     1299PDMBOTHCBDECL(int) acpiR3SysInfoIndexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     1300{
     1301    RT_NOREF(pvUser, offPort);
    12911302    Log(("acpiR3SysInfoIndexWrite: %#x (%#x)\n", u32, u32 >> 2));
    12921303    if (cb != 4)
    1293         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
    1294 
    1295     ACPIState *pThis = (ACPIState *)pvUser;
     1304        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
     1305
     1306    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    12961307    DEVACPI_LOCK_R3(pDevIns, pThis);
    12971308
     
    13191330 * @callback_method_impl{FNIOMIOPORTIN, System info data}
    13201331 */
    1321 PDMBOTHCBDECL(int) acpiR3SysInfoDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    1322 {
     1332PDMBOTHCBDECL(int) acpiR3SysInfoDataRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     1333{
     1334    RT_NOREF(pvUser, offPort);
    13231335    if (cb != 4)
    13241336        return VERR_IOM_IOPORT_UNUSED;
    13251337
    1326     ACPIState *pThis = (ACPIState *)pvUser;
     1338    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    13271339    DEVACPI_LOCK_R3(pDevIns, pThis);
    13281340
     
    15031515        default:
    15041516            *pu32 = UINT32_MAX;
    1505             rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u idx=%u\n", cb, Port, pThis->uBatteryIndex);
     1517            rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u idx=%u\n", cb, offPort, pThis->uBatteryIndex);
    15061518            break;
    15071519    }
     
    15151527 * @callback_method_impl{FNIOMIOPORTOUT, System info data}
    15161528 */
    1517 PDMBOTHCBDECL(int) acpiR3SysInfoDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    1518 {
    1519     ACPIState *pThis = (ACPIState *)pvUser;
     1529PDMBOTHCBDECL(int) acpiR3SysInfoDataWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     1530{
     1531    RT_NOREF(pvUser, offPort);
     1532    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    15201533    if (cb != 4)
    1521         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x idx=%u\n", cb, Port, u32, pThis->uSystemInfoIndex);
     1534        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x idx=%u\n", cb, offPort, u32, pThis->uSystemInfoIndex);
    15221535
    15231536    DEVACPI_LOCK_R3(pDevIns, pThis);
    1524     Log(("addr=%#x cb=%d u32=%#x si=%#x\n", Port, cb, u32, pThis->uSystemInfoIndex));
     1537    Log(("addr=%#x cb=%d u32=%#x si=%#x\n", offPort, cb, u32, pThis->uSystemInfoIndex));
    15251538
    15261539    int rc = VINF_SUCCESS;
     
    15491562
    15501563        default:
    1551             rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x idx=%u\n", cb, Port, u32, pThis->uSystemInfoIndex);
     1564            rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x idx=%u\n", cb, offPort, u32, pThis->uSystemInfoIndex);
    15521565            break;
    15531566    }
     
    15581571
    15591572/**
    1560  * @callback_method_impl{FNIOMIOPORTIN, PM1a Enable}
    1561  */
    1562 PDMBOTHCBDECL(int) acpiR3Pm1aEnRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    1563 {
    1564     NOREF(pDevIns); NOREF(Port);
     1573 * @callback_method_impl{FNIOMIOPORTNEWIN, PM1a Enable}
     1574 */
     1575static DECLCALLBACK(VBOXSTRICTRC) acpiR3Pm1aEnRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     1576{
     1577    RT_NOREF(offPort, pvUser);
    15651578    if (cb != 2)
    15661579        return VERR_IOM_IOPORT_UNUSED;
    15671580
    1568     ACPIState *pThis = (ACPIState *)pvUser;
     1581    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    15691582    DEVACPI_LOCK_R3(pDevIns, pThis);
    15701583
     
    15771590
    15781591/**
    1579  * @callback_method_impl{FNIOMIOPORTOUT, PM1a Enable}
    1580  */
    1581 PDMBOTHCBDECL(int) acpiR3PM1aEnWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    1582 {
     1592 * @callback_method_impl{FNIOMIOPORTNEWOUT, PM1a Enable}
     1593 */
     1594static DECLCALLBACK(VBOXSTRICTRC) acpiR3PM1aEnWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     1595{
     1596    RT_NOREF(offPort, pvUser);
    15831597    if (cb != 2 && cb != 4)
    1584         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
    1585 
    1586     ACPIState *pThis = (ACPIState *)pvUser;
     1598        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
     1599
     1600    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    15871601    DEVACPI_LOCK_R3(pDevIns, pThis);
    15881602
     
    15971611
    15981612/**
    1599  * @callback_method_impl{FNIOMIOPORTIN, PM1a Status}
    1600  */
    1601 PDMBOTHCBDECL(int) acpiR3Pm1aStsRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    1602 {
     1613 * @callback_method_impl{FNIOMIOPORTNEWIN, PM1a Status}
     1614 */
     1615static DECLCALLBACK(VBOXSTRICTRC) acpiR3Pm1aStsRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     1616{
     1617    RT_NOREF(offPort, pvUser);
    16031618    if (cb != 2)
    16041619    {
    1605         int rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u\n", cb, Port);
     1620        int rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u\n", cb, offPort);
    16061621        return rc == VINF_SUCCESS ? VERR_IOM_IOPORT_UNUSED : rc;
    16071622    }
    16081623
    1609     ACPIState *pThis = (ACPIState *)pvUser;
     1624    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    16101625    DEVACPI_LOCK_R3(pDevIns, pThis);
    16111626
     
    16181633
    16191634/**
    1620  * @callback_method_impl{FNIOMIOPORTOUT, PM1a Status}
    1621  */
    1622 PDMBOTHCBDECL(int) acpiR3PM1aStsWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    1623 {
     1635 * @callback_method_impl{FNIOMIOPORTNEWOUT, PM1a Status}
     1636 */
     1637static DECLCALLBACK(VBOXSTRICTRC) acpiR3PM1aStsWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     1638{
     1639    RT_NOREF(offPort, pvUser);
    16241640    if (cb != 2 && cb != 4)
    1625         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
    1626 
    1627     ACPIState *pThis = (ACPIState *)pvUser;
     1641        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
     1642
     1643    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    16281644    DEVACPI_LOCK_R3(pDevIns, pThis);
    16291645
     
    16401656
    16411657/**
    1642  * @callback_method_impl{FNIOMIOPORTIN, PM1a Control}
    1643  */
    1644 PDMBOTHCBDECL(int) acpiR3Pm1aCtlRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    1645 {
     1658 * @callback_method_impl{FNIOMIOPORTNEWIN, PM1a Control}
     1659 */
     1660static DECLCALLBACK(VBOXSTRICTRC) acpiR3Pm1aCtlRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     1661{
     1662    RT_NOREF(offPort, pvUser);
    16461663    if (cb != 2)
    16471664    {
    1648         int rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u\n", cb, Port);
     1665        int rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u\n", cb, offPort);
    16491666        return rc == VINF_SUCCESS ? VERR_IOM_IOPORT_UNUSED : rc;
    16501667    }
    16511668
    1652     ACPIState *pThis = (ACPIState *)pvUser;
     1669    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    16531670    DEVACPI_LOCK_R3(pDevIns, pThis);
    16541671
     
    16611678
    16621679/**
    1663  * @callback_method_impl{FNIOMIOPORTOUT, PM1a Control}
    1664  */
    1665 PDMBOTHCBDECL(int) acpiR3PM1aCtlWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    1666 {
     1680 * @callback_method_impl{FNIOMIOPORTNEWOUT, PM1a Control}
     1681 */
     1682static DECLCALLBACK(VBOXSTRICTRC) acpiR3PM1aCtlWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     1683{
     1684    RT_NOREF(offPort, pvUser);
    16671685    if (cb != 2 && cb != 4)
    1668         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
    1669 
    1670     ACPIState *pThis = (ACPIState *)pvUser;
     1686        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
     1687
     1688    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    16711689    DEVACPI_LOCK_R3(pDevIns, pThis);
    16721690
     
    16751693    pThis->pm1a_ctl = u32 & ~(RSR_CNT | IGN_CNT);
    16761694
    1677     int rc = VINF_SUCCESS;
     1695    VBOXSTRICTRC rc = VINF_SUCCESS;
    16781696    uint32_t const uSleepState = (pThis->pm1a_ctl >> SLP_TYPx_SHIFT) & SLP_TYPx_MASK;
    16791697    if (uSleepState != pThis->uSleepState)
     
    17241742
    17251743/**
    1726  * @callback_method_impl{FNIOMIOPORTIN, PMTMR}
     1744 * @callback_method_impl{FNIOMIOPORTNEWIN, PMTMR}
    17271745 *
    1728  * @remarks Only I/O port currently implemented in all contexts.
    1729  */
    1730 PDMBOTHCBDECL(int) acpiPMTmrRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    1731 {
     1746 * @remarks The only I/O port currently implemented in all contexts.
     1747 */
     1748static DECLCALLBACK(VBOXSTRICTRC) acpiPMTmrRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     1749{
     1750    RT_NOREF(offPort, pvUser);
    17321751    if (cb != 4)
    17331752        return VERR_IOM_IOPORT_UNUSED;
    1734 
    1735     PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    17361753
    17371754    /*
     
    17401757     * as well as and to prevent uPmTimerVal from being updated during read.
    17411758     */
    1742 
    1743     int rc = PDMDevHlpTimerLock(pDevIns, pThis->hPmTimer, VINF_IOM_R3_IOPORT_READ);
     1759    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
     1760    VBOXSTRICTRC rc = PDMDevHlpTimerLock(pDevIns, pThis->hPmTimer, VINF_IOM_R3_IOPORT_READ);
    17441761    if (rc == VINF_SUCCESS)
    17451762    {
     
    17751792            PDMDevHlpTimerUnlock(pDevIns, pThis->hPmTimer);
    17761793    }
    1777     NOREF(pvUser); NOREF(Port);
    17781794    return rc;
    17791795}
     
    17811797#ifdef IN_RING3
    17821798
    1783 static DECLCALLBACK(void) acpiR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
    1784 {
    1785     RT_NOREF(pszArgs);
     1799/**
     1800 * @callback_method_impl{FNIOMIOPORTIN, GPE0 Status}
     1801 */
     1802static DECLCALLBACK(VBOXSTRICTRC) acpiR3Gpe0StsRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     1803{
     1804    RT_NOREF(offPort, pvUser);
     1805    if (cb != 1)
     1806    {
     1807        int rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u\n", cb, offPort);
     1808        return rc == VINF_SUCCESS ? VERR_IOM_IOPORT_UNUSED : rc;
     1809    }
     1810
    17861811    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    1787     pHlp->pfnPrintf(pHlp,
    1788                     "timer: old=%08RX32, current=%08RX32\n", pThis->uPmTimeA, pThis->uPmTimeB);
    1789 }
    1790 
    1791 /**
    1792  * @callback_method_impl{FNIOMIOPORTIN, GPE0 Status}
    1793  */
    1794 PDMBOTHCBDECL(int) acpiR3Gpe0StsRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    1795 {
    1796     if (cb != 1)
    1797     {
    1798         int rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u\n", cb, Port);
    1799         return rc == VINF_SUCCESS ? VERR_IOM_IOPORT_UNUSED : rc;
    1800     }
    1801 
    1802     ACPIState *pThis = (ACPIState *)pvUser;
    18031812    DEVACPI_LOCK_R3(pDevIns, pThis);
    18041813
     
    18131822 * @callback_method_impl{FNIOMIOPORTOUT, GPE0 Status}
    18141823 */
    1815 PDMBOTHCBDECL(int) acpiR3Gpe0StsWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    1816 {
     1824static DECLCALLBACK(VBOXSTRICTRC) acpiR3Gpe0StsWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     1825{
     1826    RT_NOREF(offPort, pvUser);
    18171827    if (cb != 1)
    1818         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
    1819 
    1820     ACPIState *pThis = (ACPIState *)pvUser;
     1828        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
     1829
     1830    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    18211831    DEVACPI_LOCK_R3(pDevIns, pThis);
    18221832
     
    18321842 * @callback_method_impl{FNIOMIOPORTIN, GPE0 Enable}
    18331843 */
    1834 PDMBOTHCBDECL(int) acpiR3Gpe0EnRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    1835 {
     1844static DECLCALLBACK(VBOXSTRICTRC) acpiR3Gpe0EnRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     1845{
     1846    RT_NOREF(offPort, pvUser);
    18361847    if (cb != 1)
    18371848    {
    1838         int rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u\n", cb, Port);
     1849        int rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u\n", cb, offPort);
    18391850        return rc == VINF_SUCCESS ? VERR_IOM_IOPORT_UNUSED : rc;
    18401851    }
    18411852
    1842     ACPIState *pThis = (ACPIState *)pvUser;
     1853    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    18431854    DEVACPI_LOCK_R3(pDevIns, pThis);
    18441855
     
    18531864 * @callback_method_impl{FNIOMIOPORTOUT, GPE0 Enable}
    18541865 */
    1855 PDMBOTHCBDECL(int) acpiR3Gpe0EnWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    1856 {
     1866static DECLCALLBACK(VBOXSTRICTRC) acpiR3Gpe0EnWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     1867{
     1868    RT_NOREF(offPort, pvUser);
    18571869    if (cb != 1)
    1858         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
    1859 
    1860     ACPIState *pThis = (ACPIState *)pvUser;
     1870        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
     1871
     1872    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    18611873    DEVACPI_LOCK_R3(pDevIns, pThis);
    18621874
     
    18711883 * @callback_method_impl{FNIOMIOPORTOUT, SMI_CMD}
    18721884 */
    1873 PDMBOTHCBDECL(int) acpiR3SmiWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    1874 {
     1885PDMBOTHCBDECL(int) acpiR3SmiWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     1886{
     1887    RT_NOREF(offPort, pvUser);
    18751888    Log(("acpiR3SmiWrite %#x\n", u32));
    18761889    if (cb != 1)
    1877         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
    1878 
    1879     ACPIState *pThis = (ACPIState *)pvUser;
     1890        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
     1891
     1892    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    18801893    DEVACPI_LOCK_R3(pDevIns, pThis);
    18811894
     
    18941907 * @callback_method_impl{FNIOMIOPORTOUT, ACPI_RESET_BLK}
    18951908 */
    1896 PDMBOTHCBDECL(int) acpiR3ResetWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    1897 {
     1909PDMBOTHCBDECL(int) acpiR3ResetWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     1910{
     1911    RT_NOREF(offPort, pvUser);
    18981912    Log(("acpiR3ResetWrite: %#x\n", u32));
    18991913    NOREF(pvUser);
    19001914    if (cb != 1)
    1901         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
     1915        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
    19021916
    19031917    /* No state locking required. */
     
    19191933 * @callback_method_impl{FNIOMIOPORTOUT, Debug hex value logger}
    19201934 */
    1921 PDMBOTHCBDECL(int) acpiR3DhexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
     1935PDMBOTHCBDECL(int) acpiR3DhexWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
    19221936{
    19231937    NOREF(pvUser);
     
    19341948            break;
    19351949        default:
    1936             return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
     1950            return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
    19371951    }
    19381952    return VINF_SUCCESS;
     
    19421956 * @callback_method_impl{FNIOMIOPORTOUT, Debug char logger}
    19431957 */
    1944 PDMBOTHCBDECL(int) acpiR3DchrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
     1958PDMBOTHCBDECL(int) acpiR3DchrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
    19451959{
    19461960    NOREF(pvUser);
     
    19511965            break;
    19521966        default:
    1953             return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
     1967            return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
    19541968    }
    19551969    return VINF_SUCCESS;
     
    19571971
    19581972# endif /* DEBUG_ACPI */
     1973
     1974/**
     1975 * @callback_method_impl{FNDBGFHANDLERDEV}
     1976 */
     1977static DECLCALLBACK(void) acpiR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
     1978{
     1979    RT_NOREF(pszArgs);
     1980    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
     1981    pHlp->pfnPrintf(pHlp,
     1982                    "timer: old=%08RX32, current=%08RX32\n", pThis->uPmTimeA, pThis->uPmTimeB);
     1983}
    19591984
    19601985/**
     
    19912016
    19922017/**
    1993  * Called by acpiR3LoadState and acpiR3UpdatePmHandlers to register the PM1a, PM
     2018 * Called by acpiR3LoadState and acpiR3UpdatePmHandlers to map the PM1a, PM
    19942019 * timer and GPE0 I/O ports.
    19952020 *
     
    19982023 * @param   pThis           The ACPI shared instance data.
    19992024 */
    2000 static int acpiR3RegisterPmHandlers(PPDMDEVINS pDevIns, ACPIState *pThis)
     2025static int acpiR3MapPmIoPorts(PPDMDEVINS pDevIns, ACPIState *pThis)
    20012026{
    20022027    if (pThis->uPmIoPortBase == 0)
    20032028        return VINF_SUCCESS;
    20042029
    2005 #define R(offset, cnt, writer, reader, description) \
    2006     do { \
    2007         int rc = PDMDevHlpIOPortRegister(pDevIns, acpiR3CalcPmPort(pThis, offset), cnt, pThis, writer, reader, \
    2008                                          NULL, NULL, description); \
    2009         if (RT_FAILURE(rc)) \
    2010             return rc; \
    2011     } while (0)
    2012 #define L       (GPE0_BLK_LEN / 2)
    2013 
    2014     R(PM1a_EVT_OFFSET+2, 1, acpiR3PM1aEnWrite,       acpiR3Pm1aEnRead,      "ACPI PM1a Enable");
    2015     R(PM1a_EVT_OFFSET,   1, acpiR3PM1aStsWrite,      acpiR3Pm1aStsRead,     "ACPI PM1a Status");
    2016     R(PM1a_CTL_OFFSET,   1, acpiR3PM1aCtlWrite,      acpiR3Pm1aCtlRead,     "ACPI PM1a Control");
    2017     R(PM_TMR_OFFSET,     1, NULL,                    acpiPMTmrRead,         "ACPI PM Timer");
    2018     R(GPE0_OFFSET + L,   L, acpiR3Gpe0EnWrite,       acpiR3Gpe0EnRead,      "ACPI GPE0 Enable");
    2019     R(GPE0_OFFSET,       L, acpiR3Gpe0StsWrite,      acpiR3Gpe0StsRead,     "ACPI GPE0 Status");
    2020 #undef L
    2021 #undef R
    2022 
    2023     /* register RC stuff */
    2024     if (pDevIns->fRCEnabled)
    2025     {
    2026         int rc = PDMDevHlpIOPortRegisterRC(pDevIns, acpiR3CalcPmPort(pThis, PM_TMR_OFFSET),
    2027                                            1, 0, NULL, "acpiPMTmrRead",
    2028                                            NULL, NULL, "ACPI PM Timer");
    2029         AssertRCReturn(rc, rc);
    2030     }
    2031 
    2032     /* register R0 stuff */
    2033     if (pDevIns->fR0Enabled)
    2034     {
    2035         int rc = PDMDevHlpIOPortRegisterR0(pDevIns, acpiR3CalcPmPort(pThis, PM_TMR_OFFSET),
    2036                                            1, 0, NULL, "acpiPMTmrRead",
    2037                                            NULL, NULL, "ACPI PM Timer");
    2038         AssertRCReturn(rc, rc);
    2039     }
     2030    int rc;
     2031    rc = PDMDevHlpIoPortMap(pDevIns, pThis->hIoPortPm1aSts, acpiR3CalcPmPort(pThis, PM1a_EVT_OFFSET));
     2032    AssertRCReturn(rc, rc);
     2033    rc = PDMDevHlpIoPortMap(pDevIns, pThis->hIoPortPm1aEn,  acpiR3CalcPmPort(pThis, PM1a_EVT_OFFSET + 2));
     2034    AssertRCReturn(rc, rc);
     2035    rc = PDMDevHlpIoPortMap(pDevIns, pThis->hIoPortPm1aCtl, acpiR3CalcPmPort(pThis, PM1a_CTL_OFFSET));
     2036    AssertRCReturn(rc, rc);
     2037    rc = PDMDevHlpIoPortMap(pDevIns, pThis->hIoPortPmTimer, acpiR3CalcPmPort(pThis, PM_TMR_OFFSET));
     2038    AssertRCReturn(rc, rc);
     2039    rc = PDMDevHlpIoPortMap(pDevIns, pThis->hIoPortGpe0Sts, acpiR3CalcPmPort(pThis, GPE0_OFFSET));
     2040    AssertRCReturn(rc, rc);
     2041    rc = PDMDevHlpIoPortMap(pDevIns, pThis->hIoPortGpe0En,  acpiR3CalcPmPort(pThis, GPE0_OFFSET + GPE0_BLK_LEN / 2));
    20402042
    20412043    return VINF_SUCCESS;
     
    20432045
    20442046/**
    2045  * Called by acpiR3LoadState and acpiR3UpdatePmHandlers to unregister the PM1a, PM
     2047 * Called by acpiR3LoadState and acpiR3UpdatePmHandlers to unmap the PM1a, PM
    20462048 * timer and GPE0 I/O ports.
    20472049 *
     
    20502052 * @param   pThis       The ACPI shared instance data.
    20512053 */
    2052 static int acpiR3UnregisterPmHandlers(PPDMDEVINS pDevIns, ACPIState *pThis)
    2053 {
    2054     if (pThis->uPmIoPortBase == 0)
    2055         return VINF_SUCCESS;
    2056 
    2057 #define U(offset, cnt) \
    2058     do { \
    2059         int rc = PDMDevHlpIOPortDeregister(pDevIns, acpiR3CalcPmPort(pThis, offset), cnt); \
    2060         AssertRCReturn(rc, rc); \
    2061     } while (0)
    2062 #define L       (GPE0_BLK_LEN / 2)
    2063 
    2064     U(PM1a_EVT_OFFSET+2, 1);
    2065     U(PM1a_EVT_OFFSET,   1);
    2066     U(PM1a_CTL_OFFSET,   1);
    2067     U(PM_TMR_OFFSET,     1);
    2068     U(GPE0_OFFSET + L,   L);
    2069     U(GPE0_OFFSET,       L);
    2070 #undef L
    2071 #undef U
    2072 
     2054static int acpiR3UnmapPmIoPorts(PPDMDEVINS pDevIns, ACPIState *pThis)
     2055{
     2056    if (pThis->uPmIoPortBase != 0)
     2057    {
     2058        int rc;
     2059        rc = PDMDevHlpIoPortUnmap(pDevIns, pThis->hIoPortPm1aSts);
     2060        AssertRCReturn(rc, rc);
     2061        rc = PDMDevHlpIoPortUnmap(pDevIns, pThis->hIoPortPm1aEn);
     2062        AssertRCReturn(rc, rc);
     2063        rc = PDMDevHlpIoPortUnmap(pDevIns, pThis->hIoPortPm1aCtl);
     2064        AssertRCReturn(rc, rc);
     2065        rc = PDMDevHlpIoPortUnmap(pDevIns, pThis->hIoPortPmTimer);
     2066        AssertRCReturn(rc, rc);
     2067        rc = PDMDevHlpIoPortUnmap(pDevIns, pThis->hIoPortGpe0Sts);
     2068        AssertRCReturn(rc, rc);
     2069        rc = PDMDevHlpIoPortUnmap(pDevIns, pThis->hIoPortGpe0En);
     2070        AssertRCReturn(rc, rc);
     2071    }
    20732072    return VINF_SUCCESS;
    20742073}
     
    20892088    if (NewIoPortBase != pThis->uPmIoPortBase)
    20902089    {
    2091         int rc = acpiR3UnregisterPmHandlers(pDevIns, pThis);
     2090        int rc = acpiR3UnmapPmIoPorts(pDevIns, pThis);
    20922091        if (RT_FAILURE(rc))
    20932092            return rc;
     
    20952094        pThis->uPmIoPortBase = NewIoPortBase;
    20962095
    2097         rc = acpiR3RegisterPmHandlers(pDevIns, pThis);
     2096        rc = acpiR3MapPmIoPorts(pDevIns, pThis);
    20982097        if (RT_FAILURE(rc))
    20992098            return rc;
     
    21122111 * @callback_method_impl{FNIOMIOPORTOUT, SMBus}
    21132112 */
    2114 PDMBOTHCBDECL(int) acpiR3SMBusWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    2115 {
    2116     ACPIState *pThis = (ACPIState *)pvUser;
    2117 
    2118     LogFunc(("Port=%#x u32=%#x cb=%u\n", Port, u32, cb));
    2119     uint8_t off = Port & 0x000f;
     2113PDMBOTHCBDECL(int) acpiR3SMBusWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     2114{
     2115    RT_NOREF(pvUser);
     2116    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
     2117
     2118    LogFunc(("offPort=%#x u32=%#x cb=%u\n", offPort, u32, cb));
     2119    uint8_t off = offPort & 0x000f;
    21202120    if (   (cb != 1 && off <= SMBSHDWCMD_OFF)
    21212121        || (cb != 2 && (off == SMBSLVEVT_OFF || off == SMBSLVDAT_OFF)))
    2122         return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d Port=%u u32=%#x\n", cb, Port, u32);
     2122        return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "cb=%d offPort=%u u32=%#x\n", cb, offPort, u32);
    21232123
    21242124    DEVACPI_LOCK_R3(pDevIns, pThis);
     
    22002200 * @callback_method_impl{FNIOMIOPORTIN, SMBus}
    22012201 */
    2202 PDMBOTHCBDECL(int) acpiR3SMBusRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    2203 {
    2204     RT_NOREF1(pDevIns);
    2205     ACPIState *pThis = (ACPIState *)pvUser;
     2202PDMBOTHCBDECL(int) acpiR3SMBusRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     2203{
     2204    RT_NOREF(pvUser);
     2205    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    22062206
    22072207    int rc = VINF_SUCCESS;
    2208     LogFunc(("Port=%#x cb=%u\n", Port, cb));
    2209     uint8_t off = Port & 0x000f;
     2208    LogFunc(("offPort=%#x cb=%u\n", offPort, cb));
     2209    uint8_t off = offPort & 0x000f;
    22102210    if (   (cb != 1 && off <= SMBSHDWCMD_OFF)
    22112211        || (cb != 2 && (off == SMBSLVEVT_OFF || off == SMBSLVDAT_OFF)))
     
    22602260
    22612261    DEVACPI_UNLOCK(pDevIns, pThis);
    2262     LogFunc(("Port=%#x u32=%#x cb=%u rc=%Rrc\n", Port, *pu32, cb, rc));
     2262    LogFunc(("offPort=%#x u32=%#x cb=%u rc=%Rrc\n", offPort, *pu32, cb, rc));
    22632263    return rc;
    22642264}
     
    25162516
    25172517    /*
    2518      * Unregister PM handlers, will register with actual base after state
     2518     * Unmap PM I/O ports, will remap it with the actual base after state
    25192519     * successfully loaded.
    25202520     */
    2521     int rc = acpiR3UnregisterPmHandlers(pDevIns, pThis);
     2521    int rc = acpiR3UnmapPmIoPorts(pDevIns, pThis);
    25222522    if (RT_FAILURE(rc))
    25232523        return rc;
     
    25572557        AssertLogRelMsgReturn(pThis->u8SMBusBlkIdx < RT_ELEMENTS(pThis->au8SMBusBlkDat),
    25582558                              ("%#x\n", pThis->u8SMBusBlkIdx), VERR_SSM_LOAD_CONFIG_MISMATCH);
    2559         rc = acpiR3RegisterPmHandlers(pDevIns, pThis);
     2559        rc = acpiR3MapPmIoPorts(pDevIns, pThis);
    25602560        if (RT_FAILURE(rc))
    25612561            return rc;
     
    39783978
    39793979    /*
    3980      * Register I/O ports.
     3980     * Register the PM I/O ports.  These can be unmapped and remapped.
    39813981     */
    3982     rc = acpiR3RegisterPmHandlers(pDevIns, pThis);
     3982    rc = PDMDevHlpIoPortCreateIsa(pDevIns,               1 /*cPorts*/,  acpiR3PM1aStsWrite, acpiR3Pm1aStsRead,  NULL /*pvUser*/,
     3983                                  "ACPI PM1a Status",  NULL /*paExtDesc*/, &pThis->hIoPortPm1aSts);
    39833984    AssertRCReturn(rc, rc);
    3984 
     3985    rc = PDMDevHlpIoPortCreateIsa(pDevIns,               1 /*cPorts*/,  acpiR3PM1aEnWrite,  acpiR3Pm1aEnRead,   NULL /*pvUser*/,
     3986                                  "ACPI PM1a Enable",  NULL /*paExtDesc*/, &pThis->hIoPortPm1aEn);
     3987    AssertRCReturn(rc, rc);
     3988    rc = PDMDevHlpIoPortCreateIsa(pDevIns,               1 /*cPorts*/,  acpiR3PM1aCtlWrite, acpiR3Pm1aCtlRead,  NULL /*pvUser*/,
     3989                                  "ACPI PM1a Control", NULL /*paExtDesc*/, &pThis->hIoPortPm1aCtl);
     3990    AssertRCReturn(rc, rc);
     3991    rc = PDMDevHlpIoPortCreateIsa(pDevIns,               1 /*cPorts*/,  NULL,               acpiPMTmrRead,      NULL /*pvUser*/,
     3992                                  "ACPI PM Timer",     NULL /*paExtDesc*/, &pThis->hIoPortPmTimer);
     3993    AssertRCReturn(rc, rc);
     3994    rc = PDMDevHlpIoPortCreateIsa(pDevIns, GPE0_BLK_LEN / 2 /*cPorts*/, acpiR3Gpe0StsWrite, acpiR3Gpe0StsRead,  NULL /*pvUser*/,
     3995                                  "ACPI GPE0 Status",  NULL /*paExtDesc*/, &pThis->hIoPortGpe0Sts);
     3996    AssertRCReturn(rc, rc);
     3997    rc = PDMDevHlpIoPortCreateIsa(pDevIns, GPE0_BLK_LEN / 2 /*cPorts*/, acpiR3Gpe0EnWrite,  acpiR3Gpe0EnRead,   NULL /*pvUser*/,
     3998                                  "ACPI GPE0 Enable",  NULL /*paExtDesc*/, &pThis->hIoPortGpe0En);
     3999    AssertRCReturn(rc, rc);
     4000    rc = acpiR3MapPmIoPorts(pDevIns, pThis);
     4001    AssertRCReturn(rc, rc);
     4002
     4003    /*
     4004     * Register the .. I/O ports.
     4005     */
    39854006    rc = acpiR3RegisterSMBusHandlers(pDevIns, pThis);
    39864007    AssertRCReturn(rc, rc);
    39874008
    3988 #define R(addr, cnt, writer, reader, description)       \
     4009    /*
     4010     * Register the .. I/O ports.
     4011     */
     4012#define R(a_uIoPort, a_cPorts, writer, reader, description)       \
    39894013    do { \
    3990         rc = PDMDevHlpIOPortRegister(pDevIns, addr, cnt, pThis, writer, reader, NULL, NULL, description); \
     4014        rc = PDMDevHlpIOPortRegister(pDevIns, (a_uIoPort), (a_cPorts), pThis, writer, reader, NULL, NULL, description); \
    39914015        AssertRCReturn(rc, rc); \
    39924016    } while (0)
     
    40964120{
    40974121    PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
    4098     //PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
     4122    PACPISTATE pThis = PDMDEVINS_2_DATA(pDevIns, PACPISTATE);
    40994123
    41004124    int rc = PDMDevHlpSetDeviceCritSect(pDevIns, PDMDevHlpCritSectGetNop(pDevIns));
     4125    AssertRCReturn(rc, rc);
     4126
     4127    /* Only the PM timer read port is handled directly in ring-0/raw-mode. */
     4128    rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPortPmTimer, NULL, acpiPMTmrRead, NULL);
    41014129    AssertRCReturn(rc, rc);
    41024130
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette