VirtualBox

Changeset 82062 in vbox for trunk/src/VBox/Devices


Ignore:
Timestamp:
Nov 21, 2019 2:39:22 AM (5 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
134867
Message:

DevVGA: Converting more I/O ports. bugref:9218

Location:
trunk/src/VBox/Devices/Graphics
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Graphics/DevVGA.cpp

    r82061 r82062  
    28742874/* -=-=-=-=-=- all contexts -=-=-=-=-=- */
    28752875
    2876 /**
    2877  * @callback_method_impl{FNIOMIOPORTOUT,Generic VGA OUT dispatcher.}
    2878  */
    2879 PDMBOTHCBDECL(int) vgaIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    2880 {
    2881     PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE);
    2882     Assert(PDMDevHlpCritSectIsOwner(pDevIns, pDevIns->CTX_SUFF(pCritSectRo)));
    2883 
    2884     NOREF(pvUser);
    2885     if (cb == 1)
    2886         vga_ioport_write(pThis, Port, u32);
    2887     else if (cb == 2)
    2888     {
    2889         vga_ioport_write(pThis, Port, u32 & 0xff);
    2890         vga_ioport_write(pThis, Port + 1, u32 >> 8);
    2891     }
    2892     return VINF_SUCCESS;
    2893 }
    2894 
    2895 
    2896 /**
    2897  * @callback_method_impl{FNIOMIOPORTOUT,Generic VGA IN dispatcher.}
    2898  */
    2899 PDMBOTHCBDECL(int) vgaIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    2900 {
    2901     PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE);
    2902     Assert(PDMDevHlpCritSectIsOwner(pDevIns, pDevIns->CTX_SUFF(pCritSectRo)));
    2903     NOREF(pvUser);
    2904 
    2905     int rc = VINF_SUCCESS;
    2906     if (cb == 1)
    2907         *pu32 = vga_ioport_read(pThis, Port);
    2908     else if (cb == 2)
    2909         *pu32 = vga_ioport_read(pThis, Port)
    2910              | (vga_ioport_read(pThis, Port + 1) << 8);
    2911     else
    2912         rc = VERR_IOM_IOPORT_UNUSED;
    2913     return rc;
     2876#define VGA_IOPORT_WRITE_PLACEHOLDER(a_uPort, a_cPorts) do {\
     2877        PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE); \
     2878        Assert(PDMDevHlpCritSectIsOwner(pDevIns, pDevIns->CTX_SUFF(pCritSectRo))); \
     2879        AssertCompile(RT_IS_POWER_OF_TWO(a_cPorts)); \
     2880        Assert((unsigned)offPort - (unsigned)(a_uPort) < (unsigned)(a_cPorts)); \
     2881        NOREF(pvUser); \
     2882        if (cb == 1) \
     2883            vga_ioport_write(pThis, offPort, u32); \
     2884        else if (cb == 2) \
     2885        { \
     2886            vga_ioport_write(pThis, offPort, u32 & 0xff); \
     2887            vga_ioport_write(pThis, offPort + 1, u32 >> 8); \
     2888        } \
     2889        return VINF_SUCCESS; \
     2890    } while (0)
     2891
     2892#define VGA_IOPORT_READ_PLACEHOLDER(a_uPort, a_cPorts) do {\
     2893        PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE); \
     2894        Assert(PDMDevHlpCritSectIsOwner(pDevIns, pDevIns->CTX_SUFF(pCritSectRo))); \
     2895        AssertCompile(RT_IS_POWER_OF_TWO(a_cPorts)); \
     2896        Assert((unsigned)offPort - (unsigned)(a_uPort) < (unsigned)(a_cPorts)); \
     2897        NOREF(pvUser); \
     2898        if (cb == 1) \
     2899            *pu32 = vga_ioport_read(pThis, offPort); \
     2900        else if (cb == 2) \
     2901        { \
     2902            uint32_t u32 = vga_ioport_read(pThis, offPort); \
     2903            u32 |= vga_ioport_read(pThis, offPort + 1) << 8; \
     2904            *pu32 = u32; \
     2905        } \
     2906        else \
     2907            return VERR_IOM_IOPORT_UNUSED; \
     2908        return VINF_SUCCESS; \
     2909    } while (0)
     2910
     2911/**
     2912 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3c0-0x3c1 Attribute Controller.}
     2913 */
     2914static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortArWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     2915{
     2916    VGA_IOPORT_WRITE_PLACEHOLDER(0x3c0, 2);
     2917}
     2918
     2919/**
     2920 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3c0-0x3c1 Attribute Controller.}
     2921 */
     2922static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortArRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     2923{
     2924    VGA_IOPORT_READ_PLACEHOLDER(0x3c0, 2);
     2925}
     2926
     2927
     2928/**
     2929 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3c2 Miscellaneous Register.}
     2930 */
     2931static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortMsrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     2932{
     2933    VGA_IOPORT_WRITE_PLACEHOLDER(0x3c2, 1);
     2934}
     2935
     2936/**
     2937 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3c2 Status register 0.}
     2938 */
     2939static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortSt00Read(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     2940{
     2941    VGA_IOPORT_READ_PLACEHOLDER(0x3c2, 1);
     2942}
     2943
     2944
     2945/**
     2946 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3c3 Unused.}
     2947 */
     2948static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortUnusedWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     2949{
     2950    VGA_IOPORT_WRITE_PLACEHOLDER(0x3c3, 1);
     2951}
     2952
     2953/**
     2954 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3c3 Unused.}
     2955 */
     2956static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortUnusedRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     2957{
     2958    VGA_IOPORT_READ_PLACEHOLDER(0x3c3, 1);
     2959}
     2960
     2961
     2962/**
     2963 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3c4-0x3c5 Sequencer.}
     2964 */
     2965static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortSrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     2966{
     2967    VGA_IOPORT_WRITE_PLACEHOLDER(0x3c4, 2);
     2968}
     2969
     2970/**
     2971 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3c4-0x3c5 Sequencer.}
     2972 */
     2973static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortSrRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     2974{
     2975    VGA_IOPORT_READ_PLACEHOLDER(0x3c4, 2);
     2976}
     2977
     2978
     2979/**
     2980 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3c6-0x3c9 DAC.}
     2981 */
     2982static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortDacWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     2983{
     2984    VGA_IOPORT_WRITE_PLACEHOLDER(0x3c6, 4);
     2985}
     2986
     2987/**
     2988 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3c6-0x3c9 DAC.}
     2989 */
     2990static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortDacRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     2991{
     2992    VGA_IOPORT_READ_PLACEHOLDER(0x3c6, 4);
     2993}
     2994
     2995
     2996/**
     2997 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3ca-0x3cd Graphics Position?}
     2998 */
     2999static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortPosWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     3000{
     3001    VGA_IOPORT_WRITE_PLACEHOLDER(0x3ca, 4);
     3002}
     3003
     3004/**
     3005 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3ca-0x3cd Graphics Position?}
     3006 */
     3007static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortPosRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     3008{
     3009    VGA_IOPORT_READ_PLACEHOLDER(0x3ca, 4);
     3010}
     3011
     3012
     3013/**
     3014 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3ce-0x3cf Graphics Controller.}
     3015 */
     3016static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortGrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     3017{
     3018    VGA_IOPORT_WRITE_PLACEHOLDER(0x3ce, 2);
     3019}
     3020
     3021/**
     3022 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3ca-0x3cf Graphics Controller.}
     3023 */
     3024static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortGrRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     3025{
     3026    VGA_IOPORT_READ_PLACEHOLDER(0x3ce, 2);
     3027}
     3028
     3029
     3030/**
     3031 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3b4-0x3b5 MDA CRT control.}
     3032 */
     3033static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortMdaCrtWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     3034{
     3035    /** @todo do vga_ioport_invalid here   */
     3036    VGA_IOPORT_WRITE_PLACEHOLDER(0x3b4, 2);
     3037}
     3038
     3039/**
     3040 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3b4-0x3b5 MDA CRT control.}
     3041 */
     3042static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortMdaCrtRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     3043{
     3044    /** @todo do vga_ioport_invalid here */
     3045    VGA_IOPORT_READ_PLACEHOLDER(0x3b4, 2);
     3046}
     3047
     3048
     3049/**
     3050 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3ba MDA feature/status.}
     3051 */
     3052static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortMdaFcrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     3053{
     3054    /** @todo do vga_ioport_invalid here   */
     3055    VGA_IOPORT_WRITE_PLACEHOLDER(0x3ba, 1);
     3056}
     3057
     3058/**
     3059 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3ba MDA feature/status.}
     3060 */
     3061static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortMdaStRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     3062{
     3063    /** @todo do vga_ioport_invalid here */
     3064    VGA_IOPORT_READ_PLACEHOLDER(0x3ba, 1);
     3065}
     3066
     3067
     3068/**
     3069 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3d4-0x3d5 CGA CRT control.}
     3070 */
     3071static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortCgaCrtWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     3072{
     3073    /** @todo do vga_ioport_invalid here   */
     3074    VGA_IOPORT_WRITE_PLACEHOLDER(0x3d4, 2);
     3075}
     3076
     3077/**
     3078 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3d4-0x3d5 CGA CRT control.}
     3079 */
     3080static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortCgaCrtRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     3081{
     3082    /** @todo do vga_ioport_invalid here */
     3083    VGA_IOPORT_READ_PLACEHOLDER(0x3d4, 2);
     3084}
     3085
     3086
     3087/**
     3088 * @callback_method_impl{FNIOMIOPORTNEWOUT,0x3da CGA feature/status.}
     3089 */
     3090static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortCgaFcrWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     3091{
     3092    /** @todo do vga_ioport_invalid here   */
     3093    VGA_IOPORT_WRITE_PLACEHOLDER(0x3da, 1);
     3094}
     3095
     3096/**
     3097 * @callback_method_impl{FNIOMIOPORTNEWIN,0x3da CGA feature/status.}
     3098 */
     3099static DECLCALLBACK(VBOXSTRICTRC) vgaIoPortCgaStRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     3100{
     3101    /** @todo do vga_ioport_invalid here */
     3102    VGA_IOPORT_READ_PLACEHOLDER(0x3da, 1);
    29143103}
    29153104
    … …  
    65636752     * Register I/O ports.
    65646753     */
    6565     rc = PDMDevHlpIOPortRegister(pDevIns,  0x3c0, 16, NULL, vgaIOPortWrite,       vgaIOPortRead, NULL, NULL,      "VGA - 3c0");
    6566     AssertRCReturn(rc, rc);
    6567     rc = PDMDevHlpIOPortRegister(pDevIns,  0x3b4,  2, NULL, vgaIOPortWrite,       vgaIOPortRead, NULL, NULL,      "VGA - 3b4");
    6568     AssertRCReturn(rc, rc);
    6569     rc = PDMDevHlpIOPortRegister(pDevIns,  0x3ba,  1, NULL, vgaIOPortWrite,       vgaIOPortRead, NULL, NULL,      "VGA - 3ba");
    6570     AssertRCReturn(rc, rc);
    6571     rc = PDMDevHlpIOPortRegister(pDevIns,  0x3d4,  2, NULL, vgaIOPortWrite,       vgaIOPortRead, NULL, NULL,      "VGA - 3d4");
    6572     AssertRCReturn(rc, rc);
    6573     rc = PDMDevHlpIOPortRegister(pDevIns,  0x3da,  1, NULL, vgaIOPortWrite,       vgaIOPortRead, NULL, NULL,      "VGA - 3da");
    6574     AssertRCReturn(rc, rc);
     6754#define REG_PORT(a_uPort, a_cPorts, a_pfnWrite, a_pfnRead, a_szDesc, a_phIoPort) do { \
     6755            rc = PDMDevHlpIoPortCreateFlagsAndMap(pDevIns, a_uPort, a_cPorts, IOM_IOPORT_F_ABS, \
     6756                                                  a_pfnWrite, a_pfnRead, "VGA - " a_szDesc, NULL /*paExtDescs*/, a_phIoPort); \
     6757            AssertRCReturn(rc, rc); \
     6758        } while (0)
     6759    REG_PORT(0x3c0,  2, vgaIoPortArWrite,       vgaIoPortArRead,        "Attribute Controller",     &pThis->hIoPortAr);
     6760    REG_PORT(0x3c2,  1, vgaIoPortMsrWrite,      vgaIoPortSt00Read,      "MSR / ST00",               &pThis->hIoPortMsrSt00);
     6761    REG_PORT(0x3c3,  1, vgaIoPortUnusedWrite,   vgaIoPortUnusedRead,    "0x3c3",                    &pThis->hIoPort3c3);
     6762    REG_PORT(0x3c4,  2, vgaIoPortSrWrite,       vgaIoPortSrRead,        "Sequencer",                &pThis->hIoPortSr);
     6763    REG_PORT(0x3c6,  4, vgaIoPortDacWrite,      vgaIoPortDacRead,       "DAC",                      &pThis->hIoPortDac);
     6764    REG_PORT(0x3ca,  4, vgaIoPortPosWrite,      vgaIoPortPosRead,       "Graphics Position", /*?*/  &pThis->hIoPortPos);
     6765    REG_PORT(0x3ce,  2, vgaIoPortGrWrite,       vgaIoPortGrRead,        "Graphics Controller",      &pThis->hIoPortGr);
     6766
     6767    /* Note! Ralf Brown lists 0x3b0-0x3b1, 0x3b2-0x3b3 and 0x3b6-0x3b7 as "the same as" 0x3b4-0x3b5. */
     6768    REG_PORT(0x3b4,  2, vgaIoPortMdaCrtWrite,   vgaIoPortMdaCrtRead,    "MDA CRT control",          &pThis->hIoPortMdaCrt);
     6769    REG_PORT(0x3ba,  1, vgaIoPortMdaFcrWrite,   vgaIoPortMdaStRead,     "MDA feature/status",       &pThis->hIoPortMdaFcrSt);
     6770    REG_PORT(0x3d4,  2, vgaIoPortCgaCrtWrite,   vgaIoPortCgaCrtRead,    "CGA CRT control",          &pThis->hIoPortCgaCrt);
     6771    REG_PORT(0x3da,  1, vgaIoPortCgaFcrWrite,   vgaIoPortCgaStRead,     "CGA Feature / status",     &pThis->hIoPortCgaFcrSt);
     6772
    65756773#ifdef VBOX_WITH_HGSMI
    65766774    /* Use reserved VGA IO ports for HGSMI. */
    … …  
    65886786#endif /* CONFIG_BOCHS_VBE */
    65896787
     6788#undef REG_PORT
     6789
    65906790    /* guest context extension */
    65916791    if (pDevIns->fRCEnabled)
    65926792    {
    6593         rc = PDMDevHlpIOPortRegisterRC(pDevIns,  0x3c0, 16, 0, "vgaIOPortWrite",       "vgaIOPortRead", NULL, NULL,     "VGA - 3c0 (GC)");
    6594         if (RT_FAILURE(rc))
    6595             return rc;
    6596         rc = PDMDevHlpIOPortRegisterRC(pDevIns,  0x3b4,  2, 0, "vgaIOPortWrite",       "vgaIOPortRead", NULL, NULL,     "VGA - 3b4 (GC)");
    6597         if (RT_FAILURE(rc))
    6598             return rc;
    6599         rc = PDMDevHlpIOPortRegisterRC(pDevIns,  0x3ba,  1, 0, "vgaIOPortWrite",       "vgaIOPortRead", NULL, NULL,     "VGA - 3ba (GC)");
    6600         if (RT_FAILURE(rc))
    6601             return rc;
    6602         rc = PDMDevHlpIOPortRegisterRC(pDevIns,  0x3d4,  2, 0, "vgaIOPortWrite",       "vgaIOPortRead", NULL, NULL,     "VGA - 3d4 (GC)");
    6603         if (RT_FAILURE(rc))
    6604             return rc;
    6605         rc = PDMDevHlpIOPortRegisterRC(pDevIns,  0x3da,  1, 0, "vgaIOPortWrite",       "vgaIOPortRead", NULL, NULL,     "VGA - 3da (GC)");
    6606         if (RT_FAILURE(rc))
    6607             return rc;
    66086793#ifdef CONFIG_BOCHS_VBE
    66096794        rc = PDMDevHlpIOPortRegisterRC(pDevIns,  0x1ce,  1, 0, "vgaIOPortWriteVBEIndex", "vgaIOPortReadVBEIndex", NULL, NULL, "VGA/VBE - Index (GC)");
    … …  
    66196804    if (pDevIns->fR0Enabled)
    66206805    {
    6621         rc = PDMDevHlpIOPortRegisterR0(pDevIns,  0x3c0, 16, 0, "vgaIOPortWrite",       "vgaIOPortRead", NULL, NULL,     "VGA - 3c0 (GC)");
    6622         if (RT_FAILURE(rc))
    6623             return rc;
    6624         rc = PDMDevHlpIOPortRegisterR0(pDevIns,  0x3b4,  2, 0, "vgaIOPortWrite",       "vgaIOPortRead", NULL, NULL,     "VGA - 3b4 (GC)");
    6625         if (RT_FAILURE(rc))
    6626             return rc;
    6627         rc = PDMDevHlpIOPortRegisterR0(pDevIns,  0x3ba,  1, 0, "vgaIOPortWrite",       "vgaIOPortRead", NULL, NULL,     "VGA - 3ba (GC)");
    6628         if (RT_FAILURE(rc))
    6629             return rc;
    6630         rc = PDMDevHlpIOPortRegisterR0(pDevIns,  0x3d4,  2, 0, "vgaIOPortWrite",       "vgaIOPortRead", NULL, NULL,     "VGA - 3d4 (GC)");
    6631         if (RT_FAILURE(rc))
    6632             return rc;
    6633         rc = PDMDevHlpIOPortRegisterR0(pDevIns,  0x3da,  1, 0, "vgaIOPortWrite",       "vgaIOPortRead", NULL, NULL,     "VGA - 3da (GC)");
    6634         if (RT_FAILURE(rc))
    6635             return rc;
    66366806#ifdef CONFIG_BOCHS_VBE
    66376807        rc = PDMDevHlpIOPortRegisterR0(pDevIns,  0x1ce,  1, 0, "vgaIOPortWriteVBEIndex", "vgaIOPortReadVBEIndex", NULL, NULL, "VGA/VBE - Index (GC)");
    … …  
    68186988     */
    68196989    rc = vgaAttach(pDevIns, 0 /* display LUN # */, PDM_TACH_FLAGS_NOT_HOT_PLUG);
    6820     if (RT_FAILURE(rc))
    6821         return rc;
     6990    AssertRCReturn(rc, rc);
    68226991
    68236992    /*
    … …  
    72797448    AssertRCReturn(rc, rc);
    72807449
     7450#define REG_PORT(a_uPort, a_cPorts, a_pfnWrite, a_pfnRead, a_szDesc, a_hIoPort) do { \
     7451            rc = PDMDevHlpIoPortSetUpContext(pDevIns, a_hIoPort, a_pfnWrite, a_pfnRead, NULL /*pvUser*/); \
     7452            AssertRCReturn(rc, rc); \
     7453        } while (0)
     7454
     7455    REG_PORT(0x3c0,  2, vgaIoPortArWrite,       vgaIoPortArRead,        "Attribute Controller",     pThis->hIoPortAr);
     7456    REG_PORT(0x3c2,  1, vgaIoPortMsrWrite,      vgaIoPortSt00Read,      "MSR / ST00",               pThis->hIoPortMsrSt00);
     7457    REG_PORT(0x3c3,  1, vgaIoPortUnusedWrite,   vgaIoPortUnusedRead,    "0x3c3",                    pThis->hIoPort3c3);
     7458    REG_PORT(0x3c4,  2, vgaIoPortSrWrite,       vgaIoPortSrRead,        "Sequencer",                pThis->hIoPortSr);
     7459    REG_PORT(0x3c6,  4, vgaIoPortDacWrite,      vgaIoPortDacRead,       "DAC",                      pThis->hIoPortDac);
     7460    REG_PORT(0x3ca,  4, vgaIoPortPosWrite,      vgaIoPortPosRead,       "Graphics Position", /*?*/  pThis->hIoPortPos);
     7461    REG_PORT(0x3ce,  2, vgaIoPortGrWrite,       vgaIoPortGrRead,        "Graphics Controller",      pThis->hIoPortGr);
     7462
     7463    REG_PORT(0x3b4,  2, vgaIoPortMdaCrtWrite,   vgaIoPortMdaCrtRead,    "MDA CRT control",          pThis->hIoPortMdaCrt);
     7464    REG_PORT(0x3ba,  1, vgaIoPortMdaFcrWrite,   vgaIoPortMdaStRead,     "MDA feature/status",       pThis->hIoPortMdaFcrSt);
     7465    REG_PORT(0x3d4,  2, vgaIoPortCgaCrtWrite,   vgaIoPortCgaCrtRead,    "CGA CRT control",          pThis->hIoPortCgaCrt);
     7466    REG_PORT(0x3da,  1, vgaIoPortCgaFcrWrite,   vgaIoPortCgaStRead,     "CGA Feature / status",     pThis->hIoPortCgaFcrSt);
     7467
     7468#undef REG_PORT
    72817469    return VINF_SUCCESS;
    72827470}

  • trunk/src/VBox/Devices/Graphics/DevVGA.h

    r82061 r82062  
    493493    } pendingVhwaCommands;
    494494
     495    /** @name I/O ports for range 0x3c0-3cf.
     496     * @{ */
     497    IOMIOPORTHANDLE             hIoPortAr;
     498    IOMIOPORTHANDLE             hIoPortMsrSt00;
     499    IOMIOPORTHANDLE             hIoPort3c3;
     500    IOMIOPORTHANDLE             hIoPortSr;
     501    IOMIOPORTHANDLE             hIoPortDac;
     502    IOMIOPORTHANDLE             hIoPortPos;
     503    IOMIOPORTHANDLE             hIoPortGr;
     504    /** @} */
     505
     506    /** @name I/O ports for MDA 0x3b0-0x3bf (sparse)
     507     * @{ */
     508    IOMIOPORTHANDLE             hIoPortMdaCrt;
     509    IOMIOPORTHANDLE             hIoPortMdaFcrSt;
     510    /** @} */
     511
     512    /** @name I/O ports for CGA 0x3d0-0x3df (sparse)
     513     * @{ */
     514    IOMIOPORTHANDLE             hIoPortCgaCrt;
     515    IOMIOPORTHANDLE             hIoPortCgaFcrSt;
     516    /** @} */
     517
    495518    /** The VBE extra data I/O port. */
    496519    IOMIOPORTHANDLE             hIoPortVbeExtra;
    497520    /** The logo command I/O port. */
    498521    IOMIOPORTHANDLE             hIoPortCmdLogo;
     522
    499523#endif /* VBOX */
    500524} VGAState;
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette