Changeset 82079 in vbox

Timestamp:

Nov 21, 2019 12:46:06 PM (5 years ago)

Author:

vboxsync

Message:

DevVGA: Map the first page of the FIFO into ring-0 so we can safely access the SVGA_FIFO_MIN, SVGA_FIFO_PITCHLOCK, and SVGA_FIFO_BUSY registers from there. bugref:9218

Location:

trunk/src/VBox/Devices/Graphics

Files:

• DevVGA-SVGA.cpp (modified) (2 diffs)
• DevVGA-SVGA.h (modified) (1 diff)
• DevVGA.cpp (modified) (2 diffs)

trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp

@@ -1436 +1436 @@
 
 #endif /* IN_RING3 */
-
 #if defined(IN_RING0) || defined(IN_RING3)
+
 /**
  * Safely updates the SVGA_FIFO_BUSY register (in shared memory).
@@ -1499 +1499 @@
         pThis->svga.u32PitchLock = pThis->svga.cbScanline;
 }
-#endif
+
+#endif /* IN_RING0 || IN_RING3 */
 
 

trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h

@@ -168 +168 @@
     /** The R3 FIFO pointer. */
     R3PTRTYPE(uint32_t *)       pFIFOR3;
-    /** The R0 FIFO pointer. */
+    /** The R0 FIFO pointer.
+     * @note This only points to the _first_ _page_ of the FIFO!  */
     R0PTRTYPE(uint32_t *)       pFIFOR0;
     /** R3 Opaque pointer to svga state. */

trunk/src/VBox/Devices/Graphics/DevVGA.cpp

@@ -6650 +6650 @@
         AssertRCReturn(rc, PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
                                                N_("Failed to create VMSVGA FIFO (%u bytes)"), pThis->svga.cbFIFO));
-        pThis->svga.pFIFOR0 = (RTR0PTR)pThis->svga.pFIFOR3;
 
         pPciDev->pfnRegionLoadChangeHookR3 = vgaR3PciRegionLoadChangeHook;
@@ -7397 +7396 @@
 
     /*
-     * Map the VMSVGA FIFO into this context (only ring-0).
+     * Map the first page of the VMSVGA FIFO into this context (not raw-mode).
+     * We currently only access SVGA_FIFO_MIN, SVGA_FIFO_PITCHLOCK, and SVGA_FIFO_BUSY.
      */
+    AssertCompile((RT_MAX(SVGA_FIFO_MIN, RT_MAX(SVGA_FIFO_PITCHLOCK, SVGA_FIFO_BUSY)) + 1) * sizeof(uint32_t) < PAGE_SIZE);
 # if defined(VBOX_WITH_VMSVGA) && !defined(IN_RC)
-#  if defined(VBOX_WITH_2X_4GB_ADDR_SPACE)
     if (pThis->fVMSVGAEnabled)
     {
-        rc = PDMDevHlpMmio2SetUpContext(pDevIns, pThis->hMmio2VmSvgaFifo, 0 /* off */,  pThis->svga.cbFIFO,
+        rc = PDMDevHlpMmio2SetUpContext(pDevIns, pThis->hMmio2VmSvgaFifo, 0 /* off */, PAGE_SIZE,
                                         (void **)&pThis->svga.CTX_SUFF(pFIFO));
         AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMapMMIO2IntoR0(%#x,) -> %Rrc\n", pThis->svga.cbFIFO, rc), rc);
     }
-# endif
+    else
+        AssertReturn(pThis->hMmio2VmSvgaFifo == NIL_PGMMMIO2HANDLE, VERR_INVALID_STATE);
 #endif