Changeset 82086 in vbox for trunk/src/VBox/Devices
- Timestamp:
- Nov 21, 2019 7:32:20 PM (5 years ago)
- Location:
- trunk/src/VBox/Devices/Graphics
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
r82083 r82086 520 520 SSMFIELD_ENTRY( VMSVGAState, u32RegCaps), 521 521 SSMFIELD_ENTRY( VMSVGAState, u32IndexReg), 522 SSMFIELD_ENTRY_IGNORE( VMSVGAState, pSupDrvSession), 523 SSMFIELD_ENTRY_IGNORE( VMSVGAState, FIFORequestSem), 524 SSMFIELD_ENTRY_IGNORE( VMSVGAState, FIFOExtCmdSem), 522 SSMFIELD_ENTRY_IGNORE( VMSVGAState, hFIFORequestSem), 523 SSMFIELD_ENTRY_IGNORE( VMSVGAState, hFIFOExtCmdSem), 525 524 SSMFIELD_ENTRY_IGN_HCPTR( VMSVGAState, pFIFOIOThread), 526 525 SSMFIELD_ENTRY_IGNORE( VMSVGAState, uLastCursorUpdateCount), … … 1500 1499 * @param u32 Value to write 1501 1500 */ 1502 static VBOXSTRICTRC vmsvgaWritePort(P VGASTATE pThis, uint32_t u32)1501 static VBOXSTRICTRC vmsvgaWritePort(PPDMDEVINS pDevIns, PVGASTATE pThis, uint32_t u32) 1503 1502 { 1504 1503 #ifdef IN_RING3 … … 1693 1692 1694 1693 /* Kick the FIFO thread to start processing commands again. */ 1695 SUPSemEventSignal(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem);1694 PDMDevHlpSUPSemEventSignal(pDevIns, pThis->svga.hFIFORequestSem); 1696 1695 #else 1697 1696 rc = VINF_IOM_R3_IOPORT_WRITE; … … 2006 2005 2007 2006 case SVGA_VALUE_PORT: 2008 return vmsvgaWritePort(p This, u32);2007 return vmsvgaWritePort(pDevIns, pThis, u32); 2009 2008 2010 2009 case SVGA_BIOS_PORT: … … 2404 2403 * Wake up the FIFO thread as it might have work to do now. 2405 2404 */ 2406 int rc = SUPSemEventSignal(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem);2405 int rc = PDMDevHlpSUPSemEventSignal(pDevIns, pThis->svga.hFIFORequestSem); 2407 2406 AssertLogRelRC(rc); 2408 2407 # endif … … 2952 2951 pThis->svga.u8FIFOExtCommand = VMSVGA_FIFO_EXTCMD_NONE; 2953 2952 ASMMemoryFence(); /* paranoia^2 */ 2954 int rc = RTSemEventSignal(pThis->svga. FIFOExtCmdSem);2953 int rc = RTSemEventSignal(pThis->svga.hFIFOExtCmdSem); 2955 2954 AssertLogRelRC(rc); 2956 2955 } … … 2997 2996 { 2998 2997 /* Wait. Take care in case the semaphore was already posted (same as below). */ 2999 rc = RTSemEventWait(pThis->svga. FIFOExtCmdSem, cMsWait);2998 rc = RTSemEventWait(pThis->svga.hFIFOExtCmdSem, cMsWait); 3000 2999 if ( rc == VINF_SUCCESS 3001 3000 && pThis->svga.u8FIFOExtCommand == uExtCmd) 3002 rc = RTSemEventWait(pThis->svga. FIFOExtCmdSem, cMsWait);3001 rc = RTSemEventWait(pThis->svga.hFIFOExtCmdSem, cMsWait); 3003 3002 AssertLogRelMsg(pThis->svga.u8FIFOExtCommand != uExtCmd || RT_FAILURE_NP(rc), 3004 3003 ("%#x %Rrc\n", pThis->svga.u8FIFOExtCommand, rc)); … … 3027 3026 pThis->svga.u8FIFOExtCommand = uExtCmd; 3028 3027 ASMMemoryFence(); /* paranoia^2 */ 3029 rc = SUPSemEventSignal(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem);3028 rc = PDMDevHlpSUPSemEventSignal(pDevIns, pThis->svga.hFIFORequestSem); 3030 3029 AssertLogRelRC(rc); 3031 3030 3032 3031 /* Wait. Take care in case the semaphore was already posted (same as above). */ 3033 rc = RTSemEventWait(pThis->svga. FIFOExtCmdSem, cMsWait);3032 rc = RTSemEventWait(pThis->svga.hFIFOExtCmdSem, cMsWait); 3034 3033 if ( rc == VINF_SUCCESS 3035 3034 && pThis->svga.u8FIFOExtCommand == uExtCmd) 3036 rc = RTSemEventWait(pThis->svga. FIFOExtCmdSem, cMsWait); /* it was already posted, retry the wait. */3035 rc = RTSemEventWait(pThis->svga.hFIFOExtCmdSem, cMsWait); /* it was already posted, retry the wait. */ 3037 3036 AssertLogRelMsg(pThis->svga.u8FIFOExtCommand != uExtCmd || RT_FAILURE_NP(rc), 3038 3037 ("%#x %Rrc\n", pThis->svga.u8FIFOExtCommand, rc)); … … 3109 3108 uint32_t offCurrentCmd, uint32_t offFifoMin, uint32_t offFifoMax, 3110 3109 uint8_t *pbBounceBuf, uint32_t *pcbAlreadyRead, 3111 PPDMTHREAD pThread, PVGASTATE pThis, PVMSVGAR3STATE pSVGAState )3110 PPDMTHREAD pThread, PVGASTATE pThis, PVMSVGAR3STATE pSVGAState, PPDMDEVINS pDevIns) 3112 3111 { 3113 3112 Assert(pbBounceBuf); … … 3196 3195 cbPayloadReq, cbAfter + cbBefore, offCurrentCmd, offNextCmd, pFIFO[SVGA_FIFO_STOP], i)); 3197 3196 3198 SUPSemEventWaitNoResume(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem, i < 16 ? 1 : 2);3197 PDMDevHlpSUPSemEventWaitNoResume(pDevIns, pThis->svga.hFIFORequestSem, i < 16 ? 1 : 2); 3199 3198 3200 3199 offNextCmd = pFIFO[SVGA_FIFO_NEXT_CMD]; … … 3340 3339 * @param pThis The VGA state. 3341 3340 */ 3342 void vmsvgaFIFOWatchdogTimer(P VGASTATE pThis)3341 void vmsvgaFIFOWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis) 3343 3342 { 3344 3343 /* Caller already checked pThis->svga.fFIFOThreadSleeping, so we only have … … 3349 3348 && pThis->svga.fFIFOThreadSleeping) 3350 3349 { 3351 int rc = SUPSemEventSignal(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem);3350 int rc = PDMDevHlpSUPSemEventSignal(pDevIns, pThis->svga.hFIFORequestSem); 3352 3351 AssertRC(rc); 3353 3352 STAM_REL_COUNTER_INC(&pThis->svga.pSvgaR3State->StatFifoWatchdogWakeUps); … … 3376 3375 while (pThread->enmState == PDMTHREADSTATE_RUNNING) 3377 3376 if (pThis->svga.u8FIFOExtCommand == VMSVGA_FIFO_EXTCMD_NONE) 3378 SUPSemEventWaitNoResume(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem, RT_MS_1MIN);3377 PDMDevHlpSUPSemEventWaitNoResume(pDevIns, pThis->svga.hFIFORequestSem, RT_MS_1MIN); 3379 3378 else 3380 3379 vmsvgaR3FifoHandleExtCmd(pThis); … … 3387 3386 * suspend & resume scenario (see vmsvgaFIFOGetCmdPayload). 3388 3387 */ 3389 SUPSemEventSignal(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem);3388 PDMDevHlpSUPSemEventSignal(pDevIns, pThis->svga.hFIFORequestSem); 3390 3389 3391 3390 /* … … 3452 3451 Assert(pThis->cMilliesRefreshInterval > 0); 3453 3452 if (cMsSleep < pThis->cMilliesRefreshInterval) 3454 rc = SUPSemEventWaitNoResume(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem, cMsSleep);3453 rc = PDMDevHlpSUPSemEventWaitNoResume(pDevIns, pThis->svga.hFIFORequestSem, cMsSleep); 3455 3454 else 3456 3455 { … … 3465 3464 { 3466 3465 STAM_REL_PROFILE_START(&pSVGAState->StatFifoExtendedSleep, Acc); 3467 rc = SUPSemEventWaitNoResume(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem, cMsExtendedSleep);3466 rc = PDMDevHlpSUPSemEventWaitNoResume(pDevIns, pThis->svga.hFIFORequestSem, cMsExtendedSleep); 3468 3467 STAM_REL_PROFILE_STOP(&pSVGAState->StatFifoExtendedSleep, Acc); 3469 3468 } … … 3583 3582 if (1) { \ 3584 3583 (a_PtrVar) = (a_Type *)vmsvgaFIFOGetCmdPayload((a_cbPayloadReq), pFIFO, offCurrentCmd, offFifoMin, offFifoMax, \ 3585 pbBounceBuf, &cbPayload, pThread, pThis, pSVGAState ); \3584 pbBounceBuf, &cbPayload, pThread, pThis, pSVGAState, pDevIns); \ 3586 3585 if (RT_UNLIKELY((uintptr_t)(a_PtrVar) < 2)) { if ((uintptr_t)(a_PtrVar) == 1) continue; break; } \ 3587 3586 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE(); \ … … 5187 5186 PVGASTATE pThis = (PVGASTATE)pThread->pvUser; 5188 5187 Log(("vmsvgaFIFOLoopWakeUp\n")); 5189 return SUPSemEventSignal(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem);5188 return PDMDevHlpSUPSemEventSignal(pDevIns, pThis->svga.hFIFORequestSem); 5190 5189 } 5191 5190 … … 6072 6071 pThis->svga.pbVgaFrameBufferR3 = NULL; 6073 6072 } 6074 if (pThis->svga. FIFOExtCmdSem != NIL_RTSEMEVENT)6075 { 6076 RTSemEventDestroy(pThis->svga. FIFOExtCmdSem);6077 pThis->svga. FIFOExtCmdSem = NIL_RTSEMEVENT;6078 } 6079 if (pThis->svga. FIFORequestSem != NIL_SUPSEMEVENT)6080 { 6081 SUPSemEventClose(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem);6082 pThis->svga. FIFORequestSem = NIL_SUPSEMEVENT;6073 if (pThis->svga.hFIFOExtCmdSem != NIL_RTSEMEVENT) 6074 { 6075 RTSemEventDestroy(pThis->svga.hFIFOExtCmdSem); 6076 pThis->svga.hFIFOExtCmdSem = NIL_RTSEMEVENT; 6077 } 6078 if (pThis->svga.hFIFORequestSem != NIL_SUPSEMEVENT) 6079 { 6080 PDMDevHlpSUPSemEventClose(pDevIns, pThis->svga.hFIFORequestSem); 6081 pThis->svga.hFIFORequestSem = NIL_SUPSEMEVENT; 6083 6082 } 6084 6083 … … 6108 6107 6109 6108 /* Create event semaphore. */ 6110 pThis->svga.pSupDrvSession = PDMDevHlpGetSupDrvSession(pDevIns); 6111 6112 rc = SUPSemEventCreate(pThis->svga.pSupDrvSession, &pThis->svga.FIFORequestSem); 6113 if (RT_FAILURE(rc)) 6114 { 6115 Log(("%s: Failed to create event semaphore for FIFO handling.\n", __FUNCTION__)); 6116 return rc; 6117 } 6109 rc = PDMDevHlpSUPSemEventCreate(pDevIns, &pThis->svga.hFIFORequestSem); 6110 AssertRCReturn(rc, rc); 6118 6111 6119 6112 /* Create event semaphore. */ 6120 rc = RTSemEventCreate(&pThis->svga.FIFOExtCmdSem); 6121 if (RT_FAILURE(rc)) 6122 { 6123 Log(("%s: Failed to create event semaphore for external fifo cmd handling.\n", __FUNCTION__)); 6124 return rc; 6125 } 6113 rc = RTSemEventCreate(&pThis->svga.hFIFOExtCmdSem); 6114 AssertRCReturn(rc, rc); 6126 6115 6127 6116 pThis->svga.pSvgaR3State = (PVMSVGAR3STATE)RTMemAlloc(sizeof(VMSVGAR3STATE)); -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h
r82079 r82086 223 223 /** Port io index register. */ 224 224 uint32_t u32IndexReg; 225 /** The support driver session handle for use with FIFORequestSem. */226 R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;227 225 /** FIFO request semaphore. */ 228 SUPSEMEVENT FIFORequestSem;226 SUPSEMEVENT hFIFORequestSem; 229 227 /** FIFO external command semaphore. */ 230 R3PTRTYPE(RTSEMEVENT) FIFOExtCmdSem;228 R3PTRTYPE(RTSEMEVENT) hFIFOExtCmdSem; 231 229 /** FIFO IO Thread. */ 232 230 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread; … … 379 377 DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns); 380 378 DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns); 381 void vmsvgaFIFOWatchdogTimer(P VGASTATE pThis);379 void vmsvgaFIFOWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis); 382 380 383 381 #ifdef IN_RING3 -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r82084 r82086 4977 4977 #ifdef VBOX_WITH_VMSVGA 4978 4978 if (pThis->svga.fFIFOThreadSleeping) 4979 SUPSemEventSignal(pThis->svga.pSupDrvSession, pThis->svga.FIFORequestSem);4979 PDMDevHlpSUPSemEventSignal(pDevIns, pThis->svga.hFIFORequestSem); 4980 4980 #endif 4981 4981 … … 5585 5585 */ 5586 5586 if (pThis->svga.fFIFOThreadSleeping && pThis->svga.fEnabled && pThis->svga.fConfigured) 5587 vmsvgaFIFOWatchdogTimer(p This);5587 vmsvgaFIFOWatchdogTimer(pDevIns, pThis); 5588 5588 #endif 5589 5589 } 5590 5590 5591 5591 #ifdef VBOX_WITH_VMSVGA 5592 5592 5593 int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer) 5593 5594 { … … 5613 5614 return rc; 5614 5615 } 5615 #endif 5616 5617 #endif /* PPDMDEVINS pDevIns */ 5616 5618 5617 5619 /* -=-=-=-=-=- Ring 3: PCI Device -=-=-=-=-=- */
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