VirtualBox

Changeset 82089 in vbox for trunk/src/VBox/Devices


Ignore:
Timestamp:
Nov 21, 2019 10:18:59 PM (5 years ago)
Author:
vboxsync
Message:

DevVGA: Mark functions with R3 where appropriate, adding docs and doing other minor cleaning up. bugref:9218

Location:
trunk/src/VBox/Devices/Graphics
Files:
8 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp

    r82088 r82089  
    336336#ifdef IN_RING3
    337337# if defined(VMSVGA_USE_FIFO_ACCESS_HANDLER) || defined(DEBUG_FIFO_ACCESS)
    338 static FNPGMPHYSHANDLER vmsvgaR3FIFOAccessHandler;
     338static FNPGMPHYSHANDLER vmsvgaR3FifoAccessHandler;
    339339# endif
    340340# ifdef DEBUG_GMR_ACCESS
    341 static FNPGMPHYSHANDLER vmsvgaR3GMRAccessHandler;
     341static FNPGMPHYSHANDLER vmsvgaR3GmrAccessHandler;
    342342# endif
    343343#endif
     
    541541    SSMFIELD_ENTRY_TERM()
    542542};
    543 
    544 static void vmsvgaSetTraces(PVGASTATE pThis, bool fTraces);
    545 static int vmsvgaLoadExecFifo(PCPDMDEVHLPR3 pHlp, PVGASTATE pThis, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
    546 static int vmsvgaSaveExecFifo(PCPDMDEVHLPR3 pHlp, PVGASTATE pThis, PSSMHANDLE pSSM);
    547 
    548 VMSVGASCREENOBJECT *vmsvgaGetScreenObject(PVGASTATE pThis, uint32_t idScreen)
     543#endif /* IN_RING3 */
     544
     545
     546/*********************************************************************************************************************************
     547*   Internal Functions                                                                                                           *
     548*********************************************************************************************************************************/
     549#ifdef IN_RING3
     550static void vmsvgaR3SetTraces(PVGASTATE pThis, bool fTraces);
     551static int vmsvgaR3LoadExecFifo(PCPDMDEVHLPR3 pHlp, PVGASTATE pThis, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
     552static int vmsvgaR3SaveExecFifo(PCPDMDEVHLPR3 pHlp, PVGASTATE pThis, PSSMHANDLE pSSM);
     553#endif /* IN_RING3 */
     554
     555
     556
     557#ifdef IN_RING3
     558VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATE pThis, uint32_t idScreen)
    549559{
    550560    PVMSVGAR3STATE pSVGAState = pThis->svga.pSvgaR3State;
     
    557567    return NULL;
    558568}
    559 
    560569#endif /* IN_RING3 */
    561570
     
    640649 * @param   u32Cmd      FIFO command
    641650 */
    642 static const char *vmsvgaFIFOCmdToString(uint32_t u32Cmd)
     651static const char *vmsvgaR3FifoCmdToString(uint32_t u32Cmd)
    643652{
    644653    switch (u32Cmd)
     
    715724
    716725    /** @todo Test how it interacts with multiple screen objects. */
    717     VMSVGASCREENOBJECT *pScreen = vmsvgaGetScreenObject(pThis, idScreen);
     726    VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThis, idScreen);
    718727    uint32_t const uWidth = pScreen ? pScreen->cWidth : 0;
    719728    uint32_t const uHeight = pScreen ? pScreen->cHeight : 0;
     
    12811290 * @param   pThis       VMSVGA State
    12821291 */
    1283 static int vmsvgaChangeMode(PVGASTATE pThis)
     1292static int vmsvgaR3ChangeMode(PVGASTATE pThis)
    12841293{
    12851294    int rc;
     
    14081417}
    14091418
    1410 int vmsvgaUpdateScreen(PVGASTATE pThis, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h)
     1419int vmsvgaR3UpdateScreen(PVGASTATE pThis, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h)
    14111420{
    14121421    VBVACMDHDR cmd;
     
    14331442 * @param   fState              The busy state.
    14341443 */
    1435 DECLINLINE(void) vmsvgaSafeFifoBusyRegUpdate(PVGASTATE pThis, bool fState)
     1444DECLINLINE(void) vmsvgaHCSafeFifoBusyRegUpdate(PVGASTATE pThis, bool fState)
    14361445{
    14371446    ASMAtomicWriteU32(&pThis->svga.CTX_SUFF(pFIFO)[SVGA_FIFO_BUSY], fState);
     
    14571466 * @param   pThis       VMSVGA State
    14581467 */
    1459 DECLINLINE(void) vmsvgaUpdatePitch(PVGASTATE pThis)
     1468DECLINLINE(void) vmsvgaHCUpdatePitch(PVGASTATE pThis)
    14601469{
    14611470    uint32_t RT_UNTRUSTED_VOLATILE_GUEST *pFIFO = pThis->svga.CTX_SUFF(pFIFO);
     
    15261535    }
    15271536    Log(("vmsvgaWritePort index=%s (%d) val=%#x\n", vmsvgaIndexToString(pThis, idxReg), idxReg, u32));
    1528     /* Check if the guest uses legacy registers. See vmsvgaChangeMode */
     1537    /* Check if the guest uses legacy registers. See vmsvgaR3ChangeMode */
    15291538    switch (idxReg)
    15301539    {
     
    15871596
    15881597                /* Disable or enable dirty page tracking according to the current fTraces value. */
    1589                 vmsvgaSetTraces(pThis, !!pThis->svga.fTraces);
     1598                vmsvgaR3SetTraces(pThis, !!pThis->svga.fTraces);
    15901599
    15911600                /* bird: Whatever this is was added to make screenshot work, ask sunlover should explain... */
     
    16011610
    16021611                /* Enable dirty page tracking again when going into legacy mode. */
    1603                 vmsvgaSetTraces(pThis, true);
     1612                vmsvgaR3SetTraces(pThis, true);
    16041613
    16051614                /* bird: Whatever this is was added to make screenshot work, ask sunlover should explain... */
     
    16211630#if defined(IN_RING3) || defined(IN_RING0)
    16221631                pThis->svga.uWidth = u32;
    1623                 vmsvgaUpdatePitch(pThis);
     1632                vmsvgaHCUpdatePitch(pThis);
    16241633                if (pThis->svga.fEnabled)
    16251634                    ASMAtomicOrU32(&pThis->svga.u32ActionFlags, VMSVGA_ACTION_CHANGEMODE);
     
    16531662#if defined(IN_RING3) || defined(IN_RING0)
    16541663                pThis->svga.uBpp = u32;
    1655                 vmsvgaUpdatePitch(pThis);
     1664                vmsvgaHCUpdatePitch(pThis);
    16561665                if (pThis->svga.fEnabled)
    16571666                    ASMAtomicOrU32(&pThis->svga.u32ActionFlags, VMSVGA_ACTION_CHANGEMODE);
     
    16741683            if (!pThis->svga.fConfigured)
    16751684                pThis->svga.fTraces = true;
    1676             vmsvgaSetTraces(pThis, !!pThis->svga.fTraces);
     1685            vmsvgaR3SetTraces(pThis, !!pThis->svga.fTraces);
    16771686#else
    16781687            rc = VINF_IOM_R3_IOPORT_WRITE;
     
    16891698                ASMAtomicWriteU32(&pThis->svga.fBusy, VMSVGA_BUSY_F_EMT_FORCE | VMSVGA_BUSY_F_FIFO);
    16901699                if (VMSVGA_IS_VALID_FIFO_REG(SVGA_FIFO_BUSY, pThis->svga.CTX_SUFF(pFIFO)[SVGA_FIFO_MIN]))
    1691                     vmsvgaSafeFifoBusyRegUpdate(pThis, true);
     1700                    vmsvgaHCSafeFifoBusyRegUpdate(pThis, true);
    16921701
    16931702                /* Kick the FIFO thread to start processing commands again. */
     
    17831792
    17841793            /* Free the old GMR if present. */
    1785             vmsvgaGMRFree(pThis, idGMR);
     1794            vmsvgaR3GmrFree(pThis, idGMR);
    17861795
    17871796            /* Just undefine the GMR? */
     
    18641873
    18651874#ifdef IN_RING3
    1866             vmsvgaSetTraces(pThis, !!u32);
     1875            vmsvgaR3SetTraces(pThis, !!u32);
    18671876#else
    18681877            rc = VINF_IOM_R3_IOPORT_WRITE;
     
    20432052 * @param   fWriteAccess    Read or write access
    20442053 */
    2045 static int vmsvgaDebugFIFOAccess(PVM pVM, PVGASTATE pThis, RTGCPHYS GCPhys, bool fWriteAccess)
     2054static int vmsvgaR3DebugFifoAccess(PVM pVM, PVGASTATE pThis, RTGCPHYS GCPhys, bool fWriteAccess)
    20462055{
    20472056    RT_NOREF(pVM);
     
    23922401 */
    23932402static DECLCALLBACK(VBOXSTRICTRC)
    2394 vmsvgaR3FIFOAccessHandler(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf,
     2403vmsvgaR3FifoAccessHandler(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf,
    23952404                          PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser)
    23962405{
     
    24132422     */
    24142423    Assert(GCPhys >= pThis->svga.GCPhysFIFO);
    2415     rc = vmsvgaDebugFIFOAccess(pVM, pThis, GCPhys, enmAccessType == PGMACCESSTYPE_WRITE);
     2424    rc = vmsvgaR3DebugFifoAccess(pVM, pThis, GCPhys, enmAccessType == PGMACCESSTYPE_WRITE);
    24162425# elif defined(VMSVGA_USE_FIFO_ACCESS_HANDLER)
    24172426    /*
     
    24492458 */
    24502459static DECLCALLBACK(VBOXSTRICTRC)
    2451 vmsvgaR3GMRAccessHandler(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf,
     2460vmsvgaR3GmrAccessHandler(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf,
    24522461                         PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser)
    24532462{
     
    24572466    NOREF(pVCpu); NOREF(pvPhys); NOREF(pvBuf); NOREF(cbBuf); NOREF(enmAccessType); NOREF(enmOrigin);
    24582467
    2459     Log(("vmsvgaR3GMRAccessHandler: GMR access to page %RGp\n", GCPhys));
     2468    Log(("vmsvgaR3GmrAccessHandler: GMR access to page %RGp\n", GCPhys));
    24602469
    24612470    for (uint32_t i = 0; i < pThis->svga.cGMR; ++i)
     
    24762485                    int rc = PGMHandlerPhysicalPageTempOff(pVM, pGMR->paDesc[j].GCPhys, GCPhys);
    24772486                    AssertRC(rc);
    2478                     goto end;
     2487                    return VINF_PGM_HANDLER_DO_DEFAULT;
    24792488                }
    24802489            }
    24812490        }
    24822491    }
    2483 end:
     2492
    24842493    return VINF_PGM_HANDLER_DO_DEFAULT;
    24852494}
    24862495
    2487 /* Callback handler for VMR3ReqCallWaitU */
    2488 static DECLCALLBACK(int) vmsvgaRegisterGMR(PPDMDEVINS pDevIns, uint32_t gmrId)
     2496/** Callback handler for VMR3ReqCallWaitU */
     2497static DECLCALLBACK(int) vmsvgaR3RegisterGmr(PPDMDEVINS pDevIns, uint32_t gmrId)
    24892498{
    24902499    PVGASTATE       pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
     
    25032512}
    25042513
    2505 /* Callback handler for VMR3ReqCallWaitU */
    2506 static DECLCALLBACK(int) vmsvgaDeregisterGMR(PPDMDEVINS pDevIns, uint32_t gmrId)
     2514/** Callback handler for VMR3ReqCallWaitU */
     2515static DECLCALLBACK(int) vmsvgaR3DeregisterGmr(PPDMDEVINS pDevIns, uint32_t gmrId)
    25072516{
    25082517    PVGASTATE       pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
     
    25182527}
    25192528
    2520 /* Callback handler for VMR3ReqCallWaitU */
    2521 static DECLCALLBACK(int) vmsvgaResetGMRHandlers(PVGASTATE pThis)
     2529/** Callback handler for VMR3ReqCallWaitU */
     2530static DECLCALLBACK(int) vmsvgaR3ResetGmrHandlers(PVGASTATE pThis)
    25222531{
    25232532    PVMSVGAR3STATE pSVGAState = pThis->svga.pSvgaR3State;
     
    25642573{
    25652574    LogRel2(("vmsvgaR3InstallNewCursor: cx=%d cy=%d xHot=%d yHot=%d fAlpha=%d cbData=%#x\n", cx, cy, xHot, yHot, fAlpha, cbData));
    2566 #ifdef LOG_ENABLED
     2575# ifdef LOG_ENABLED
    25672576    if (LogIs2Enabled())
    25682577    {
     
    26052614        }
    26062615    }
    2607 #endif
     2616# endif
    26082617
    26092618    int rc = pThis->pDrv->pfnVBVAMousePointerShape(pThis->pDrv, true /*fVisible*/, fAlpha, xHot, yHot, cx, cy, pbData);
     
    28802889    {
    28812890        case VMSVGA_FIFO_EXTCMD_RESET:
    2882             Log(("vmsvgaFIFOLoop: reset the fifo thread.\n"));
     2891            Log(("vmsvgaR3FifoLoop: reset the fifo thread.\n"));
    28832892            Assert(pThis->svga.pvFIFOExtCmdParam == NULL);
    28842893# ifdef VBOX_WITH_VMSVGA3D
     
    28922901
    28932902        case VMSVGA_FIFO_EXTCMD_TERMINATE:
    2894             Log(("vmsvgaFIFOLoop: terminate the fifo thread.\n"));
     2903            Log(("vmsvgaR3FifoLoop: terminate the fifo thread.\n"));
    28952904            Assert(pThis->svga.pvFIFOExtCmdParam == NULL);
    28962905# ifdef VBOX_WITH_VMSVGA3D
     
    29052914        case VMSVGA_FIFO_EXTCMD_SAVESTATE:
    29062915        {
    2907             Log(("vmsvgaFIFOLoop: VMSVGA_FIFO_EXTCMD_SAVESTATE.\n"));
     2916            Log(("vmsvgaR3FifoLoop: VMSVGA_FIFO_EXTCMD_SAVESTATE.\n"));
    29082917            PSSMHANDLE pSSM = (PSSMHANDLE)pThis->svga.pvFIFOExtCmdParam;
    29092918            AssertLogRelMsgBreak(RT_VALID_PTR(pSSM), ("pSSM=%p\n", pSSM));
    2910             vmsvgaSaveExecFifo(pThis->pDevInsR3->pHlpR3, pThis, pSSM);
     2919            vmsvgaR3SaveExecFifo(pThis->pDevInsR3->pHlpR3, pThis, pSSM);
    29112920# ifdef VBOX_WITH_VMSVGA3D
    29122921            if (pThis->svga.f3DEnabled)
     
    29182927        case VMSVGA_FIFO_EXTCMD_LOADSTATE:
    29192928        {
    2920             Log(("vmsvgaFIFOLoop: VMSVGA_FIFO_EXTCMD_LOADSTATE.\n"));
     2929            Log(("vmsvgaR3FifoLoop: VMSVGA_FIFO_EXTCMD_LOADSTATE.\n"));
    29212930            PVMSVGA_STATE_LOAD pLoadState = (PVMSVGA_STATE_LOAD)pThis->svga.pvFIFOExtCmdParam;
    29222931            AssertLogRelMsgBreak(RT_VALID_PTR(pLoadState), ("pLoadState=%p\n", pLoadState));
    2923             vmsvgaLoadExecFifo(pThis->pDevInsR3->pHlpR3, pThis, pLoadState->pSSM, pLoadState->uVersion, pLoadState->uPass);
     2932            vmsvgaR3LoadExecFifo(pThis->pDevInsR3->pHlpR3, pThis, pLoadState->pSSM, pLoadState->uVersion, pLoadState->uPass);
    29242933# ifdef VBOX_WITH_VMSVGA3D
    29252934            if (pThis->svga.f3DEnabled)
     
    29332942# ifdef VBOX_WITH_VMSVGA3D
    29342943            uint32_t sid = (uint32_t)(uintptr_t)pThis->svga.pvFIFOExtCmdParam;
    2935             Log(("vmsvgaFIFOLoop: VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS sid=%#x\n", sid));
     2944            Log(("vmsvgaR3FifoLoop: VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS sid=%#x\n", sid));
    29362945            vmsvga3dUpdateHeapBuffersForSurfaces(pThis, sid);
    29372946# endif
     
    29672976 *                          milliseconds.
    29682977 */
    2969 static int vmsvgaR3RunExtCmdOnFifoThread(PPDMDEVINS pDevIns, PVGASTATE pThis, uint8_t uExtCmd, void *pvParam, RTMSINTERVAL cMsWait)
     2978static int vmsvgaR3RunExtCmdOnFifoThread(PPDMDEVINS pDevIns, PVGASTATE pThis,
     2979                                         uint8_t uExtCmd, void *pvParam, RTMSINTERVAL cMsWait)
    29702980{
    29712981    Assert(cMsWait >= RT_MS_1SEC * 5);
     
    30583068 * @param   offFifoMin      The start byte offset of the command FIFO.
    30593069 */
    3060 static void vmsvgaFifoSetNotBusy(PVGASTATE pThis, PVMSVGAR3STATE pSVGAState, uint32_t offFifoMin)
     3070static void vmsvgaR3FifoSetNotBusy(PVGASTATE pThis, PVMSVGAR3STATE pSVGAState, uint32_t offFifoMin)
    30613071{
    30623072    ASMAtomicAndU32(&pThis->svga.fBusy, ~VMSVGA_BUSY_F_FIFO);
    30633073    if (VMSVGA_IS_VALID_FIFO_REG(SVGA_FIFO_BUSY, offFifoMin))
    3064         vmsvgaSafeFifoBusyRegUpdate(pThis, pThis->svga.fBusy != 0);
     3074        vmsvgaHCSafeFifoBusyRegUpdate(pThis, pThis->svga.fBusy != 0);
    30653075
    30663076    /* Wake up any waiting EMTs. */
    30673077    if (pSVGAState->cBusyDelayedEmts > 0)
    30683078    {
    3069 #ifdef VMSVGA_USE_EMT_HALT_CODE
     3079# ifdef VMSVGA_USE_EMT_HALT_CODE
    30703080        PVM pVM = PDMDevHlpGetVM(pThis->pDevInsR3);
    30713081        VMCPUID idCpu = VMCpuSetFindLastPresentInternal(&pSVGAState->BusyDelayedEmts);
     
    30773087                    VMR3NotifyCpuDeviceReady(pVM, idCpu);
    30783088        }
    3079 #else
     3089# else
    30803090        int rc2 = RTSemEventMultiSignal(pSVGAState->hBusyDelayedEmts);
    30813091        AssertRC(rc2);
    3082 #endif
     3092# endif
    30833093    }
    30843094}
     
    31053115 *                          statistics collection.
    31063116 */
    3107 static void *vmsvgaFIFOGetCmdPayload(uint32_t cbPayloadReq, uint32_t RT_UNTRUSTED_VOLATILE_GUEST *pFIFO,
    3108                                      uint32_t offCurrentCmd, uint32_t offFifoMin, uint32_t offFifoMax,
    3109                                      uint8_t *pbBounceBuf, uint32_t *pcbAlreadyRead,
    3110                                      PPDMTHREAD pThread, PVGASTATE pThis, PVMSVGAR3STATE pSVGAState, PPDMDEVINS pDevIns)
     3117static void *vmsvgaR3FifoGetCmdPayload(uint32_t cbPayloadReq, uint32_t RT_UNTRUSTED_VOLATILE_GUEST *pFIFO,
     3118                                       uint32_t offCurrentCmd, uint32_t offFifoMin, uint32_t offFifoMax,
     3119                                       uint8_t *pbBounceBuf, uint32_t *pcbAlreadyRead,
     3120                                       PPDMTHREAD pThread, PVGASTATE pThis, PVMSVGAR3STATE pSVGAState, PPDMDEVINS pDevIns)
    31113121{
    31123122    Assert(pbBounceBuf);
     
    31593169        {
    31603170            STAM_REL_COUNTER_INC(&pSVGAState->StatFifoErrors);
    3161             LogRelMax(16, ("vmsvgaFIFOGetCmdPayload: Invalid offNextCmd=%#x (offFifoMin=%#x offFifoMax=%#x)\n",
     3171            LogRelMax(16, ("vmsvgaR3FifoGetCmdPayload: Invalid offNextCmd=%#x (offFifoMin=%#x offFifoMax=%#x)\n",
    31623172                           offNextCmd, offFifoMin, offFifoMax));
    31633173            cbAfter = offFifoMax - offCurrentCmd;
     
    31733183        {
    31743184            STAM_REL_COUNTER_INC(&pSVGAState->StatFifoErrors);
    3175             LogRelMax(16, ("vmsvgaFIFOGetCmdPayload: Invalid offNextCmd=%#x (offFifoMin=%#x offFifoMax=%#x)\n",
     3185            LogRelMax(16, ("vmsvgaR3FifoGetCmdPayload: Invalid offNextCmd=%#x (offFifoMin=%#x offFifoMax=%#x)\n",
    31763186                           offNextCmd, offFifoMin, offFifoMax));
    31773187            cbBefore = 0;
     
    32483258 */
    32493259static uint32_t
    3250 vmsvgaFIFOUpdateCursor(PVGASTATE pVGAState, PVMSVGAR3STATE  pSVGAState, uint32_t RT_UNTRUSTED_VOLATILE_GUEST *pFIFO,
    3251                        uint32_t offFifoMin,  uint32_t uCursorUpdateCount,
    3252                        uint32_t *pxLast, uint32_t *pyLast, uint32_t *pfLastVisible)
     3260vmsvgaR3FifoUpdateCursor(PVGASTATE pVGAState, PVMSVGAR3STATE  pSVGAState, uint32_t RT_UNTRUSTED_VOLATILE_GUEST *pFIFO,
     3261                         uint32_t offFifoMin,  uint32_t uCursorUpdateCount,
     3262                         uint32_t *pxLast, uint32_t *pyLast, uint32_t *pfLastVisible)
    32533263{
    32543264    /*
     
    32963306        else if (*pfLastVisible != fVisible)
    32973307        {
    3298             LogRel2(("vmsvgaFIFOUpdateCursor: fVisible %d fLastVisible %d (%d,%d)\n", fVisible, *pfLastVisible, x, y));
     3308            LogRel2(("vmsvgaR3FifoUpdateCursor: fVisible %d fLastVisible %d (%d,%d)\n", fVisible, *pfLastVisible, x, y));
    32993309            *pfLastVisible = fVisible;
    33003310            pVGAState->pDrv->pfnVBVAMousePointerShape(pVGAState->pDrv, RT_BOOL(fVisible), false, 0, 0, 0, 0, NULL);
     
    33213331 * @param   uLastCursorCount    The last cursor update counter value.
    33223332 */
    3323 DECLINLINE(bool) vmsvgaFIFOHasWork(uint32_t RT_UNTRUSTED_VOLATILE_GUEST * const pFIFO, uint32_t uLastCursorCount)
     3333DECLINLINE(bool) vmsvgaR3FifoHasWork(uint32_t RT_UNTRUSTED_VOLATILE_GUEST * const pFIFO, uint32_t uLastCursorCount)
    33243334{
    33253335    if (pFIFO[SVGA_FIFO_NEXT_CMD] != pFIFO[SVGA_FIFO_STOP])
     
    33393349 * @param   pThis   The VGA state.
    33403350 */
    3341 void vmsvgaFIFOWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis)
     3351void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis)
    33423352{
    33433353    /* Caller already checked pThis->svga.fFIFOThreadSleeping, so we only have
     
    33453355    uint32_t RT_UNTRUSTED_VOLATILE_GUEST * const pFIFO = pThis->svga.pFIFOR3;
    33463356    AssertReturnVoid(pFIFO);
    3347     if (   vmsvgaFIFOHasWork(pFIFO, ASMAtomicReadU32(&pThis->svga.uLastCursorUpdateCount))
     3357    if (   vmsvgaR3FifoHasWork(pFIFO, ASMAtomicReadU32(&pThis->svga.uLastCursorUpdateCount))
    33483358        && pThis->svga.fFIFOThreadSleeping)
    33493359    {
     
    33553365
    33563366
    3357 /* The async FIFO handling thread. */
    3358 static DECLCALLBACK(int) vmsvgaFIFOLoop(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
     3367/**
     3368 * @callback_method_impl{PFNPDMTHREADDEV, The async FIFO handling thread.}
     3369 */
     3370static DECLCALLBACK(int) vmsvgaR3FifoLoop(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
    33593371{
    33603372    PVGASTATE       pThis = (PVGASTATE)pThread->pvUser;
     
    33843396    /*
    33853397     * Signal the semaphore to make sure we don't wait for 250ms after a
    3386      * suspend & resume scenario (see vmsvgaFIFOGetCmdPayload).
     3398     * suspend & resume scenario (see vmsvgaR3FifoGetCmdPayload).
    33873399     */
    33883400    PDMDevHlpSUPSemEventSignal(pDevIns, pThis->svga.hFIFORequestSem);
     
    34293441     * The FIFO loop.
    34303442     */
    3431     LogFlow(("vmsvgaFIFOLoop: started loop\n"));
     3443    LogFlow(("vmsvgaR3FifoLoop: started loop\n"));
    34323444    bool fBadOrDisabledFifo = false;
    34333445    while (pThread->enmState == PDMTHREADSTATE_RUNNING)
     
    34463458         */
    34473459        if (   fBadOrDisabledFifo
    3448             || !vmsvgaFIFOHasWork(pFIFO, pThis->svga.uLastCursorUpdateCount))
     3460            || !vmsvgaR3FifoHasWork(pFIFO, pThis->svga.uLastCursorUpdateCount))
    34493461        {
    34503462            ASMAtomicWriteBool(&pThis->svga.fFIFOThreadSleeping, true);
     
    34593471# endif
    34603472                if (   !fBadOrDisabledFifo
    3461                     && vmsvgaFIFOHasWork(pFIFO, pThis->svga.uLastCursorUpdateCount))
     3473                    && vmsvgaR3FifoHasWork(pFIFO, pThis->svga.uLastCursorUpdateCount))
    34623474                    rc = VINF_SUCCESS;
    34633475                else
     
    34723484            if (pThread->enmState != PDMTHREADSTATE_RUNNING)
    34733485            {
    3474                 LogFlow(("vmsvgaFIFOLoop: thread state %x\n", pThread->enmState));
     3486                LogFlow(("vmsvgaR3FifoLoop: thread state %x\n", pThread->enmState));
    34753487                break;
    34763488            }
     
    34813493        if (rc == VERR_TIMEOUT)
    34823494        {
    3483             if (!vmsvgaFIFOHasWork(pFIFO, pThis->svga.uLastCursorUpdateCount))
     3495            if (!vmsvgaR3FifoHasWork(pFIFO, pThis->svga.uLastCursorUpdateCount))
    34843496            {
    34853497                cMsSleep = RT_MIN(cMsSleep + cMsIncSleep, cMsMaxSleep);
     
    34883500            STAM_REL_COUNTER_INC(&pSVGAState->StatFifoTodoTimeout);
    34893501
    3490             Log(("vmsvgaFIFOLoop: timeout\n"));
     3502            Log(("vmsvgaR3FifoLoop: timeout\n"));
    34913503        }
    3492         else if (vmsvgaFIFOHasWork(pFIFO, pThis->svga.uLastCursorUpdateCount))
     3504        else if (vmsvgaR3FifoHasWork(pFIFO, pThis->svga.uLastCursorUpdateCount))
    34933505            STAM_REL_COUNTER_INC(&pSVGAState->StatFifoTodoWoken);
    34943506        cMsSleep = cMsMinSleep;
    34953507
    3496         Log(("vmsvgaFIFOLoop: enabled=%d configured=%d busy=%d\n", pThis->svga.fEnabled, pThis->svga.fConfigured, pFIFO[SVGA_FIFO_BUSY]));
    3497         Log(("vmsvgaFIFOLoop: min  %x max  %x\n", pFIFO[SVGA_FIFO_MIN], pFIFO[SVGA_FIFO_MAX]));
    3498         Log(("vmsvgaFIFOLoop: next %x stop %x\n", pFIFO[SVGA_FIFO_NEXT_CMD], pFIFO[SVGA_FIFO_STOP]));
     3508        Log(("vmsvgaR3FifoLoop: enabled=%d configured=%d busy=%d\n", pThis->svga.fEnabled, pThis->svga.fConfigured, pFIFO[SVGA_FIFO_BUSY]));
     3509        Log(("vmsvgaR3FifoLoop: min  %x max  %x\n", pFIFO[SVGA_FIFO_MIN], pFIFO[SVGA_FIFO_MAX]));
     3510        Log(("vmsvgaR3FifoLoop: next %x stop %x\n", pFIFO[SVGA_FIFO_NEXT_CMD], pFIFO[SVGA_FIFO_STOP]));
    34993511
    35003512        /*
     
    35133525            || !pThis->svga.fConfigured)
    35143526        {
    3515             vmsvgaFifoSetNotBusy(pThis, pSVGAState, pFIFO[SVGA_FIFO_MIN]);
     3527            vmsvgaR3FifoSetNotBusy(pThis, pSVGAState, pFIFO[SVGA_FIFO_MIN]);
    35163528            fBadOrDisabledFifo = true;
    35173529            cMsSleep           = cMsMaxSleep; /* cheat */
     
    35383550        {
    35393551            STAM_REL_COUNTER_INC(&pSVGAState->StatFifoErrors);
    3540             LogRelMax(8, ("vmsvgaFIFOLoop: Bad fifo: min=%#x stop=%#x max=%#x\n", offFifoMin, offCurrentCmd, offFifoMax));
    3541             vmsvgaFifoSetNotBusy(pThis, pSVGAState, offFifoMin);
     3552            LogRelMax(8, ("vmsvgaR3FifoLoop: Bad fifo: min=%#x stop=%#x max=%#x\n", offFifoMin, offCurrentCmd, offFifoMax));
     3553            vmsvgaR3FifoSetNotBusy(pThis, pSVGAState, offFifoMin);
    35423554            fBadOrDisabledFifo = true;
    35433555            continue;
     
    35473559        {
    35483560            STAM_REL_COUNTER_INC(&pSVGAState->StatFifoErrors);
    3549             LogRelMax(8, ("vmsvgaFIFOLoop: Misaligned offCurrentCmd=%#x?\n", offCurrentCmd));
     3561            LogRelMax(8, ("vmsvgaR3FifoLoop: Misaligned offCurrentCmd=%#x?\n", offCurrentCmd));
    35503562            offCurrentCmd &= ~UINT32_C(3);
    35513563        }
     
    35623574            else
    35633575            {
    3564                 uint32_t const uLastCursorCount = vmsvgaFIFOUpdateCursor(pThis, pSVGAState, pFIFO, offFifoMin, uCursorUpdateCount,
     3576                uint32_t const uLastCursorCount = vmsvgaR3FifoUpdateCursor(pThis, pSVGAState, pFIFO, offFifoMin, uCursorUpdateCount,
    35653577                                                                         &xLastCursor, &yLastCursor, &fLastCursorVisible);
    35663578                ASMAtomicWriteU32(&pThis->svga.uLastCursorUpdateCount, uLastCursorCount);
     
    35693581
    35703582/** @def VMSVGAFIFO_GET_CMD_BUFFER_BREAK
    3571  * Macro for shortening calls to vmsvgaFIFOGetCmdPayload.
     3583 * Macro for shortening calls to vmsvgaR3FifoGetCmdPayload.
    35723584 *
    35733585 * Will break out of the switch on failure.
     
    35813593# define VMSVGAFIFO_GET_CMD_BUFFER_BREAK(a_PtrVar, a_Type, a_cbPayloadReq) \
    35823594            if (1) { \
    3583                 (a_PtrVar) = (a_Type *)vmsvgaFIFOGetCmdPayload((a_cbPayloadReq), pFIFO, offCurrentCmd, offFifoMin, offFifoMax, \
    3584                                                                pbBounceBuf, &cbPayload, pThread, pThis, pSVGAState, pDevIns); \
     3595                (a_PtrVar) = (a_Type *)vmsvgaR3FifoGetCmdPayload((a_cbPayloadReq), pFIFO, offCurrentCmd, offFifoMin, offFifoMax, \
     3596                                                                 pbBounceBuf, &cbPayload, pThread, pThis, pSVGAState, pDevIns); \
    35853597                if (RT_UNLIKELY((uintptr_t)(a_PtrVar) < 2)) { if ((uintptr_t)(a_PtrVar) == 1) continue; break; } \
    35863598                RT_UNTRUSTED_NONVOLATILE_COPY_FENCE(); \
    35873599            } else do {} while (0)
    35883600/** @def VMSVGAFIFO_GET_MORE_CMD_BUFFER_BREAK
    3589  * Macro for shortening calls to vmsvgaFIFOGetCmdPayload for refetching the
     3601 * Macro for shortening calls to vmsvgaR3FifoGetCmdPayload for refetching the
    35903602 * buffer after figuring out the actual command size.
    35913603 *
     
    36253637            if (ASMBitTestAndClear(&pThis->svga.u32ActionFlags, VMSVGA_ACTION_CHANGEMODE_BIT))
    36263638            {
    3627                 vmsvgaChangeMode(pThis);
     3639                vmsvgaR3ChangeMode(pThis);
    36283640# ifdef VBOX_WITH_VMSVGA3D
    36293641                if (pThis->svga.p3dState != NULL)
     
    36413653            SVGAFifoCmdId const enmCmdId = (SVGAFifoCmdId)pFIFO[offCurrentCmd / sizeof(uint32_t)];
    36423654            RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
    3643             LogFlow(("vmsvgaFIFOLoop: FIFO command (iCmd=0x%x) %s 0x%x\n",
    3644                      offCurrentCmd / sizeof(uint32_t), vmsvgaFIFOCmdToString(enmCmdId), enmCmdId));
     3655            LogFlow(("vmsvgaR3FifoLoop: FIFO command (iCmd=0x%x) %s 0x%x\n",
     3656                     offCurrentCmd / sizeof(uint32_t), vmsvgaR3FifoCmdToString(enmCmdId), enmCmdId));
    36453657            switch (enmCmdId)
    36463658            {
     
    36573669                if (VMSVGA_IS_VALID_FIFO_REG(SVGA_FIFO_FENCE, offFifoMin))
    36583670                {
    3659                     Log(("vmsvgaFIFOLoop: SVGA_CMD_FENCE %x\n", pCmdFence->fence));
     3671                    Log(("vmsvgaR3FifoLoop: SVGA_CMD_FENCE %x\n", pCmdFence->fence));
    36603672                    pFIFO[SVGA_FIFO_FENCE] = pCmdFence->fence;
    36613673
    36623674                    if (pThis->svga.u32IrqMask & SVGA_IRQFLAG_ANY_FENCE)
    36633675                    {
    3664                         Log(("vmsvgaFIFOLoop: any fence irq\n"));
     3676                        Log(("vmsvgaR3FifoLoop: any fence irq\n"));
    36653677                        u32IrqStatus |= SVGA_IRQFLAG_ANY_FENCE;
    36663678                    }
     
    36703682                        &&  pFIFO[SVGA_FIFO_FENCE_GOAL] == pCmdFence->fence)
    36713683                    {
    3672                         Log(("vmsvgaFIFOLoop: fence goal reached irq (fence=%x)\n", pCmdFence->fence));
     3684                        Log(("vmsvgaR3FifoLoop: fence goal reached irq (fence=%x)\n", pCmdFence->fence));
    36733685                        u32IrqStatus |= SVGA_IRQFLAG_FENCE_GOAL;
    36743686                    }
     
    36873699                else
    36883700                    STAM_REL_COUNTER_INC(&pSVGAState->StatR3CmdUpdateVerbose);
    3689                 Log(("vmsvgaFIFOLoop: UPDATE (%d,%d)(%d,%d)\n", pUpdate->x, pUpdate->y, pUpdate->width, pUpdate->height));
     3701                Log(("vmsvgaR3FifoLoop: UPDATE (%d,%d)(%d,%d)\n", pUpdate->x, pUpdate->y, pUpdate->width, pUpdate->height));
    36903702                /** @todo Multiple screens? */
    3691                 VMSVGASCREENOBJECT *pScreen = vmsvgaGetScreenObject(pThis, 0);
     3703                VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThis, 0);
    36923704                AssertBreak(pScreen);
    3693                 vmsvgaUpdateScreen(pThis, pScreen, pUpdate->x, pUpdate->y, pUpdate->width, pUpdate->height);
     3705                vmsvgaR3UpdateScreen(pThis, pScreen, pUpdate->x, pUpdate->y, pUpdate->width, pUpdate->height);
    36943706                break;
    36953707            }
     
    37023714                STAM_REL_COUNTER_INC(&pSVGAState->StatR3CmdDefineCursor);
    37033715
    3704                 Log(("vmsvgaFIFOLoop: CURSOR id=%d size (%d,%d) hotspot (%d,%d) andMaskDepth=%d xorMaskDepth=%d\n",
     3716                Log(("vmsvgaR3FifoLoop: CURSOR id=%d size (%d,%d) hotspot (%d,%d) andMaskDepth=%d xorMaskDepth=%d\n",
    37053717                     pCursor->id, pCursor->width, pCursor->height, pCursor->hotspotX, pCursor->hotspotY,
    37063718                     pCursor->andMaskDepth, pCursor->xorMaskDepth));
     
    37323744                STAM_REL_COUNTER_INC(&pSVGAState->StatR3CmdDefineAlphaCursor);
    37333745
    3734                 Log(("vmsvgaFIFOLoop: ALPHA_CURSOR id=%d size (%d,%d) hotspot (%d,%d)\n", pCursor->id, pCursor->width, pCursor->height, pCursor->hotspotX, pCursor->hotspotY));
     3746                Log(("vmsvgaR3FifoLoop: ALPHA_CURSOR id=%d size (%d,%d) hotspot (%d,%d)\n", pCursor->id, pCursor->width, pCursor->height, pCursor->hotspotX, pCursor->hotspotY));
    37353747
    37363748                /* Check against a reasonable upper limit to prevent integer overflows in the sanity checks below. */
     
    37793791                    RT_UNTRUSTED_VALIDATED_FENCE();
    37803792                    uint32_t cmd = *(uint32_t *)(pEscape + 1);
    3781                     Log(("vmsvgaFIFOLoop: ESCAPE (%x %x) VMWARE cmd=%x\n", pEscape->nsid, pEscape->size, cmd));
     3793                    Log(("vmsvgaR3FifoLoop: ESCAPE (%x %x) VMWARE cmd=%x\n", pEscape->nsid, pEscape->size, cmd));
    37823794
    37833795                    switch (cmd)
     
    38133825                }
    38143826                else
    3815                     Log(("vmsvgaFIFOLoop: ESCAPE %x %x\n", pEscape->nsid, pEscape->size));
     3827                    Log(("vmsvgaR3FifoLoop: ESCAPE %x %x\n", pEscape->nsid, pEscape->size));
    38163828
    38173829                break;
     
    38223834                SVGAFifoCmdDefineGMR2 *pCmd;
    38233835                VMSVGAFIFO_GET_CMD_BUFFER_BREAK(pCmd, SVGAFifoCmdDefineGMR2, sizeof(*pCmd));
    3824                 Log(("vmsvgaFIFOLoop: SVGA_CMD_DEFINE_GMR2 id=%x %x pages\n", pCmd->gmrId, pCmd->numPages));
     3836                Log(("vmsvgaR3FifoLoop: SVGA_CMD_DEFINE_GMR2 id=%x %x pages\n", pCmd->gmrId, pCmd->numPages));
    38253837                STAM_REL_COUNTER_INC(&pSVGAState->StatR3CmdDefineGmr2);
    38263838
     
    38333845                {
    38343846                    STAM_REL_COUNTER_INC(&pSVGAState->StatR3CmdDefineGmr2Free);
    3835                     vmsvgaGMRFree(pThis, pCmd->gmrId);
     3847                    vmsvgaR3GmrFree(pThis, pCmd->gmrId);
    38363848                }
    38373849                else
     
    38453857                    /** @todo always free the descriptor in SVGA_CMD_DEFINE_GMR2? */
    38463858                    if (pGMR->cbTotal / X86_PAGE_SIZE > pGMR->cMaxPages)
    3847                         vmsvgaGMRFree(pThis, pCmd->gmrId);
     3859                        vmsvgaR3GmrFree(pThis, pCmd->gmrId);
    38483860
    38493861                    pGMR->cMaxPages = pCmd->numPages;
     
    38603872                STAM_REL_COUNTER_INC(&pSVGAState->StatR3CmdRemapGmr2);
    38613873
    3862                 Log(("vmsvgaFIFOLoop: SVGA_CMD_REMAP_GMR2 id=%x flags=%x offset=%x npages=%x\n", pCmd->gmrId, pCmd->flags, pCmd->offsetPages, pCmd->numPages));
     3874                Log(("vmsvgaR3FifoLoop: SVGA_CMD_REMAP_GMR2 id=%x flags=%x offset=%x npages=%x\n", pCmd->gmrId, pCmd->flags, pCmd->offsetPages, pCmd->numPages));
    38633875                AssertBreak(pCmd->gmrId < pThis->svga.cGMR);
    38643876                RT_UNTRUSTED_VALIDATED_FENCE();
     
    40054017
    40064018#  ifdef DEBUG_GMR_ACCESS
    4007                 VMR3ReqCallWaitU(PDMDevHlpGetUVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaRegisterGMR, 2, pThis->pDevInsR3, pCmd->gmrId);
     4019                VMR3ReqCallWaitU(PDMDevHlpGetUVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaR3RegisterGmr, 2, pThis->pDevInsR3, pCmd->gmrId);
    40084020#  endif
    40094021                break;
     
    40764088
    40774089                pThis->svga.fGFBRegisters = false;
    4078                 vmsvgaChangeMode(pThis);
     4090                vmsvgaR3ChangeMode(pThis);
    40794091                break;
    40804092            }
     
    40864098                STAM_REL_COUNTER_INC(&pSVGAState->StatR3CmdDestroyScreen);
    40874099
    4088                 Log(("vmsvgaFIFOLoop: SVGA_CMD_DESTROY_SCREEN id=%x\n", pCmd->screenId));
     4100                Log(("vmsvgaR3FifoLoop: SVGA_CMD_DESTROY_SCREEN id=%x\n", pCmd->screenId));
    40894101
    40904102                uint32_t const idScreen = pCmd->screenId;
     
    40974109                pScreen->idScreen  = idScreen;
    40984110
    4099                 vmsvgaChangeMode(pThis);
     4111                vmsvgaR3ChangeMode(pThis);
    41004112                break;
    41014113            }
     
    41074119                STAM_REL_COUNTER_INC(&pSVGAState->StatR3CmdDefineGmrFb);
    41084120
    4109                 Log(("vmsvgaFIFOLoop: SVGA_CMD_DEFINE_GMRFB gmr=%x offset=%x bytesPerLine=%x bpp=%d color depth=%d\n", pCmd->ptr.gmrId, pCmd->ptr.offset, pCmd->bytesPerLine, pCmd->format.s.bitsPerPixel, pCmd->format.s.colorDepth));
     4121                Log(("vmsvgaR3FifoLoop: SVGA_CMD_DEFINE_GMRFB gmr=%x offset=%x bytesPerLine=%x bpp=%d color depth=%d\n", pCmd->ptr.gmrId, pCmd->ptr.offset, pCmd->bytesPerLine, pCmd->format.s.bitsPerPixel, pCmd->format.s.colorDepth));
    41104122                pSVGAState->GMRFB.ptr          = pCmd->ptr;
    41114123                pSVGAState->GMRFB.bytesPerLine = pCmd->bytesPerLine;
     
    41264138                RT_UNTRUSTED_VALIDATED_FENCE();
    41274139
    4128                 VMSVGASCREENOBJECT *pScreen = vmsvgaGetScreenObject(pThis, pCmd->destScreenId);
     4140                VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThis, pCmd->destScreenId);
    41294141                AssertBreak(pScreen);
    41304142
     
    41394151                screenRect.bottom = pScreen->cHeight;
    41404152                SVGASignedRect clipRect = pCmd->destRect;
    4141                 vmsvgaClipRect(&screenRect, &clipRect);
     4153                vmsvgaR3ClipRect(&screenRect, &clipRect);
    41424154                RT_UNTRUSTED_VALIDATED_FENCE();
    41434155
     
    41534165
    41544166                /* Copy the defined by GMRFB image to the screen 0 VRAM area.
    4155                  * Prepare parameters for vmsvgaGMRTransfer.
     4167                 * Prepare parameters for vmsvgaR3GmrTransfer.
    41564168                 */
    41574169                AssertBreak(pScreen->offVRAM < pThis->vram_size); /* Paranoia. Ensured by SVGA_CMD_DEFINE_SCREEN. */
    41584170
    41594171                /* Destination: host buffer which describes the screen 0 VRAM.
    4160                  * Important are pbHstBuf and cbHstBuf. offHst and cbHstPitch are verified by vmsvgaGMRTransfer.
     4172                 * Important are pbHstBuf and cbHstBuf. offHst and cbHstPitch are verified by vmsvgaR3GmrTransfer.
    41614173                 */
    41624174                uint8_t * const pbHstBuf = (uint8_t *)pThis->CTX_SUFF(vram_ptr) + pScreen->offVRAM;
     
    41704182                int32_t const cbHstPitch = cbScanline;
    41714183
    4172                 /* Source: GMRFB. vmsvgaGMRTransfer ensures that no memory outside the GMR is read. */
     4184                /* Source: GMRFB. vmsvgaR3GmrTransfer ensures that no memory outside the GMR is read. */
    41734185                SVGAGuestPtr const gstPtr = pSVGAState->GMRFB.ptr;
    41744186                uint32_t const offGst =  (srcx * RT_ALIGN(pSVGAState->GMRFB.format.s.bitsPerPixel, 8)) / 8
     
    41764188                int32_t const cbGstPitch = pSVGAState->GMRFB.bytesPerLine;
    41774189
    4178                 rc = vmsvgaGMRTransfer(pThis, SVGA3D_WRITE_HOST_VRAM,
     4190                rc = vmsvgaR3GmrTransfer(pThis, SVGA3D_WRITE_HOST_VRAM,
    41794191                                       pbHstBuf, cbHstBuf, offHst, cbHstPitch,
    41804192                                       gstPtr, offGst, cbGstPitch,
    41814193                                       (width * RT_ALIGN(pScreen->cBpp, 8)) / 8, height);
    41824194                AssertRC(rc);
    4183                 vmsvgaUpdateScreen(pThis, pScreen, clipRect.left, clipRect.top, width, height);
     4195                vmsvgaR3UpdateScreen(pThis, pScreen, clipRect.left, clipRect.top, width, height);
    41844196                break;
    41854197            }
     
    41984210                RT_UNTRUSTED_VALIDATED_FENCE();
    41994211
    4200                 VMSVGASCREENOBJECT *pScreen = vmsvgaGetScreenObject(pThis, pCmd->srcScreenId);
     4212                VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThis, pCmd->srcScreenId);
    42014213                AssertBreak(pScreen);
    42024214
     
    42114223                screenRect.bottom = pScreen->cHeight;
    42124224                SVGASignedRect clipRect = pCmd->srcRect;
    4213                 vmsvgaClipRect(&screenRect, &clipRect);
     4225                vmsvgaR3ClipRect(&screenRect, &clipRect);
    42144226                RT_UNTRUSTED_VALIDATED_FENCE();
    42154227
     
    42254237
    42264238                /* Copy the defined by GMRFB image to the screen 0 VRAM area.
    4227                  * Prepare parameters for vmsvgaGMRTransfer.
     4239                 * Prepare parameters for vmsvgaR3GmrTransfer.
    42284240                 */
    42294241                AssertBreak(pScreen->offVRAM < pThis->vram_size); /* Paranoia. Ensured by SVGA_CMD_DEFINE_SCREEN. */
    42304242
    42314243                /* Source: host buffer which describes the screen 0 VRAM.
    4232                  * Important are pbHstBuf and cbHstBuf. offHst and cbHstPitch are verified by vmsvgaGMRTransfer.
     4244                 * Important are pbHstBuf and cbHstBuf. offHst and cbHstPitch are verified by vmsvgaR3GmrTransfer.
    42334245                 */
    42344246                uint8_t * const pbHstBuf = (uint8_t *)pThis->CTX_SUFF(vram_ptr) + pScreen->offVRAM;
     
    42424254                int32_t const cbHstPitch = cbScanline;
    42434255
    4244                 /* Destination: GMRFB. vmsvgaGMRTransfer ensures that no memory outside the GMR is read. */
     4256                /* Destination: GMRFB. vmsvgaR3GmrTransfer ensures that no memory outside the GMR is read. */
    42454257                SVGAGuestPtr const gstPtr = pSVGAState->GMRFB.ptr;
    42464258                uint32_t const offGst =  (dstx * RT_ALIGN(pSVGAState->GMRFB.format.s.bitsPerPixel, 8)) / 8
     
    42484260                int32_t const cbGstPitch = pSVGAState->GMRFB.bytesPerLine;
    42494261
    4250                 rc = vmsvgaGMRTransfer(pThis, SVGA3D_READ_HOST_VRAM,
    4251                                        pbHstBuf, cbHstBuf, offHst, cbHstPitch,
    4252                                        gstPtr, offGst, cbGstPitch,
    4253                                        (width * RT_ALIGN(pScreen->cBpp, 8)) / 8, height);
     4262                rc = vmsvgaR3GmrTransfer(pThis, SVGA3D_READ_HOST_VRAM,
     4263                                         pbHstBuf, cbHstBuf, offHst, cbHstPitch,
     4264                                         gstPtr, offGst, cbGstPitch,
     4265                                         (width * RT_ALIGN(pScreen->cBpp, 8)) / 8, height);
    42544266                AssertRC(rc);
    42554267                break;
     
    42624274                STAM_REL_COUNTER_INC(&pSVGAState->StatR3CmdAnnotationFill);
    42634275
    4264                 Log(("vmsvgaFIFOLoop: SVGA_CMD_ANNOTATION_FILL red=%x green=%x blue=%x\n", pCmd->color.s.r, pCmd->color.s.g, pCmd->color.s.b));
     4276                Log(("vmsvgaR3FifoLoop: SVGA_CMD_ANNOTATION_FILL red=%x green=%x blue=%x\n", pCmd->color.s.r, pCmd->color.s.g, pCmd->color.s.b));
    42654277                pSVGAState->colorAnnotation = pCmd->color;
    42664278                break;
     
    42734285                STAM_REL_COUNTER_INC(&pSVGAState->StatR3CmdAnnotationCopy);
    42744286
    4275                 Log(("vmsvgaFIFOLoop: SVGA_CMD_ANNOTATION_COPY\n"));
     4287                Log(("vmsvgaR3FifoLoop: SVGA_CMD_ANNOTATION_COPY\n"));
    42764288                AssertFailed();
    42774289                break;
     
    43244336                                                   SVGA3D_TEX_FILTER_NONE, cMipLevels, (SVGA3dSize *)(pCmd + 1));
    43254337#  ifdef DEBUG_GMR_ACCESS
    4326                         VMR3ReqCallWaitU(PDMDevHlpGetUVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaResetGMRHandlers, 1, pThis);
     4338                        VMR3ReqCallWaitU(PDMDevHlpGetUVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaR3ResetGmrHandlers, 1, pThis);
    43274339#  endif
    43284340                        break;
     
    47224734                if (pThis->svga.u32IrqMask & SVGA_IRQFLAG_FIFO_PROGRESS)
    47234735                {
    4724                     Log(("vmsvgaFIFOLoop: fifo progress irq\n"));
     4736                    Log(("vmsvgaR3FifoLoop: fifo progress irq\n"));
    47254737                    u32IrqStatus |= SVGA_IRQFLAG_FIFO_PROGRESS;
    47264738                }
     
    47294741                if (pThis->svga.u32IrqMask & u32IrqStatus)
    47304742                {
    4731                     Log(("vmsvgaFIFOLoop: Trigger interrupt with status %x\n", u32IrqStatus));
     4743                    Log(("vmsvgaR3FifoLoop: Trigger interrupt with status %x\n", u32IrqStatus));
    47324744                    ASMAtomicOrU32(&pThis->svga.u32IrqStatus, u32IrqStatus);
    47334745                    PDMDevHlpPCISetIrq(pDevIns, 0, 1);
     
    47414753        if (fDone)
    47424754        {
    4743             Log(("vmsvgaFIFOLoop: emptied the FIFO next=%x stop=%x\n", pFIFO[SVGA_FIFO_NEXT_CMD], offCurrentCmd));
    4744             vmsvgaFifoSetNotBusy(pThis, pSVGAState, offFifoMin);
     4755            Log(("vmsvgaR3FifoLoop: emptied the FIFO next=%x stop=%x\n", pFIFO[SVGA_FIFO_NEXT_CMD], offCurrentCmd));
     4756            vmsvgaR3FifoSetNotBusy(pThis, pSVGAState, offFifoMin);
    47454757        }
    47464758    }
     
    47604772 * @param   idGMR           GMR id
    47614773 */
    4762 void vmsvgaGMRFree(PVGASTATE pThis, uint32_t idGMR)
     4774void vmsvgaR3GmrFree(PVGASTATE pThis, uint32_t idGMR)
    47634775{
    47644776    PVMSVGAR3STATE pSVGAState = pThis->svga.pSvgaR3State;
     
    47704782    {
    47714783# ifdef DEBUG_GMR_ACCESS
    4772         VMR3ReqCallWaitU(PDMDevHlpGetUVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaDeregisterGMR, 2, pThis->pDevInsR3, idGMR);
     4784        VMR3ReqCallWaitU(PDMDevHlpGetUVM(pThis->pDevInsR3), VMCPUID_ANY, (PFNRT)vmsvgaR3DeregisterGmr, 2, pThis->pDevInsR3, idGMR);
    47734785# endif
    47744786
     
    48004812 * @param   cHeight         Number of scanllines to copy
    48014813 */
    4802 int vmsvgaGMRTransfer(PVGASTATE pThis, const SVGA3dTransferType enmTransferType,
    4803                       uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
    4804                       SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
    4805                       uint32_t cbWidth, uint32_t cHeight)
     4814int vmsvgaR3GmrTransfer(PVGASTATE pThis, const SVGA3dTransferType enmTransferType,
     4815                        uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
     4816                        SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
     4817                        uint32_t cbWidth, uint32_t cHeight)
    48064818{
    48074819    PVMSVGAR3STATE pSVGAState = pThis->svga.pSvgaR3State;
     
    50425054 * @param   pBox        Coordinates to be clipped.
    50435055 */
    5044 void vmsvgaClipCopyBox(const SVGA3dSize *pSizeSrc,
    5045                        const SVGA3dSize *pSizeDest,
    5046                        SVGA3dCopyBox *pBox)
     5056void vmsvgaR3ClipCopyBox(const SVGA3dSize *pSizeSrc, const SVGA3dSize *pSizeDest, SVGA3dCopyBox *pBox)
    50475057{
    50485058    /* Src x, w */
     
    50895099 * @param   pBox    Coordinates to be clipped.
    50905100 */
    5091 void vmsvgaClipBox(const SVGA3dSize *pSize,
    5092                    SVGA3dBox *pBox)
     5101void vmsvgaR3ClipBox(const SVGA3dSize *pSize, SVGA3dBox *pBox)
    50935102{
    50945103    /* x, w */
     
    51175126 * @param   pRect   Rectangle to be clipped.
    51185127 */
    5119 void vmsvgaClipRect(SVGASignedRect const *pBound,
    5120                     SVGASignedRect *pRect)
     5128void vmsvgaR3ClipRect(SVGASignedRect const *pBound, SVGASignedRect *pRect)
    51215129{
    51225130    int32_t left;
     
    51755183
    51765184/**
    5177  * Unblock the FIFO I/O thread so it can respond to a state change.
    5178  *
    5179  * @returns VBox status code.
    5180  * @param   pDevIns     The VGA device instance.
    5181  * @param   pThread     The send thread.
     5185 * @callback_method_impl{PFNPDMTHREADWAKEUPDEV,
     5186 * Unblock the FIFO I/O thread so it can respond to a state change.}
    51825187 */
    5183 static DECLCALLBACK(int) vmsvgaFIFOLoopWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
     5188static DECLCALLBACK(int) vmsvgaR3FifoLoopWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
    51845189{
    51855190    RT_NOREF(pDevIns);
    51865191    PVGASTATE pThis = (PVGASTATE)pThread->pvUser;
    5187     Log(("vmsvgaFIFOLoopWakeUp\n"));
     5192    Log(("vmsvgaR3FifoLoopWakeUp\n"));
    51885193    return PDMDevHlpSUPSemEventSignal(pDevIns, pThis->svga.hFIFORequestSem);
    51895194}
     
    51955200 * @param   fTraces         Enable/disable traces
    51965201 */
    5197 static void vmsvgaSetTraces(PVGASTATE pThis, bool fTraces)
     5202static void vmsvgaR3SetTraces(PVGASTATE pThis, bool fTraces)
    51985203{
    51995204    if (    (!pThis->svga.fConfigured || !pThis->svga.fEnabled)
     
    52015206    {
    52025207        //Assert(pThis->svga.fTraces);
    5203         Log(("vmsvgaSetTraces: *not* allowed to disable dirty page tracking when the device is in legacy mode.\n"));
     5208        Log(("vmsvgaR3SetTraces: *not* allowed to disable dirty page tracking when the device is in legacy mode.\n"));
    52045209        return;
    52055210    }
     
    52105215        unsigned cbFrameBuffer = pThis->vram_size;
    52115216
    5212         Log(("vmsvgaSetTraces: enable dirty page handling for the frame buffer only (%x bytes)\n", 0));
     5217        Log(("vmsvgaR3SetTraces: enable dirty page handling for the frame buffer only (%x bytes)\n", 0));
    52135218        /** @todo How does this work with screens? */
    52145219        if (pThis->svga.uHeight != VMSVGA_VAL_UNINITIALIZED)
    52155220        {
    5216 #ifndef DEBUG_bird /* BB-10.3.1 triggers this as it initializes everything to zero. Better just ignore it. */
     5221# ifndef DEBUG_bird /* BB-10.3.1 triggers this as it initializes everything to zero. Better just ignore it. */
    52175222            Assert(pThis->svga.cbScanline);
    5218 #endif
     5223# endif
    52195224            /* Hardware enabled; return real framebuffer size .*/
    52205225            cbFrameBuffer = (uint32_t)pThis->svga.uHeight * pThis->svga.cbScanline;
     
    52245229        if (!pThis->svga.fVRAMTracking)
    52255230        {
    5226             Log(("vmsvgaSetTraces: enable frame buffer dirty page tracking. (%x bytes; vram %x)\n", cbFrameBuffer, pThis->vram_size));
     5231            Log(("vmsvgaR3SetTraces: enable frame buffer dirty page tracking. (%x bytes; vram %x)\n", cbFrameBuffer, pThis->vram_size));
    52275232            vgaR3RegisterVRAMHandler(pThis, cbFrameBuffer);
    52285233            pThis->svga.fVRAMTracking = true;
     
    52335238        if (pThis->svga.fVRAMTracking)
    52345239        {
    5235             Log(("vmsvgaSetTraces: disable frame buffer dirty page tracking\n"));
     5240            Log(("vmsvgaR3SetTraces: disable frame buffer dirty page tracking\n"));
    52365241            vgaR3UnregisterVRAMHandler(pThis);
    52375242            pThis->svga.fVRAMTracking = false;
     
    53095314 *                              are processed.
    53105315 */
    5311 void vmsvga3dSurfaceUpdateHeapBuffersOnFifoThread(PPDMDEVINS pDevIns, PVGASTATE pThis, uint32_t sid)
     5316void vmsvgaR33dSurfaceUpdateHeapBuffersOnFifoThread(PPDMDEVINS pDevIns, PVGASTATE pThis, uint32_t sid)
    53125317{
    53135318    vmsvgaR3RunExtCmdOnFifoThread(pDevIns, pThis, VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS, (void *)(uintptr_t)sid,
     
    54595464}
    54605465
    5461 /** Portion of VMSVGA state which must be loaded oin the FIFO thread.
     5466/**
     5467 * Portion of VMSVGA state which must be loaded oin the FIFO thread.
    54625468 */
    5463 static int vmsvgaLoadExecFifo(PCPDMDEVHLPR3 pHlp, PVGASTATE pThis, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
     5469static int vmsvgaR3LoadExecFifo(PCPDMDEVHLPR3 pHlp, PVGASTATE pThis, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
    54645470{
    54655471    RT_NOREF(uPass);
     
    55205526 * @copydoc FNSSMDEVLOADEXEC
    55215527 */
    5522 int vmsvgaLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
     5528int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
    55235529{
    55245530    RT_NOREF(uPass);
     
    56265632 * Reinit the video mode after the state has been loaded.
    56275633 */
    5628 int vmsvgaLoadDone(PPDMDEVINS pDevIns)
     5634int vmsvgaR3LoadDone(PPDMDEVINS pDevIns)
    56295635{
    56305636    PVGASTATE       pThis      = PDMINS_2_DATA(pDevIns, PVGASTATE);
     
    56545660 * Portion of SVGA state which must be saved in the FIFO thread.
    56555661 */
    5656 static int vmsvgaSaveExecFifo(PCPDMDEVHLPR3 pHlp, PVGASTATE pThis, PSSMHANDLE pSSM)
     5662static int vmsvgaR3SaveExecFifo(PCPDMDEVHLPR3 pHlp, PVGASTATE pThis, PSSMHANDLE pSSM)
    56575663{
    56585664    PVMSVGAR3STATE  pSVGAState = pThis->svga.pSvgaR3State;
     
    56845690 * @copydoc FNSSMDEVSAVEEXEC
    56855691 */
    5686 int vmsvgaSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
     5692int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
    56875693{
    56885694    PVGASTATE       pThis      = PDMINS_2_DATA(pDevIns, PVGASTATE);
     
    57455751static void vmsvgaR3StateTerm(PVGASTATE pThis, PVMSVGAR3STATE pSVGAState)
    57465752{
    5747 #ifndef VMSVGA_USE_EMT_HALT_CODE
     5753# ifndef VMSVGA_USE_EMT_HALT_CODE
    57485754    if (pSVGAState->hBusyDelayedEmts != NIL_RTSEMEVENTMULTI)
    57495755    {
     
    57515757        pSVGAState->hBusyDelayedEmts = NIL_RTSEMEVENT;
    57525758    }
    5753 #endif
     5759# endif
    57545760
    57555761    if (pSVGAState->Cursor.fActive)
     
    57865792    AssertReturn(pSVGAState->paGMR, VERR_NO_MEMORY);
    57875793
    5788 #ifndef VMSVGA_USE_EMT_HALT_CODE
     5794# ifndef VMSVGA_USE_EMT_HALT_CODE
    57895795    /* Create semaphore for delaying EMTs wait for the FIFO to stop being busy. */
    57905796    rc = RTSemEventMultiCreate(&pSVGAState->hBusyDelayedEmts);
    57915797    AssertRCReturn(rc, rc);
    5792 #endif
     5798# endif
    57935799
    57945800    return rc;
     
    58015807 * @param   pThis     The VGA instance.
    58025808 */
    5803 static void vmsvgaInitCaps(PVGASTATE pThis)
     5809static void vmsvgaR3InitCaps(PVGASTATE pThis)
    58045810{
    58055811    /* Register caps. */
     
    59305936 * @param   pThis     The VGA instance.
    59315937 */
    5932 static void vmsvgaInitFifo3DCaps(PVGASTATE pThis)
     5938static void vmsvgaR3InitFifo3DCaps(PVGASTATE pThis)
    59335939{
    59345940    /** @todo Probably query the capabilities once and cache in a memory buffer. */
     
    59835989 * @param   pDevIns     The device instance.
    59845990 */
    5985 int vmsvgaReset(PPDMDEVINS pDevIns)
     5991int vmsvgaR3Reset(PPDMDEVINS pDevIns)
    59865992{
    59875993    PVGASTATE       pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
     
    59925998        return VINF_SUCCESS;
    59935999
    5994     Log(("vmsvgaReset\n"));
     6000    Log(("vmsvgaR3Reset\n"));
    59956001
    59966002    /* Reset the FIFO processing as well as the 3d state (if we have one). */
     
    60086014
    60096015    /* Initialize FIFO and register capabilities. */
    6010     vmsvgaInitCaps(pThis);
     6016    vmsvgaR3InitCaps(pThis);
    60116017
    60126018# ifdef VBOX_WITH_VMSVGA3D
    60136019    if (pThis->svga.f3DEnabled)
    6014         vmsvgaInitFifo3DCaps(pThis);
     6020        vmsvgaR3InitFifo3DCaps(pThis);
    60156021# endif
    60166022
     
    60356041 * @param   pDevIns     The device instance.
    60366042 */
    6037 int vmsvgaDestruct(PPDMDEVINS pDevIns)
     6043int vmsvgaR3Destruct(PPDMDEVINS pDevIns)
    60386044{
    60396045    PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
     
    60916097 * @param   pDevIns     The device instance.
    60926098 */
    6093 int vmsvgaInit(PPDMDEVINS pDevIns)
     6099int vmsvgaR3Init(PPDMDEVINS pDevIns)
    60946100{
    60956101    PVGASTATE       pThis = PDMINS_2_DATA(pDevIns, PVGASTATE);
     
    61236129
    61246130    /* Initialize FIFO and register capabilities. */
    6125     vmsvgaInitCaps(pThis);
     6131    vmsvgaR3InitCaps(pThis);
    61266132
    61276133# ifdef VBOX_WITH_VMSVGA3D
     
    61576163    /* Register the GMR access handler type. */
    61586164    rc = PGMR3HandlerPhysicalTypeRegister(PDMDevHlpGetVM(pThis->pDevInsR3), PGMPHYSHANDLERKIND_WRITE,
    6159                                           vmsvgaR3GMRAccessHandler,
     6165                                          vmsvgaR3GmrAccessHandler,
    61606166                                          NULL, NULL, NULL,
    61616167                                          NULL, NULL, NULL,
     
    61746180                                          PGMPHYSHANDLERKIND_WRITE,
    61756181#  endif
    6176                                           vmsvgaR3FIFOAccessHandler,
     6182                                          vmsvgaR3FifoAccessHandler,
    61776183                                          NULL, NULL, NULL,
    61786184                                          NULL, NULL, NULL,
     
    61826188
    61836189    /* Create the async IO thread. */
    6184     rc = PDMDevHlpThreadCreate(pDevIns, &pThis->svga.pFIFOIOThread, pThis, vmsvgaFIFOLoop, vmsvgaFIFOLoopWakeUp, 0,
    6185                                 RTTHREADTYPE_IO, "VMSVGA FIFO");
     6190    rc = PDMDevHlpThreadCreate(pDevIns, &pThis->svga.pFIFOIOThread, pThis, vmsvgaR3FifoLoop, vmsvgaR3FifoLoopWakeUp, 0,
     6191                               RTTHREADTYPE_IO, "VMSVGA FIFO");
    61866192    if (RT_FAILURE(rc))
    61876193    {
     
    61936199     * Statistics.
    61946200     */
    6195 #define REG_CNT(a_pvSample, a_pszName, a_pszDesc) \
     6201# define REG_CNT(a_pvSample, a_pszName, a_pszDesc) \
    61966202        PDMDevHlpSTAMRegister(pDevIns, (a_pvSample), STAMTYPE_COUNTER, a_pszName, STAMUNIT_OCCURENCES, a_pszDesc)
    6197 #define REG_PRF(a_pvSample, a_pszName, a_pszDesc) \
     6203# define REG_PRF(a_pvSample, a_pszName, a_pszDesc) \
    61986204        PDMDevHlpSTAMRegister(pDevIns, (a_pvSample), STAMTYPE_PROFILE, a_pszName, STAMUNIT_TICKS_PER_CALL, a_pszDesc)
    6199 #ifdef VBOX_WITH_STATISTICS
     6205# ifdef VBOX_WITH_STATISTICS
    62006206    REG_PRF(&pSVGAState->StatR3Cmd3dDrawPrimitivesProf,   "VMSVGA/Cmd/3dDrawPrimitivesProf",       "Profiling of SVGA_3D_CMD_DRAW_PRIMITIVES.");
    62016207    REG_PRF(&pSVGAState->StatR3Cmd3dPresentProf,          "VMSVGA/Cmd/3dPresentProfBoth",          "Profiling of SVGA_3D_CMD_PRESENT and SVGA_3D_CMD_PRESENT_READBACK.");
    62026208    REG_PRF(&pSVGAState->StatR3Cmd3dSurfaceDmaProf,       "VMSVGA/Cmd/3dSurfaceDmaProf",           "Profiling of SVGA_3D_CMD_SURFACE_DMA.");
    6203 #endif
     6209# endif
    62046210    REG_CNT(&pSVGAState->StatR3Cmd3dActivateSurface,      "VMSVGA/Cmd/3dActivateSurface",          "SVGA_3D_CMD_ACTIVATE_SURFACE");
    62056211    REG_CNT(&pSVGAState->StatR3Cmd3dBeginQuery,           "VMSVGA/Cmd/3dBeginQuery",               "SVGA_3D_CMD_BEGIN_QUERY");
     
    63566362    REG_CNT(&pSVGAState->StatFifoWatchdogWakeUps,         "VMSVGA/FifoWatchdogWakeUps",            "Number of times the FIFO refresh poller/watchdog woke up the FIFO thread.");
    63576363
    6358 #undef REG_CNT
    6359 #undef REG_PRF
     6364# undef REG_CNT
     6365# undef REG_PRF
    63606366
    63616367    /*
     
    63976403        {
    63986404            /* Initialize FIFO 3D capabilities. */
    6399             vmsvgaInitFifo3DCaps(pThis);
     6405            vmsvgaR3InitFifo3DCaps(pThis);
    64006406        }
    64016407    }
  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h

    r82088 r82089  
    369369                                         uint32_t x, uint32_t y, uint32_t cx, uint32_t cy);
    370370
    371 int vmsvgaInit(PPDMDEVINS pDevIns);
    372 int vmsvgaReset(PPDMDEVINS pDevIns);
    373 int vmsvgaDestruct(PPDMDEVINS pDevIns);
    374 int vmsvgaLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
    375 int vmsvgaLoadDone(PPDMDEVINS pDevIns);
    376 int vmsvgaSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
     371int vmsvgaR3Init(PPDMDEVINS pDevIns);
     372int vmsvgaR3Reset(PPDMDEVINS pDevIns);
     373int vmsvgaR3Destruct(PPDMDEVINS pDevIns);
     374int vmsvgaR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass);
     375int vmsvgaR3LoadDone(PPDMDEVINS pDevIns);
     376int vmsvgaR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
    377377DECLCALLBACK(void) vmsvgaR3PowerOn(PPDMDEVINS pDevIns);
    378378DECLCALLBACK(void) vmsvgaR3PowerOff(PPDMDEVINS pDevIns);
    379 void vmsvgaFIFOWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis);
     379void vmsvgaR3FifoWatchdogTimer(PPDMDEVINS pDevIns, PVGASTATE pThis);
    380380
    381381#ifdef IN_RING3
    382 VMSVGASCREENOBJECT *vmsvgaGetScreenObject(PVGASTATE pThis, uint32_t idScreen);
    383 int vmsvgaUpdateScreen(PVGASTATE pThis, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
    384 #endif
    385 
    386 void vmsvgaGMRFree(PVGASTATE pThis, uint32_t idGMR);
    387 int vmsvgaGMRTransfer(PVGASTATE pThis, const SVGA3dTransferType enmTransferType,
    388                       uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
    389                       SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
    390                       uint32_t cbWidth, uint32_t cHeight);
    391 
    392 void vmsvgaClipCopyBox(const SVGA3dSize *pSizeSrc,
    393                        const SVGA3dSize *pSizeDest,
    394                        SVGA3dCopyBox *pBox);
    395 void vmsvgaClipBox(const SVGA3dSize *pSize,
    396                    SVGA3dBox *pBox);
    397 void vmsvgaClipRect(SVGASignedRect const *pBound,
    398                     SVGASignedRect *pRect);
     382VMSVGASCREENOBJECT *vmsvgaR3GetScreenObject(PVGASTATE pThis, uint32_t idScreen);
     383int vmsvgaR3UpdateScreen(PVGASTATE pThis, VMSVGASCREENOBJECT *pScreen, int x, int y, int w, int h);
     384#endif
     385
     386void vmsvgaR3GmrFree(PVGASTATE pThis, uint32_t idGMR);
     387int vmsvgaR3GmrTransfer(PVGASTATE pThis, const SVGA3dTransferType enmTransferType,
     388                        uint8_t *pbHstBuf, uint32_t cbHstBuf, uint32_t offHst, int32_t cbHstPitch,
     389                        SVGAGuestPtr gstPtr, uint32_t offGst, int32_t cbGstPitch,
     390                        uint32_t cbWidth, uint32_t cHeight);
     391
     392void vmsvgaR3ClipCopyBox(const SVGA3dSize *pSizeSrc, const SVGA3dSize *pSizeDest, SVGA3dCopyBox *pBox);
     393void vmsvgaR3ClipBox(const SVGA3dSize *pSize, SVGA3dBox *pBox);
     394void vmsvgaR3ClipRect(SVGASignedRect const *pBound, SVGASignedRect *pRect);
    399395
    400396#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_SVGA_h */
  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-info.cpp

    r82053 r82089  
    20992099                {
    21002100                    if (fVerbose)
    2101                         vmsvga3dSurfaceUpdateHeapBuffersOnFifoThread(pDevIns, pThis, sid);
     2101                        vmsvgaR33dSurfaceUpdateHeapBuffersOnFifoThread(pDevIns, pThis, sid);
    21022102                    vmsvga3dInfoSurfaceWorkerOne(pHlp, pSurface, fVerbose, cxAscii, fInvY);
    21032103                    if (pszBitmapPath && *pszBitmapPath)
     
    21142114             */
    21152115            if (fVerbose)
    2116                 vmsvga3dSurfaceUpdateHeapBuffersOnFifoThread(pDevIns, pThis, UINT32_MAX);
     2116                vmsvgaR33dSurfaceUpdateHeapBuffersOnFifoThread(pDevIns, pThis, UINT32_MAX);
    21172117            uint32_t cSurfaces = pState->cSurfaces;
    21182118            pHlp->pfnPrintf(pHlp, "cSurfaces=%d\n", cSurfaces);
  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-ogl.cpp

    r82003 r82089  
    27662766        uint32_t const offGst = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
    27672767
    2768         rc = vmsvgaGMRTransfer(pThis,
    2769                                transfer,
    2770                                pDoubleBuffer,
    2771                                pMipLevel->cbSurface,
    2772                                offHst,
    2773                                cbSurfacePitch,
    2774                                GuestPtr,
    2775                                offGst,
    2776                                cbGuestPitch,
    2777                                cBlocksX * pSurface->cbBlock,
    2778                                cBlocksY);
     2768        rc = vmsvgaR3GmrTransfer(pThis,
     2769                                 transfer,
     2770                                 pDoubleBuffer,
     2771                                 pMipLevel->cbSurface,
     2772                                 offHst,
     2773                                 cbSurfacePitch,
     2774                                 GuestPtr,
     2775                                 offGst,
     2776                                 cbGuestPitch,
     2777                                 cBlocksX * pSurface->cbBlock,
     2778                                 cBlocksY);
    27792779        AssertRC(rc);
    27802780
     
    29132913                uint32_t const cbWidth = pBox->w * pSurface->cbBlock;
    29142914
    2915                 rc = vmsvgaGMRTransfer(pThis,
    2916                                        transfer,
    2917                                        pbData,
    2918                                        pMipLevel->cbSurface,
    2919                                        offHst,
    2920                                        pMipLevel->cbSurfacePitch,
    2921                                        GuestPtr,
    2922                                        pBox->srcx * pSurface->cbBlock,
    2923                                        cbGuestPitch,
    2924                                        cbWidth,
    2925                                        pBox->h);
     2915                rc = vmsvgaR3GmrTransfer(pThis,
     2916                                         transfer,
     2917                                         pbData,
     2918                                         pMipLevel->cbSurface,
     2919                                         offHst,
     2920                                         pMipLevel->cbSurfacePitch,
     2921                                         GuestPtr,
     2922                                         pBox->srcx * pSurface->cbBlock,
     2923                                         cbGuestPitch,
     2924                                         cbWidth,
     2925                                         pBox->h);
    29262926                AssertRC(rc);
    29272927
  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win.cpp

    r81980 r82089  
    15481548        {
    15491549            SVGA3dCopyBox clipBox = pBox[i];
    1550             vmsvgaClipCopyBox(&pMipmapLevelSrc->mipmapSize, &pMipmapLevelDest->mipmapSize, &clipBox);
     1550            vmsvgaR3ClipCopyBox(&pMipmapLevelSrc->mipmapSize, &pMipmapLevelDest->mipmapSize, &clipBox);
    15511551            if (   !clipBox.w
    15521552                || !clipBox.h
     
    17031703
    17041704            SVGA3dCopyBox clipBox = pBox[i];
    1705             vmsvgaClipCopyBox(&pMipmapLevelSrc->mipmapSize, &pMipmapLevelDest->mipmapSize, &clipBox);
     1705            vmsvgaR3ClipCopyBox(&pMipmapLevelSrc->mipmapSize, &pMipmapLevelDest->mipmapSize, &clipBox);
    17061706            if (   !clipBox.w
    17071707                || !clipBox.h
     
    23842384        AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
    23852385
    2386         /* vmsvgaGMRTransfer verifies uGuestOffset.
     2386        /* vmsvgaR3GmrTransfer verifies uGuestOffset.
    23872387         * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
    23882388         * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
     
    24052405                 Rect.left, Rect.top, Rect.right, Rect.bottom));
    24062406
    2407         /* Prepare parameters for vmsvgaGMRTransfer, which needs the host buffer address, size
     2407        /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
    24082408         * and offset of the first scanline.
    24092409         */
     
    24142414        uint32_t const offLockedBuf = (uint32_t)((uintptr_t)LockedRect.pBits - (uintptr_t)pu8LockedBuf);
    24152415
    2416         rc = vmsvgaGMRTransfer(pThis,
    2417                                transfer,
    2418                                pu8LockedBuf,
    2419                                cbLockedBuf,
    2420                                offLockedBuf,
    2421                                LockedRect.Pitch,
    2422                                GuestPtr,
    2423                                (uint32_t)uGuestOffset,
    2424                                cbGuestPitch,
    2425                                cBlocksX * pSurface->cbBlock,
    2426                                cBlocksY);
     2416        rc = vmsvgaR3GmrTransfer(pThis,
     2417                                 transfer,
     2418                                 pu8LockedBuf,
     2419                                 cbLockedBuf,
     2420                                 offLockedBuf,
     2421                                 LockedRect.Pitch,
     2422                                 GuestPtr,
     2423                                 (uint32_t)uGuestOffset,
     2424                                 cbGuestPitch,
     2425                                 cBlocksX * pSurface->cbBlock,
     2426                                 cBlocksY);
    24272427        AssertRC(rc);
    24282428
     
    24722472        Assert(pBox->y == 0 && pBox->h == 1 && pBox->z == 0 && pBox->d == 1);
    24732473
    2474         /* vmsvgaGMRTransfer verifies input parameters except for the host buffer addres and size.
     2474        /* vmsvgaR3GmrTransfer verifies input parameters except for the host buffer addres and size.
    24752475         * srcx has been verified in vmsvga3dSurfaceDMA to not cause 32 bit overflow when multiplied by cbBlock.
    24762476         */
     
    24812481
    24822482        /* Copy data between the guest and the host buffer. */
    2483         rc = vmsvgaGMRTransfer(pThis,
    2484                                transfer,
    2485                                (uint8_t *)pMipLevel->pSurfaceData,
    2486                                pMipLevel->cbSurface,
    2487                                offHst,
    2488                                pMipLevel->cbSurfacePitch,
    2489                                GuestPtr,
    2490                                offGst,
    2491                                cbGuestPitch,
    2492                                cbWidth,
    2493                                1); /* Buffers are 1-dimensional */
     2483        rc = vmsvgaR3GmrTransfer(pThis,
     2484                                 transfer,
     2485                                 (uint8_t *)pMipLevel->pSurfaceData,
     2486                                 pMipLevel->cbSurface,
     2487                                 offHst,
     2488                                 pMipLevel->cbSurfacePitch,
     2489                                 GuestPtr,
     2490                                 offGst,
     2491                                 cbGuestPitch,
     2492                                 cbWidth,
     2493                                 1); /* Buffers are 1-dimensional */
    24942494        AssertRC(rc);
    24952495
  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp

    r81771 r82089  
    459459    SVGA3dBox clipSrcBox = *pSrcBox;
    460460    SVGA3dBox clipDstBox = *pDstBox;
    461     vmsvgaClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
    462     vmsvgaClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
     461    vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
     462    vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
    463463
    464464    return vmsvga3dBackSurfaceStretchBlt(pThis, pState,
     
    539539        hostBox.h = paBoxes[i].h;
    540540        hostBox.d = paBoxes[i].d;
    541         vmsvgaClipBox(&pMipLevel->mipmapSize, &hostBox);
     541        vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
    542542
    543543        if (   !hostBox.w
     
    551551
    552552        /* Adjust the guest, i.e. "src", point.
    553          * Do not try to verify them here because vmsvgaGMRTransfer takes care of this.
     553         * Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
    554554         */
    555555        uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
     
    600600        else
    601601        {
    602             /* vmsvgaGMRTransfer will verify the value, just check it is sane. */
     602            /* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
    603603            AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
    604604            RT_UNTRUSTED_VALIDATED_FENCE();
     
    606606
    607607        /* srcx, srcy and srcz values are used to calculate the guest offset.
    608          * The offset will be verified by vmsvgaGMRTransfer, so just check for overflows here.
     608         * The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
    609609         */
    610610        AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
     
    628628            for (uint32_t z = 0; z < hostBox.d; ++z)
    629629            {
    630                 rc = vmsvgaGMRTransfer(pThis,
    631                                        transfer,
    632                                        (uint8_t *)pMipLevel->pSurfaceData,
    633                                        pMipLevel->cbSurface,
    634                                        uHostOffset,
    635                                        (int32_t)pMipLevel->cbSurfacePitch,
    636                                        guest.ptr,
    637                                        (uint32_t)uGuestOffset,
    638                                        cbGuestPitch,
    639                                        cBlocksX * pSurface->cbBlock,
    640                                        cBlocksY);
     630                rc = vmsvgaR3GmrTransfer(pThis,
     631                                         transfer,
     632                                         (uint8_t *)pMipLevel->pSurfaceData,
     633                                         pMipLevel->cbSurface,
     634                                         uHostOffset,
     635                                         (int32_t)pMipLevel->cbSurfacePitch,
     636                                         guest.ptr,
     637                                         (uint32_t)uGuestOffset,
     638                                         cbGuestPitch,
     639                                         cBlocksX * pSurface->cbBlock,
     640                                         cBlocksY);
    641641                AssertRC(rc);
    642642
     
    684684    queryResult.result32 = u32Result;
    685685
    686     int rc = vmsvgaGMRTransfer(pThis, SVGA3D_READ_HOST_VRAM,
    687                                (uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
    688                                guestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
     686    int rc = vmsvgaR3GmrTransfer(pThis, SVGA3D_READ_HOST_VRAM,
     687                                 (uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
     688                                 guestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
    689689    AssertRC(rc);
    690690    return rc;
     
    820820    }
    821821
    822     VMSVGASCREENOBJECT *pScreen = vmsvgaGetScreenObject(pThis, idDstScreen);
     822    VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThis, idDstScreen);
    823823    AssertReturn(pScreen, VERR_INTERNAL_ERROR);
    824824
     
    863863
    864864        /* Update the guest image, which is at box.src. */
    865         vmsvgaUpdateScreen(pThis, pScreen, box.srcx, box.srcy, box.w, box.h);
     865        vmsvgaR3UpdateScreen(pThis, pScreen, box.srcx, box.srcy, box.w, box.h);
    866866    }
    867867    else
     
    888888
    889889            /* Update the guest image, which is at box.src. */
    890             vmsvgaUpdateScreen(pThis, pScreen, box.srcx, box.srcy, box.w, box.h);
     890            vmsvgaR3UpdateScreen(pThis, pScreen, box.srcx, box.srcy, box.w, box.h);
    891891        }
    892892    }
     
    906906
    907907    /** @todo Detect screen from coords? Or split rect to screens? */
    908     VMSVGASCREENOBJECT *pScreen = vmsvgaGetScreenObject(pThis, 0);
     908    VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThis, 0);
    909909    AssertReturn(pScreen, VERR_INTERNAL_ERROR);
    910910
  • trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.h

    r82053 r82089  
    5252
    5353/* DevVGA-SVGA.cpp: */
    54 void vmsvga3dSurfaceUpdateHeapBuffersOnFifoThread(PPDMDEVINS pDevIns, PVGASTATE pThis, uint32_t sid);
     54void vmsvgaR33dSurfaceUpdateHeapBuffersOnFifoThread(PPDMDEVINS pDevIns, PVGASTATE pThis, uint32_t sid);
    5555
    5656
  • trunk/src/VBox/Devices/Graphics/DevVGA.cpp

    r82088 r82089  
    55365536     */
    55375537    if (pThis->svga.fFIFOThreadSleeping && pThis->svga.fEnabled && pThis->svga.fConfigured)
    5538         vmsvgaFIFOWatchdogTimer(pDevIns, pThis);
     5538        vmsvgaR3FifoWatchdogTimer(pDevIns, pThis);
    55395539# endif
    55405540}
     
    58415841    if (pThis->fVMSVGAEnabled)
    58425842    {
    5843         rc = vmsvgaSaveExec(pDevIns, pSSM);
     5843        rc = vmsvgaR3SaveExec(pDevIns, pSSM);
    58445844        AssertRCReturn(rc, rc);
    58455845    }
     
    59315931        if (pThis->fVMSVGAEnabled)
    59325932        {
    5933             rc = vmsvgaLoadExec(pDevIns, pSSM, uVersion, uPass);
     5933            rc = vmsvgaR3LoadExec(pDevIns, pSSM, uVersion, uPass);
    59345934            AssertRCReturn(rc, rc);
    59355935        }
     
    59635963    if (pThis->fVMSVGAEnabled)
    59645964    {
    5965         rc = vmsvgaLoadDone(pDevIns);
     5965        rc = vmsvgaR3LoadDone(pDevIns);
    59665966        AssertRCReturn(rc, rc);
    59675967    }
     
    59985998# ifdef VBOX_WITH_VMSVGA
    59995999    if (pThis->fVMSVGAEnabled)
    6000         vmsvgaReset(pDevIns);
     6000        vmsvgaR3Reset(pDevIns);
    60016001# endif
    60026002
     
    62356235# ifdef VBOX_WITH_VMSVGA
    62366236    if (pThis->fVMSVGAEnabled)
    6237         vmsvgaDestruct(pDevIns);
     6237        vmsvgaR3Destruct(pDevIns);
    62386238# endif
    62396239
     
    71987198    if (    rc == VINF_SUCCESS
    71997199        &&  pThis->fVMSVGAEnabled)
    7200         rc = vmsvgaInit(pDevIns);
     7200        rc = vmsvgaR3Init(pDevIns);
    72017201# endif
    72027202
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