Changeset 82094 in vbox

Timestamp:

Nov 22, 2019 12:58:02 AM (5 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

134901

Message:

DevVGA,PGM,IOM: Conveted the legacy MMIO region to the new style, adapting the MMIO2 page aliasing code to match (seems to work). bugref:9218

Location:

trunk

Files:

• include/VBox/vmm/iom.h (modified) (1 diff)
• include/VBox/vmm/pgm.h (modified) (1 diff)
• src/VBox/Devices/Graphics/DevVGA.cpp (modified) (30 diffs)
• src/VBox/Devices/Graphics/DevVGA.h (modified) (1 diff)
• src/VBox/VMM/VMMAll/IOMAllMMIO.cpp (modified) (4 diffs)
• src/VBox/VMM/VMMAll/IOMAllMmioNew.cpp (modified) (3 diffs)
• src/VBox/VMM/VMMAll/PGMAllHandler.cpp (modified) (11 diffs)
• src/VBox/VMM/VMMR0/VMMR0.def (modified) (1 diff)

trunk/include/VBox/vmm/iom.h

@@ -457 +457 @@
 VMMDECL(VBOXSTRICTRC)   IOMMMIORead(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint32_t *pu32Value, size_t cbValue);
 VMMDECL(VBOXSTRICTRC)   IOMMMIOWrite(PVM pVM, PVMCPU pVCpu, RTGCPHYS GCPhys, uint32_t u32Value, size_t cbValue);
-VMMDECL(int)            IOMMMIOMapMMIO2Page(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags);
+/*VMMDECL(int)            IOMMMIOMapMMIO2Page(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysRemapped, uint64_t fPageFlags);*/
 /*VMMDECL(int)            IOMMMIOMapMMIOHCPage(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags); - not used any more */
-VMMDECL(int)            IOMMMIOResetRegion(PVMCC pVM, RTGCPHYS GCPhys);
+/*VMMDECL(int)            IOMMMIOResetRegion(PVMCC pVM, RTGCPHYS GCPhys);*/
 
 VMM_INT_DECL(VBOXSTRICTRC) IOMR0MmioPhysHandler(PVMCC pVM, PVMCPUCC pVCpu, uint32_t uErrorCode, RTGCPHYS GCPhysFault);
-VMM_INT_DECL(int)       IOMMmioMapMmio2Page(PVMCC pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS offRegion,
-                                                uint64_t hMmio2, RTGCPHYS offMmio2, uint64_t fPageFlags);
+VMMDECL(int)            IOMMmioMapMmio2Page(PVMCC pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS offRegion,
+                                            uint64_t hMmio2, RTGCPHYS offMmio2, uint64_t fPageFlags);
 VMMR0_INT_DECL(int)     IOMR0MmioMapMmioHCPage(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, RTHCPHYS HCPhys, uint64_t fPageFlags);
-VMM_INT_DECL(int)       IOMMmioResetRegion(PVMCC pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion);
+VMMDECL(int)            IOMMmioResetRegion(PVMCC pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion);
 
 

trunk/include/VBox/vmm/pgm.h

@@ -385 +385 @@
 VMMDECL(int)        PGMHandlerPhysicalJoin(PVMCC pVM, RTGCPHYS GCPhys1, RTGCPHYS GCPhys2);
 VMMDECL(int)        PGMHandlerPhysicalPageTempOff(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage);
-VMMDECL(int)        PGMHandlerPhysicalPageAlias(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap);
+VMMDECL(int)        PGMHandlerPhysicalPageAliasMmio2(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage,
+                                                     PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMMio2PageRemap);
 VMMDECL(int)        PGMHandlerPhysicalPageAliasHC(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTHCPHYS HCPhysPageRemap);
 VMMDECL(int)        PGMHandlerPhysicalReset(PVMCC pVM, RTGCPHYS GCPhys);

trunk/src/VBox/Devices/Graphics/DevVGA.cpp

@@ -715 +715 @@
             if (pThis->fRemappedVGA)
             {
-                IOMMMIOResetRegion(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), 0x000a0000);
+                PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
+                IOMMmioResetRegion(PDMDevHlpGetVM(pDevIns), pDevIns, pThis->hMmioLegacy);
                 pThis->fRemappedVGA = false;
             }
@@ -754 +755 @@
             if (pThis->fRemappedVGA)
             {
-                IOMMMIOResetRegion(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), 0x000a0000);
+                PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
+                IOMMmioResetRegion(PDMDevHlpGetVM(pDevIns), pDevIns, pThis->hMmioLegacy);
                 pThis->fRemappedVGA = false;
             }
@@ -1025 +1027 @@
             if (pThis->fRemappedVGA)
             {
-                IOMMMIOResetRegion(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), 0x000a0000);
+                PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
+                IOMMmioResetRegion(PDMDevHlpGetVM(pDevIns), pDevIns, pThis->hMmioLegacy);
                 pThis->fRemappedVGA = false;
             }
@@ -1134 +1137 @@
             if (pThis->fRemappedVGA)
             {
-                IOMMMIOResetRegion(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), 0x000a0000);
+                PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
+                IOMMmioResetRegion(PDMDevHlpGetVM(pDevIns), pDevIns, pThis->hMmioLegacy);
                 pThis->fRemappedVGA = false;
             }
@@ -1179 +1183 @@
 static uint32_t vga_mem_readb(PVGASTATE pThis, RTGCPHYS addr, int *prc)
 {
-    int memory_map_mode, plane;
+    int plane;
     uint32_t ret;
 
     Log3(("vga: read [0x%x] -> ", addr));
-    /* convert to VGA memory offset */
-    memory_map_mode = (pThis->gr[6] >> 2) & 3;
-#ifndef IN_RC
-    RTGCPHYS GCPhys = addr; /* save original address */
-#endif
 
 #ifdef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
@@ -1201 +1200 @@
 #endif
 
+
+    /* convert to VGA memory offset */
+#ifndef IN_RC
+    RTGCPHYS GCPhys = addr; /* save original address */
+#endif
     addr &= 0x1ffff;
+
+    int const memory_map_mode = (pThis->gr[6] >> 2) & 3;
     switch(memory_map_mode) {
     case 0:
@@ -1233 +1239 @@
             /** @todo only allow read access (doesn't work now) */
             STAM_COUNTER_INC(&pThis->StatMapPage);
-            IOMMMIOMapMMIO2Page(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), GCPhys,
-                                pThis->GCPhysVRAM + addr, X86_PTE_RW | X86_PTE_P);
+            PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
+            IOMMmioMapMmio2Page(PDMDevHlpGetVM(pDevIns), pDevIns, pThis->hMmioLegacy, GCPhys - 0xa0000,
+                                pThis->hMmio2VRam, addr, X86_PTE_RW | X86_PTE_P);
             /* Set as dirty as write accesses won't be noticed now. */
             vgaR3MarkDirty(pThis, addr);
@@ -1284 +1291 @@
 }
 
-/** called for accesses between 0xa0000 and 0xc0000 */
-static int vga_mem_writeb(PVGASTATE pThis, RTGCPHYS addr, uint32_t val)
-{
-    int memory_map_mode, plane, write_mode, b, func_select, mask;
+/**
+ * called for accesses between 0xa0000 and 0xc0000
+ */
+static VBOXSTRICTRC vga_mem_writeb(PVGASTATE pThis, RTGCPHYS addr, uint32_t val)
+{
+    int plane, write_mode, b, func_select, mask;
     uint32_t write_mask, bit_mask, set_mask;
 
     Log3(("vga: [0x%x] = 0x%02x\n", addr, val));
-    /* convert to VGA memory offset */
-    memory_map_mode = (pThis->gr[6] >> 2) & 3;
-#ifndef IN_RC
-    RTGCPHYS GCPhys = addr; /* save original address */
-#endif
 
 #ifdef VMSVGA_WITH_VGA_FB_BACKUP_AND_IN_RZ
@@ -1304 +1308 @@
 #endif
 
+    /* convert to VGA memory offset */
+#ifndef IN_RC
+    RTGCPHYS const GCPhys = addr; /* save original address */
+#endif
     addr &= 0x1ffff;
+
+    int const memory_map_mode = (pThis->gr[6] >> 2) & 3;
     switch(memory_map_mode) {
     case 0:
@@ -1338 +1348 @@
             {
                 STAM_COUNTER_INC(&pThis->StatMapPage);
-                IOMMMIOMapMMIO2Page(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), GCPhys,
-                                    pThis->GCPhysVRAM + addr, X86_PTE_RW | X86_PTE_P);
+                PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
+                IOMMmioMapMmio2Page(PDMDevHlpGetVM(pDevIns), pDevIns, pThis->hMmioLegacy, GCPhys - 0xa0000,
+                                    pThis->hMmio2VRam, addr, X86_PTE_RW | X86_PTE_P);
                 pThis->fRemappedVGA = true;
             }
@@ -3550 +3561 @@
 }
 
-
-/**
- * @callback_method_impl{FNIOMMMIOFILL,
+#undef APPLY_LOGICAL_AND_MASK
+
+/**
+ * @callback_method_impl{FNIOMMMIONEWFILL,
  * Legacy VGA memory (0xa0000 - 0xbffff) write hook\, to be called from IOM and
  * from the inside of VGADeviceGC.cpp. This is the advanced version of
  * vga_mem_writeb function.}
  */
-PDMBOTHCBDECL(int) vgaMMIOFill(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, uint32_t u32Item, unsigned cbItem, unsigned cItems)
+static DECLCALLBACK(VBOXSTRICTRC)
+vgaMmioFill(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, uint32_t u32Item, unsigned cbItem, unsigned cItems)
 {
     PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE);
     Assert(PDMDevHlpCritSectIsOwner(pDevIns, pDevIns->CTX_SUFF(pCritSectRo)));
 
-    return vgaInternalMMIOFill(pThis, pvUser, GCPhysAddr, u32Item, cbItem, cItems);
-}
-#undef APPLY_LOGICAL_AND_MASK
-
-
-/**
- * @callback_method_impl{FNIOMMMIOREAD, Legacy VGA memory (0xa0000 - 0xbffff)
- *                      read hook\, to be called from IOM.}
- */
-PDMBOTHCBDECL(int) vgaMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
+    return vgaInternalMMIOFill(pThis, pvUser, off, u32Item, cbItem, cItems);
+}
+
+
+/**
+ * @callback_method_impl{FNIOMMMIONEWREAD,
+ * Legacy VGA memory (0xa0000 - 0xbffff) read hook\, to be called from IOM.}
+ */
+static DECLCALLBACK(VBOXSTRICTRC) vgaMmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb)
 {
     PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE);
@@ -3582 +3594 @@
     {
         case 1:
-            *(uint8_t  *)pv = vga_mem_readb(pThis, GCPhysAddr, &rc);
+            *(uint8_t  *)pv = vga_mem_readb(pThis, off, &rc);
             break;
         case 2:
-            *(uint16_t *)pv = vga_mem_readb(pThis, GCPhysAddr, &rc)
-                           | (vga_mem_readb(pThis, GCPhysAddr + 1, &rc) << 8);
+/** @todo This and the wider accesses maybe misbehave when accessing bytes
+ *        crossing the 512KB VRAM boundrary if the access is handled in
+ *        ring-0 and operating in latched mode. */
+            *(uint16_t *)pv = vga_mem_readb(pThis, off, &rc)
+                           | (vga_mem_readb(pThis, off + 1, &rc) << 8);
             break;
         case 4:
-            *(uint32_t *)pv = vga_mem_readb(pThis, GCPhysAddr, &rc)
-                           | (vga_mem_readb(pThis, GCPhysAddr + 1, &rc) <<  8)
-                           | (vga_mem_readb(pThis, GCPhysAddr + 2, &rc) << 16)
-                           | (vga_mem_readb(pThis, GCPhysAddr + 3, &rc) << 24);
+            *(uint32_t *)pv = vga_mem_readb(pThis, off, &rc)
+                           | (vga_mem_readb(pThis, off + 1, &rc) <<  8)
+                           | (vga_mem_readb(pThis, off + 2, &rc) << 16)
+                           | (vga_mem_readb(pThis, off + 3, &rc) << 24);
             break;
 
         case 8:
-            *(uint64_t *)pv = (uint64_t)vga_mem_readb(pThis, GCPhysAddr, &rc)
-                           | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 1, &rc) <<  8)
-                           | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 2, &rc) << 16)
-                           | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 3, &rc) << 24)
-                           | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 4, &rc) << 32)
-                           | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 5, &rc) << 40)
-                           | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 6, &rc) << 48)
-                           | ((uint64_t)vga_mem_readb(pThis, GCPhysAddr + 7, &rc) << 56);
+            *(uint64_t *)pv = (uint64_t)vga_mem_readb(pThis, off, &rc)
+                           | ((uint64_t)vga_mem_readb(pThis, off + 1, &rc) <<  8)
+                           | ((uint64_t)vga_mem_readb(pThis, off + 2, &rc) << 16)
+                           | ((uint64_t)vga_mem_readb(pThis, off + 3, &rc) << 24)
+                           | ((uint64_t)vga_mem_readb(pThis, off + 4, &rc) << 32)
+                           | ((uint64_t)vga_mem_readb(pThis, off + 5, &rc) << 40)
+                           | ((uint64_t)vga_mem_readb(pThis, off + 6, &rc) << 48)
+                           | ((uint64_t)vga_mem_readb(pThis, off + 7, &rc) << 56);
             break;
 
@@ -3611 +3626 @@
             while (cb-- > 0)
             {
-                *pbData++ = vga_mem_readb(pThis, GCPhysAddr++, &rc);
+                *pbData++ = vga_mem_readb(pThis, off++, &rc);
                 if (RT_UNLIKELY(rc != VINF_SUCCESS))
                     break;
@@ -3623 +3638 @@
 
 /**
- * @callback_method_impl{FNIOMMMIOWRITE, Legacy VGA memory (0xa0000 - 0xbffff)
- *                      write hook\, to be called from IOM.}
- */
-PDMBOTHCBDECL(int) vgaMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
-{
-    PVGASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE);
+ * @callback_method_impl{FNIOMMMIONEWWRITE,
+ * Legacy VGA memory (0xa0000 - 0xbffff) write hook\, to be called from IOM.}
+ */
+static DECLCALLBACK(VBOXSTRICTRC) vgaMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb)
+{
+    PVGASTATE      pThis = PDMDEVINS_2_DATA(pDevIns, PVGASTATE);
     uint8_t const *pbSrc = (uint8_t const *)pv;
     NOREF(pvUser);
@@ -3634 +3649 @@
     Assert(PDMDevHlpCritSectIsOwner(pDevIns, pDevIns->CTX_SUFF(pCritSectRo)));
 
-    int rc;
+    VBOXSTRICTRC rc;
     switch (cb)
     {
         case 1:
-            rc = vga_mem_writeb(pThis, GCPhysAddr, *pbSrc);
+            rc = vga_mem_writeb(pThis, off, *pbSrc);
             break;
 #if 1
         case 2:
-            rc = vga_mem_writeb(pThis, GCPhysAddr + 0, pbSrc[0]);
+            rc = vga_mem_writeb(pThis, off + 0, pbSrc[0]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 1, pbSrc[1]);
+                rc = vga_mem_writeb(pThis, off + 1, pbSrc[1]);
             break;
         case 4:
-            rc = vga_mem_writeb(pThis, GCPhysAddr + 0, pbSrc[0]);
+            rc = vga_mem_writeb(pThis, off + 0, pbSrc[0]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 1, pbSrc[1]);
+                rc = vga_mem_writeb(pThis, off + 1, pbSrc[1]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 2, pbSrc[2]);
+                rc = vga_mem_writeb(pThis, off + 2, pbSrc[2]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 3, pbSrc[3]);
+                rc = vga_mem_writeb(pThis, off + 3, pbSrc[3]);
             break;
         case 8:
-            rc = vga_mem_writeb(pThis, GCPhysAddr + 0, pbSrc[0]);
+            rc = vga_mem_writeb(pThis, off + 0, pbSrc[0]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 1, pbSrc[1]);
+                rc = vga_mem_writeb(pThis, off + 1, pbSrc[1]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 2, pbSrc[2]);
+                rc = vga_mem_writeb(pThis, off + 2, pbSrc[2]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 3, pbSrc[3]);
+                rc = vga_mem_writeb(pThis, off + 3, pbSrc[3]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 4, pbSrc[4]);
+                rc = vga_mem_writeb(pThis, off + 4, pbSrc[4]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 5, pbSrc[5]);
+                rc = vga_mem_writeb(pThis, off + 5, pbSrc[5]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 6, pbSrc[6]);
+                rc = vga_mem_writeb(pThis, off + 6, pbSrc[6]);
             if (RT_LIKELY(rc == VINF_SUCCESS))
-                rc = vga_mem_writeb(pThis, GCPhysAddr + 7, pbSrc[7]);
+                rc = vga_mem_writeb(pThis, off + 7, pbSrc[7]);
             break;
 #else
         case 2:
-            rc = vgaMMIOFill(pDevIns, GCPhysAddr, *(uint16_t *)pv, 2, 1);
+            rc = vgaMmioFill(pDevIns, off, *(uint16_t *)pv, 2, 1);
             break;
         case 4:
-            rc = vgaMMIOFill(pDevIns, GCPhysAddr, *(uint32_t *)pv, 4, 1);
+            rc = vgaMmioFill(pDevIns, off, *(uint32_t *)pv, 4, 1);
             break;
         case 8:
-            rc = vgaMMIOFill(pDevIns, GCPhysAddr, *(uint64_t *)pv, 8, 1);
+            rc = vgaMmioFill(pDevIns, off, *(uint64_t *)pv, 8, 1);
             break;
 #endif
@@ -3686 +3701 @@
             rc = VINF_SUCCESS;
             while (cb-- > 0 && rc == VINF_SUCCESS)
-                rc = vga_mem_writeb(pThis, GCPhysAddr++, *pbSrc++);
+                rc = vga_mem_writeb(pThis, off++, *pbSrc++);
             break;
 
@@ -3697 +3712 @@
 /**
  * Handle LFB access.
- * @returns VBox status code.
+ *
+ * @returns Strict VBox status code.
  * @param   pVM         VM handle.
  * @param   pThis       VGA device instance data.
@@ -3703 +3719 @@
  * @param   GCPtr       The access virtual address (only GC).
  */
-static int vgaLFBAccess(PVMCC pVM, PVGASTATE pThis, RTGCPHYS GCPhys, RTGCPTR GCPtr)
-{
-    int rc = PDMDevHlpCritSectEnter(pThis->CTX_SUFF(pDevIns), &pThis->CritSect, VINF_EM_RAW_EMULATE_INSTR);
-    if (rc != VINF_SUCCESS)
-        return rc;
-
-    /*
-     * Set page dirty bit.
-     */
-    vgaR3MarkDirty(pThis, GCPhys - pThis->GCPhysVRAM);
-    pThis->fLFBUpdated = true;
-
-    /*
-     * Turn of the write handler for this particular page and make it R/W.
-     * Then return telling the caller to restart the guest instruction.
-     * ASSUME: the guest always maps video memory RW.
-     */
-    rc = PGMHandlerPhysicalPageTempOff(pVM, pThis->GCPhysVRAM, GCPhys);
-    if (RT_SUCCESS(rc))
-    {
+static VBOXSTRICTRC vgaLFBAccess(PVMCC pVM, PVGASTATE pThis, RTGCPHYS GCPhys, RTGCPTR GCPtr)
+{
+    VBOXSTRICTRC rc = PDMDevHlpCritSectEnter(pThis->CTX_SUFF(pDevIns), &pThis->CritSect, VINF_EM_RAW_EMULATE_INSTR);
+    if (rc == VINF_SUCCESS)
+    {
+        /*
+         * Set page dirty bit.
+         */
+        vgaR3MarkDirty(pThis, GCPhys - pThis->GCPhysVRAM);
+        pThis->fLFBUpdated = true;
+
+        /*
+         * Turn of the write handler for this particular page and make it R/W.
+         * Then return telling the caller to restart the guest instruction.
+         * ASSUME: the guest always maps video memory RW.
+         */
+        rc = PGMHandlerPhysicalPageTempOff(pVM, pThis->GCPhysVRAM, GCPhys);
+        if (RT_SUCCESS(rc))
+        {
 #ifndef IN_RING3
-        rc = PGMShwMakePageWritable(PDMDevHlpGetVMCPU(pThis->CTX_SUFF(pDevIns)), GCPtr,
-                                    PGM_MK_PG_IS_MMIO2 | PGM_MK_PG_IS_WRITE_FAULT);
+            rc = PGMShwMakePageWritable(PDMDevHlpGetVMCPU(pThis->CTX_SUFF(pDevIns)), GCPtr,
+                                        PGM_MK_PG_IS_MMIO2 | PGM_MK_PG_IS_WRITE_FAULT);
+            PDMDevHlpCritSectLeave(pThis->CTX_SUFF(pDevIns), &pThis->CritSect);
+            AssertMsgReturn(    rc == VINF_SUCCESS
+                            /* In the SMP case the page table might be removed while we wait for the PGM lock in the trap handler. */
+                            ||  rc == VERR_PAGE_TABLE_NOT_PRESENT
+                            ||  rc == VERR_PAGE_NOT_PRESENT,
+                            ("PGMShwModifyPage -> GCPtr=%RGv rc=%d\n", GCPtr, rc),
+                            rc);
+#else  /* IN_RING3 - We don't have any virtual page address of the access here. */
+            PDMDevHlpCritSectLeave(pThis->CTX_SUFF(pDevIns), &pThis->CritSect);
+            Assert(GCPtr == 0);
+            RT_NOREF1(GCPtr);
+#endif
+            return VINF_SUCCESS;
+        }
+
         PDMDevHlpCritSectLeave(pThis->CTX_SUFF(pDevIns), &pThis->CritSect);
-        AssertMsgReturn(    rc == VINF_SUCCESS
-                        /* In the SMP case the page table might be removed while we wait for the PGM lock in the trap handler. */
-                        ||  rc == VERR_PAGE_TABLE_NOT_PRESENT
-                        ||  rc == VERR_PAGE_NOT_PRESENT,
-                        ("PGMShwModifyPage -> GCPtr=%RGv rc=%d\n", GCPtr, rc),
-                        rc);
-#else /* IN_RING3 : We don't have any virtual page address of the access here. */
-        PDMDevHlpCritSectLeave(pThis->CTX_SUFF(pDevIns), &pThis->CritSect);
-        Assert(GCPtr == 0);
-        RT_NOREF1(GCPtr);
-#endif
-        return VINF_SUCCESS;
-    }
-
-    PDMDevHlpCritSectLeave(pThis->CTX_SUFF(pDevIns), &pThis->CritSect);
-    AssertMsgFailed(("PGMHandlerPhysicalPageTempOff -> rc=%d\n", rc));
+        AssertMsgFailed(("PGMHandlerPhysicalPageTempOff -> rc=%d\n", rc));
+    }
     return rc;
 }
@@ -3769 +3785 @@
  *      VBE LFB write access handler for the dirty tracking.}
  */
-PGM_ALL_CB_DECL(VBOXSTRICTRC) vgaLFBAccessHandler(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, void *pvPhys, void *pvBuf, size_t cbBuf,
-                                                  PGMACCESSTYPE enmAccessType, PGMACCESSORIGIN enmOrigin, void *pvUser)
-{
-    PVGASTATE   pThis = (PVGASTATE)pvUser;
-    int         rc;
+PGM_ALL_CB_DECL(VBOXSTRICTRC) vgaLFBAccessHandler(PVMCC pVM, PVMCPUCC pVCpu, RTGCPHYS GCPhys, void *pvPhys,
+                                                  void *pvBuf, size_t cbBuf, PGMACCESSTYPE enmAccessType,
+                                                  PGMACCESSORIGIN enmOrigin, void *pvUser)
+{
+    PVGASTATE pThis = (PVGASTATE)pvUser;
     Assert(pThis);
     Assert(GCPhys >= pThis->GCPhysVRAM);
-    NOREF(pVCpu); NOREF(pvPhys); NOREF(pvBuf); NOREF(cbBuf); NOREF(enmAccessType); NOREF(enmOrigin);
-
-    rc = vgaLFBAccess(pVM, pThis, GCPhys, 0);
-    if (RT_SUCCESS(rc))
-        return VINF_PGM_HANDLER_DO_DEFAULT;
-    AssertMsg(rc <= VINF_SUCCESS, ("rc=%Rrc\n", rc));
+    RT_NOREF(pVCpu, pvPhys, pvBuf, cbBuf, enmAccessType, enmOrigin);
+
+    VBOXSTRICTRC rc = vgaLFBAccess(pVM, pThis, GCPhys, 0);
+    if (rc == VINF_SUCCESS)
+        rc = VINF_PGM_HANDLER_DO_DEFAULT;
+#ifdef IN_RING3
+    else
+        AssertMsg(rc < VINF_SUCCESS, ("rc=%Rrc\n", VBOXSTRICTRC_VAL(rc)));
+#endif
     return rc;
 }
@@ -4828 +4847 @@
     /* This should be called only in non VBVA mode. */
 # else
-    if (VBVAUpdateDisplay (pThis) == VINF_SUCCESS)
+    if (VBVAUpdateDisplay(pThis) == VINF_SUCCESS)
     {
         PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect);
@@ -4843 +4862 @@
     if (pThis->fRemappedVGA)
     {
-        IOMMMIOResetRegion(PDMDevHlpGetVM(pDevIns), 0x000a0000);
+        IOMMmioResetRegion(PDMDevHlpGetVM(pDevIns), pDevIns, pThis->hMmioLegacy);
         pThis->fRemappedVGA = false;
     }
@@ -4874 +4893 @@
     if (pThis->fRemappedVGA)
     {
-        IOMMMIOResetRegion(PDMDevHlpGetVM(pDevIns), 0x000a0000);
+        IOMMmioResetRegion(PDMDevHlpGetVM(pDevIns), pDevIns, pThis->hMmioLegacy);
         pThis->fRemappedVGA = false;
     }
@@ -6055 +6074 @@
     if (pThis->fRemappedVGA)
     {
-        IOMMMIOResetRegion(PDMDevHlpGetVM(pDevIns), 0x000a0000);
+        IOMMmioResetRegion(PDMDevHlpGetVM(pDevIns), pDevIns, pThis->hMmioLegacy);
         pThis->fRemappedVGA = false;
     }
@@ -6624 +6643 @@
 # undef REG_PORT
 
-    /* vga mmio */
-    rc = PDMDevHlpMMIORegisterEx(pDevIns, 0x000a0000, 0x00020000, NULL /*pvUser*/,
-                                 IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU,
-                                 vgaMMIOWrite, vgaMMIORead, vgaMMIOFill, "VGA - VGA Video Buffer");
-    AssertRCReturn(rc, rc);
-    if (pDevIns->fRCEnabled)
-    {
-        rc = PDMDevHlpMMIORegisterRCEx(pDevIns, 0x000a0000, 0x00020000, NIL_RTRCPTR /*pvUser*/,
-                                       "vgaMMIOWrite", "vgaMMIORead", "vgaMMIOFill");
-        if (RT_FAILURE(rc))
-            return rc;
-    }
-    if (pDevIns->fR0Enabled)
-    {
-        rc = PDMDevHlpMMIORegisterR0Ex(pDevIns, 0x000a0000, 0x00020000, NIL_RTR0PTR /*pvUser*/,
-                                       "vgaMMIOWrite", "vgaMMIORead", "vgaMMIOFill");
-        if (RT_FAILURE(rc))
-            return rc;
-    }
-
     /* vga bios */
     rc = PDMDevHlpIoPortCreateAndMap(pDevIns, VBE_PRINTF_PORT, 1 /*cPorts*/, vgaIoPortWriteBios, vgaIoPortReadBios,
                                      "VGA BIOS debug/panic", NULL /*paExtDescs*/, &pThis->hIoPortBios);
+    AssertRCReturn(rc, rc);
+
+    /*
+     * The MDA/CGA/EGA/VGA/whatever fixed MMIO area.
+     */
+    rc = PDMDevHlpMmioCreateExAndMap(pDevIns, 0x000a0000, 0x00020000,
+                                     IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU | IOMMMIO_FLAGS_ABS,
+                                     NULL /*pPciDev*/, UINT32_MAX /*iPciRegion*/,
+                                     vgaMmioWrite, vgaMmioRead, vgaMmioFill, NULL /*pvUser*/,
+                                     "VGA - VGA Video Buffer", &pThis->hMmioLegacy);
     AssertRCReturn(rc, rc);
 
@@ -7014 +7023 @@
         LogoHdr.fu8FadeIn = 1;
     else if (RT_FAILURE(rc))
-        return PDMDEV_SET_ERROR(pDevIns, rc,
-                                N_("Configuration error: Querying \"FadeIn\" as integer failed"));
+        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Querying \"FadeIn\" as integer failed"));
 
     rc = pHlp->pfnCFGMQueryU8(pCfg, "FadeOut", &LogoHdr.fu8FadeOut);
@@ -7021 +7029 @@
         LogoHdr.fu8FadeOut = 1;
     else if (RT_FAILURE(rc))
-        return PDMDEV_SET_ERROR(pDevIns, rc,
-                                N_("Configuration error: Querying \"FadeOut\" as integer failed"));
+        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Querying \"FadeOut\" as integer failed"));
 
     rc = pHlp->pfnCFGMQueryU16(pCfg, "LogoTime", &LogoHdr.u16LogoMillies);
@@ -7028 +7035 @@
         LogoHdr.u16LogoMillies = 0;
     else if (RT_FAILURE(rc))
-        return PDMDEV_SET_ERROR(pDevIns, rc,
-                                N_("Configuration error: Querying \"LogoTime\" as integer failed"));
+        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Querying \"LogoTime\" as integer failed"));
 
     rc = pHlp->pfnCFGMQueryU8(pCfg, "ShowBootMenu", &LogoHdr.fu8ShowBootMenu);
@@ -7035 +7041 @@
         LogoHdr.fu8ShowBootMenu = 0;
     else if (RT_FAILURE(rc))
-        return PDMDEV_SET_ERROR(pDevIns, rc,
-                                N_("Configuration error: Querying \"ShowBootMenu\" as integer failed"));
+        return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Querying \"ShowBootMenu\" as integer failed"));
 
 # if defined(DEBUG) && !defined(DEBUG_sunlover) && !defined(DEBUG_michael)
@@ -7209 +7214 @@
     PDMDevHlpSTAMRegister(pDevIns, &pThis->StatRZMemoryWrite, STAMTYPE_PROFILE, "RZ/MMIO-Write", STAMUNIT_TICKS_PER_CALL, "Profiling of the VGAGCMemoryWrite() body.");
     PDMDevHlpSTAMRegister(pDevIns, &pThis->StatR3MemoryWrite, STAMTYPE_PROFILE, "R3/MMIO-Write", STAMUNIT_TICKS_PER_CALL, "Profiling of the VGAGCMemoryWrite() body.");
-    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMapPage,       STAMTYPE_COUNTER, "MapPageCalls",  STAMUNIT_OCCURENCES,     "Calls to IOMMMIOMapMMIO2Page.");
+    PDMDevHlpSTAMRegister(pDevIns, &pThis->StatMapPage,       STAMTYPE_COUNTER, "MapPageCalls",  STAMUNIT_OCCURENCES,     "Calls to IOMMmioMapMmio2Page.");
     PDMDevHlpSTAMRegister(pDevIns, &pThis->StatUpdateDisp,    STAMTYPE_COUNTER, "UpdateDisplay", STAMUNIT_OCCURENCES,     "Calls to vgaR3PortUpdateDisplay().");
 # endif
@@ -7298 +7303 @@
         AssertReturn(!pThis->fVMSVGAEnabled, VERR_INVALID_STATE);
 # endif
+
+    /*
+     * MMIO.
+     */
+    rc = PDMDevHlpMmioSetUpContextEx(pDevIns, pThis->hMmioLegacy, vgaMmioWrite, vgaMmioRead, vgaMmioFill, NULL /*pvUser*/);
+    AssertRCReturn(rc, rc);
 
     /*

trunk/src/VBox/Devices/Graphics/DevVGA.h

@@ -563 +563 @@
     } pendingVhwaCommands;
 
+    /** The MMIO handle of the legacy graphics buffer/regs at 0xa0000-0xbffff. */
+    PGMMMIO2HANDLE              hMmioLegacy;
+
     /** @name I/O ports for range 0x3c0-3cf.
      * @{ */

trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp

@@ -813 +813 @@
 
 
+#if 0  /* not used any more */
 /**
  * Mapping an MMIO2 page in place of an MMIO page for direct access.
@@ -884 +885 @@
     return VINF_SUCCESS;
 }
+#endif /* unused */
 
 #if 0  /* not used any more */
@@ -942 +944 @@
 #endif
 
-
+#if 0 /* unused */
 /**
  * Reset a previously modified MMIO region; restore the access flags.
@@ -1003 +1005 @@
     return rc;
 }
-
+#endif /*unused */

trunk/src/VBox/VMM/VMMAll/IOMAllMmioNew.cpp

@@ -1056 +1056 @@
  *                          for the time being.
  */
-VMM_INT_DECL(int) IOMMmioMapMmio2Page(PVMCC pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS offRegion,
-                                      uint64_t hMmio2, RTGCPHYS offMmio2, uint64_t fPageFlags)
+VMMDECL(int) IOMMmioMapMmio2Page(PVMCC pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion, RTGCPHYS offRegion,
+                                 uint64_t hMmio2, RTGCPHYS offMmio2, uint64_t fPageFlags)
 {
     /* Currently only called from the VGA device during MMIO. */
@@ -1109 +1109 @@
              * Do the aliasing; page align the addresses since PGM is picky.
              */
-#if 0 /** @todo fix when DevVGA is converted to new model.  */
-            rc = PGMHandlerPhysicalPageAlias(pVM, GCPhys, GCPhys + (offRange & ~(RTGCPHYS)PAGE_OFFSET_MASK),
-                                             pDevIns, hMmio2, offMmio2);
-#else
-            AssertFailed();
-            rc = VERR_NOT_IMPLEMENTED;
-            RT_NOREF(offMmio2, hMmio2);
-#endif
+            rc = PGMHandlerPhysicalPageAliasMmio2(pVM, GCPhys, GCPhys + (offRegion & ~(RTGCPHYS)PAGE_OFFSET_MASK),
+                                                  pDevIns, hMmio2, offMmio2);
         }
         else
@@ -1230 +1224 @@
  * @param   hRegion         The handle to the MMIO region.
  */
-VMM_INT_DECL(int) IOMMmioResetRegion(PVMCC pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion)
+VMMDECL(int) IOMMmioResetRegion(PVMCC pVM, PPDMDEVINS pDevIns, IOMMMIOHANDLE hRegion)
 {
     Log(("IOMMMIOResetRegion %#RX64\n", hRegion));

trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp

@@ -29 +29 @@
 #include <VBox/vmm/stam.h>
 #include <VBox/vmm/dbgf.h>
+#ifdef IN_RING0
+# include <VBox/vmm/pdmdev.h>
+#endif
 #include "PGMInternal.h"
 #include <VBox/vmm/vmcc.h>
@@ -1103 +1106 @@
  *
  * This is used in pair with PGMHandlerPhysicalPageTempOff(),
- * PGMHandlerPhysicalPageAlias() or PGMHandlerPhysicalPageAliasHC().
+ * PGMHandlerPhysicalPageAliasMmio2() or PGMHandlerPhysicalPageAliasHC().
  *
  * @returns VBox status code.
@@ -1283 +1286 @@
 
 /**
+ * Resolves an MMIO2 page.
+ *
+ * Caller as taken the PGM lock.
+ *
+ * @returns Pointer to the page if valid, NULL otherwise
+ * @param   pVM             The cross context VM structure.
+ * @param   pDevIns         The device owning it.
+ * @param   hMmio2          The MMIO2 region.
+ * @param   offMmio2Page    The offset into the region.
+ */
+static PPGMPAGE pgmPhysResolveMmio2PageLocked(PVMCC pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMmio2Page)
+{
+    /* Only works if the handle is in the handle table! */
+    AssertReturn(hMmio2 != 0, NULL);
+    hMmio2--;
+
+    /* Must check the first one for PGMREGMMIO2RANGE_F_FIRST_CHUNK. */
+    AssertReturn(hMmio2 < RT_ELEMENTS(pVM->pgm.s.apMmio2RangesR3), NULL);
+    PPGMREGMMIO2RANGE pCur = pVM->pgm.s.CTX_SUFF(apMmio2Ranges)[hMmio2];
+    AssertReturn(pCur, NULL);
+    AssertReturn(pCur->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK, NULL);
+
+    /* Loop thru the sub-ranges till we find the one covering offMmio2. */
+    for (;;)
+    {
+        AssertReturn(pCur->fFlags & PGMREGMMIO2RANGE_F_MMIO2, NULL);
+#ifdef IN_RING3
+        AssertReturn(pCur->pDevInsR3 == pDevIns, NULL);
+#else
+        AssertReturn(pCur->pDevInsR3 == pDevIns->pDevInsForR3, NULL);
+#endif
+
+        /* Does it match the offset? */
+        if (offMmio2Page < pCur->cbReal)
+            return &pCur->RamRange.aPages[offMmio2Page >> PAGE_SHIFT];
+
+        /* Advance if we can. */
+        AssertReturn(!(pCur->fFlags & PGMREGMMIO2RANGE_F_LAST_CHUNK), NULL);
+        offMmio2Page -= pCur->cbReal;
+        hMmio2++;
+        AssertReturn(hMmio2 < RT_ELEMENTS(pVM->pgm.s.apMmio2RangesR3), NULL);
+        pCur = pVM->pgm.s.CTX_SUFF(apMmio2Ranges)[hMmio2];
+        AssertReturn(pCur, NULL);
+    }
+}
+
+/**
  * Replaces an MMIO page with an MMIO2 page.
  *
@@ -1309 +1359 @@
  *                              start and end pages.
  * @param   GCPhysPage          The physical address of the page to turn off
- *                              access monitoring for.
+ *                              access monitoring for and replace with the MMIO2
+ *                              page.
  * @param   GCPhysPageRemap     The physical address of the MMIO2 page that
  *                              serves as backing memory.
@@ -1322 +1373 @@
  *
  */
-VMMDECL(int)  PGMHandlerPhysicalPageAlias(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage, RTGCPHYS GCPhysPageRemap)
-{
-///    Assert(!IOMIsLockOwner(pVM)); /* We mustn't own any other locks when calling this */
+VMMDECL(int)  PGMHandlerPhysicalPageAliasMmio2(PVMCC pVM, RTGCPHYS GCPhys, RTGCPHYS GCPhysPage,
+                                               PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS offMMio2PageRemap)
+{
     pgmLock(pVM);
+
+    /*
+     * Resolve the MMIO2 reference.
+     */
+    PPGMPAGE pPageRemap = pgmPhysResolveMmio2PageLocked(pVM, pDevIns, hMmio2, offMMio2PageRemap);
+    if (RT_LIKELY(pPageRemap))
+        AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
+                            ("hMmio2=%RU64 offMMio2PageRemap=%RGp %R[pgmpage]\n", hMmio2, offMMio2PageRemap, pPageRemap),
+                            pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
+    else
+    {
+        pgmUnlock(pVM);
+        return VERR_OUT_OF_RANGE;
+    }
 
     /*
@@ -1342 +1407 @@
 
             /*
-             * Get and validate the two pages.
+             * Validate the page.
              */
-            PPGMPAGE pPageRemap;
-            int rc = pgmPhysGetPageEx(pVM, GCPhysPageRemap, &pPageRemap);
-            AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
-            AssertMsgReturnStmt(PGM_PAGE_GET_TYPE(pPageRemap) == PGMPAGETYPE_MMIO2,
-                            ("GCPhysPageRemap=%RGp %R[pgmpage]\n", GCPhysPageRemap, pPageRemap),
-                            pgmUnlock(pVM), VERR_PGM_PHYS_NOT_MMIO2);
-
             PPGMPAGE pPage;
-            rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
+            int rc = pgmPhysGetPageEx(pVM, GCPhysPage, &pPage);
             AssertReturnStmt(RT_SUCCESS_NP(rc), pgmUnlock(pVM), rc);
             if (PGM_PAGE_GET_TYPE(pPage) != PGMPAGETYPE_MMIO)
@@ -1369 +1427 @@
                  * to an MMIO/ZERO page before doing the new mapping.
                  */
-                Log(("PGMHandlerPhysicalPageAlias: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
+                Log(("PGMHandlerPhysicalPageAliasMmio2: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
                      GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
                 pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, false /*fDoAccounting*/);
@@ -1380 +1438 @@
              * This page now serves as an alias for the backing memory specified.
              */
-            LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RGp (%R[pgmpage])\n",
-                     GCPhysPage, pPage, GCPhysPageRemap, pPageRemap ));
+            LogFlow(("PGMHandlerPhysicalPageAliasMmio2: %RGp (%R[pgmpage]) alias for %RU64/%RGp (%R[pgmpage])\n",
+                     GCPhysPage, pPage, hMmio2, offMMio2PageRemap, pPageRemap ));
             PGM_PAGE_SET_HCPHYS(pVM, pPage, PGM_PAGE_GET_HCPHYS(pPageRemap));
             PGM_PAGE_SET_TYPE(pVM, pPage, PGMPAGETYPE_MMIO2_ALIAS_MMIO);
@@ -1402 +1460 @@
                 PGM_PAGE_SET_NEM_STATE(pPage, u2State);
             }
-            LogFlow(("PGMHandlerPhysicalPageAlias: => %R[pgmpage]\n", pPage));
+            LogFlow(("PGMHandlerPhysicalPageAliasMmio2: => %R[pgmpage]\n", pPage));
             pgmUnlock(pVM);
             return VINF_SUCCESS;
@@ -1422 +1480 @@
  * Replaces an MMIO page with an arbitrary HC page in the shadow page tables.
  *
- * This differs from PGMHandlerPhysicalPageAlias in that the page doesn't need
- * to be a known MMIO2 page and that only shadow paging may access the page.
- * The latter distinction is important because the only use for this feature is
- * for mapping the special APIC access page that VT-x uses to detect APIC MMIO
- * operations, the page is shared between all guest CPUs and actually not
- * written to. At least at the moment.
+ * This differs from PGMHandlerPhysicalPageAliasMmio2 in that the page doesn't
+ * need to be a known MMIO2 page and that only shadow paging may access the
+ * page. The latter distinction is important because the only use for this
+ * feature is for mapping the special APIC access page that VT-x uses to detect
+ * APIC MMIO operations, the page is shared between all guest CPUs and actually
+ * not written to. At least at the moment.
  *
  * The caller must do required page table modifications. You can get away
@@ -1490 +1548 @@
              * specified as far as shadow paging is concerned.
              */
-            LogFlow(("PGMHandlerPhysicalPageAlias: %RGp (%R[pgmpage]) alias for %RHp\n",
+            LogFlow(("PGMHandlerPhysicalPageAliasHC: %RGp (%R[pgmpage]) alias for %RHp\n",
                      GCPhysPage, pPage, HCPhysPageRemap));
             PGM_PAGE_SET_HCPHYS(pVM, pPage, HCPhysPageRemap);

trunk/src/VBox/VMM/VMMR0/VMMR0.def

@@ -39 +39 @@
     PDMR0DeviceRegisterModule
     PDMR0DeviceDeregisterModule
-    IOMMMIOResetRegion
-    IOMMMIOMapMMIO2Page
+    IOMMmioResetRegion
+    IOMMmioMapMmio2Page
     RTLogDefaultInstance
     RTLogDefaultInstanceEx