VirtualBox

Changeset 82139 in vbox for trunk/src/VBox/Devices


Ignore:
Timestamp:
Nov 24, 2019 12:20:24 AM (5 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
134949
Message:

DevPCNet: Conveted I/O port handlers. bugref:9218

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Network/DevPCNet.cpp

    r82138 r82139  
    445445    /** Alignment padding. */
    446446    uint32_t                            Alignment6;
     447
     448    /** PCI Region \#0: I/O ports offset 0x10-0x1f. */
     449    IOMIOPORTHANDLE                     hIoPortsPci;
     450    /** PCI Region \#0: I/O ports offset 0x00-0x0f. */
     451    IOMIOPORTHANDLE                     hIoPortsPciAProm;
     452
     453    /** ISA I/O ports offset 0x10-0x1f. */
     454    IOMIOPORTHANDLE                     hIoPortsIsa;
     455    /** ISA I/O ports offset 0x00-0x0f. */
     456    IOMIOPORTHANDLE                     hIoPortsIsaAProm;
    447457
    448458    STAMCOUNTER                         StatReceiveBytes;
    … …  
    11461156static void     pcnetUpdateIrq(PPCNETSTATE pThis);
    11471157static uint32_t pcnetBCRReadU16(PPCNETSTATE pThis, uint32_t u32RAP);
    1148 static int      pcnetBCRWriteU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t u32RAP, uint32_t val);
     1158static VBOXSTRICTRC pcnetBCRWriteU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t u32RAP, uint32_t val);
    11491159
    11501160
    … …  
    28512861
    28522862
    2853 static int pcnetCSRWriteU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t u32RAP, uint32_t val)
    2854 {
    2855     int      rc  = VINF_SUCCESS;
     2863static VBOXSTRICTRC pcnetCSRWriteU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t u32RAP, uint32_t val)
     2864{
     2865    VBOXSTRICTRC rc  = VINF_SUCCESS;
    28562866#ifdef PCNET_DEBUG_CSR
    28572867    Log(("#%d pcnetCSRWriteU16: rap=%d val=%#06x\n", PCNET_INST_NR, u32RAP, val));
    … …  
    31083118}
    31093119
    3110 static int pcnetBCRWriteU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t u32RAP, uint32_t val)
    3111 {
    3112     int rc = VINF_SUCCESS;
     3120static VBOXSTRICTRC pcnetBCRWriteU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t u32RAP, uint32_t val)
     3121{
    31133122    u32RAP &= 0x7f;
    31143123#ifdef PCNET_DEBUG_BCR
    … …  
    31193128        case BCR_SWS:
    31203129            if (!(CSR_STOP(pThis) || CSR_SPND(pThis)))
    3121                 return rc;
     3130                return VINF_SUCCESS;
    31223131            val &= ~0x0300;
    31233132            switch (val & 0x00ff)
    … …  
    31773186            break;
    31783187    }
    3179     return rc;
     3188    return VINF_SUCCESS;
    31803189}
    31813190
    … …  
    34783487 * @callback_method_impl{FNIOMIOPORTIN, APROM}
    34793488 */
    3480 PDMBOTHCBDECL(int) pcnetIOPortAPromRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    3481 {
    3482     PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
    3483     int         rc    = VINF_SUCCESS;
     3489static DECLCALLBACK(VBOXSTRICTRC)
     3490pcnetIOPortAPromRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     3491{
     3492    PPCNETSTATE     pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
     3493    VBOXSTRICTRC    rc    = VINF_SUCCESS;
    34843494    STAM_PROFILE_ADV_START(&pThis->StatAPROMRead, a);
    34853495    Assert(PDMCritSectIsOwner(&pThis->CritSect));
    … …  
    34883498    /* FreeBSD is accessing in dwords. */
    34893499    if (cb == 1)
    3490         *pu32 = pcnetAPROMReadU8(pThis, Port);
     3500        *pu32 = pcnetAPROMReadU8(pThis, offPort);
    34913501    else if (cb == 2 && !BCR_DWIO(pThis))
    3492         *pu32 = pcnetAPROMReadU8(pThis, Port)
    3493               | (pcnetAPROMReadU8(pThis, Port + 1) << 8);
     3502        *pu32 = pcnetAPROMReadU8(pThis, offPort)
     3503              | (pcnetAPROMReadU8(pThis, offPort + 1) << 8);
    34943504    else if (cb == 4 && BCR_DWIO(pThis))
    3495         *pu32 = pcnetAPROMReadU8(pThis, Port)
    3496               | (pcnetAPROMReadU8(pThis, Port + 1) << 8)
    3497               | (pcnetAPROMReadU8(pThis, Port + 2) << 16)
    3498               | (pcnetAPROMReadU8(pThis, Port + 3) << 24);
     3505        *pu32 = pcnetAPROMReadU8(pThis, offPort)
     3506              | (pcnetAPROMReadU8(pThis, offPort + 1) << 8)
     3507              | (pcnetAPROMReadU8(pThis, offPort + 2) << 16)
     3508              | (pcnetAPROMReadU8(pThis, offPort + 3) << 24);
    34993509    else
    35003510    {
    3501         Log(("#%d pcnetIOPortAPromRead: Port=%RTiop cb=%d BCR_DWIO !!\n", PCNET_INST_NR, Port, cb));
     3511        Log(("#%d pcnetIOPortAPromRead: offPort=%RTiop cb=%d BCR_DWIO !!\n", PCNET_INST_NR, offPort, cb));
    35023512        rc = VERR_IOM_IOPORT_UNUSED;
    35033513    }
    35043514
    35053515    STAM_PROFILE_ADV_STOP(&pThis->StatAPROMRead, a);
    3506     LogFlow(("#%d pcnetIOPortAPromRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, *pu32, cb, rc));
     3516    LogFlow(("#%d pcnetIOPortAPromRead: offPort=%RTiop *pu32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, offPort, *pu32, cb, rc));
    35073517    return rc;
    35083518}
    … …  
    35123522 * @callback_method_impl{FNIOMIOPORTOUT, APROM}
    35133523 */
    3514 PDMBOTHCBDECL(int) pcnetIOPortAPromWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
    3515 {
    3516     PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
    3517     int         rc    = VINF_SUCCESS;
     3524static DECLCALLBACK(VBOXSTRICTRC)
     3525pcnetIoPortAPromWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
     3526{
     3527    PPCNETSTATE     pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
     3528    VBOXSTRICTRC    rc    = VINF_SUCCESS;
    35183529    Assert(PDMCritSectIsOwner(&pThis->CritSect));
    35193530    RT_NOREF_PV(pvUser);
    … …  
    35223533    {
    35233534        STAM_PROFILE_ADV_START(&pThis->StatAPROMWrite, a);
    3524         pcnetAPROMWriteU8(pThis, Port, u32);
     3535        pcnetAPROMWriteU8(pThis, offPort, u32);
    35253536        STAM_PROFILE_ADV_STOP(&pThis->StatAPROMWrite, a);
    35263537    }
    35273538    else
    3528         rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
    3529 
    3530     LogFlow(("#%d pcnetIOPortAPromWrite: Port=%RTiop u32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, u32, cb, rc));
     3539        rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32);
     3540
     3541    LogFlow(("#%d pcnetIoPortAPromWrite: offPort=%RTiop u32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, offPort, u32, cb, rc));
    35313542    return rc;
    35323543}
    … …  
    35363547
    35373548
    3538 static int pcnetIoPortWriteU8(PPCNETSTATE pThis, uint32_t addr, uint32_t val)
     3549static VBOXSTRICTRC pcnetIoPortWriteU8(PPCNETSTATE pThis, uint32_t addr, uint32_t val)
    35393550{
    35403551    RT_NOREF1(val);
    … …  
    35563567}
    35573568
    3558 static uint32_t pcnetIoPortReadU8(PPCNETSTATE pThis, uint32_t addr, int *pRC)
     3569static uint32_t pcnetIoPortReadU8(PPCNETSTATE pThis, uint32_t addr)
    35593570{
    35603571    uint32_t val = UINT32_MAX;
    3561 
    3562     *pRC = VINF_SUCCESS;
    35633572
    35643573    if (RT_LIKELY(!BCR_DWIO(pThis)))
    … …  
    35833592}
    35843593
    3585 static int pcnetIoPortWriteU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t addr, uint32_t val)
    3586 {
    3587     int rc = VINF_SUCCESS;
     3594static VBOXSTRICTRC pcnetIoPortWriteU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t addr, uint32_t val)
     3595{
     3596    VBOXSTRICTRC rc = VINF_SUCCESS;
    35883597
    35893598#ifdef PCNET_DEBUG_IO
    … …  
    36133622}
    36143623
    3615 static uint32_t pcnetIoPortReadU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t addr, int *pRC)
     3624static uint32_t pcnetIoPortReadU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t addr)
    36163625{
    36173626    uint32_t val = ~0U;
    3618 
    3619     *pRC = VINF_SUCCESS;
    36203627
    36213628    if (RT_LIKELY(!BCR_DWIO(pThis)))
    … …  
    36573664}
    36583665
    3659 static int pcnetIoPortWriteU32(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t addr, uint32_t val)
    3660 {
    3661     int rc = VINF_SUCCESS;
     3666static VBOXSTRICTRC pcnetIoPortWriteU32(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t addr, uint32_t val)
     3667{
     3668    VBOXSTRICTRC rc = VINF_SUCCESS;
    36623669
    36633670#ifdef PCNET_DEBUG_IO
    … …  
    36963703}
    36973704
    3698 static uint32_t pcnetIoPortReadU32(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t addr, int *pRC)
     3705static uint32_t pcnetIoPortReadU32(PPDMDEVINS pDevIns, PPCNETSTATE pThis, uint32_t addr)
    36993706{
    37003707    uint32_t val = ~0U;
    3701 
    3702     *pRC = VINF_SUCCESS;
    37033708
    37043709    if (RT_LIKELY(BCR_DWIO(pThis)))
    … …  
    37433748 * @callback_method_impl{FNIOMIOPORTIN}
    37443749 */
    3745 PDMBOTHCBDECL(int) pcnetIOPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
    3746 {
    3747     PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
    3748     int         rc    = VINF_SUCCESS;
     3750static DECLCALLBACK(VBOXSTRICTRC) pcnetIoPortRead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb)
     3751{
     3752    PPCNETSTATE     pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
     3753    VBOXSTRICTRC    rc    = VINF_SUCCESS;
    37493754    STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatIORead), a);
    37503755    Assert(PDMCritSectIsOwner(&pThis->CritSect));
    … …  
    37533758    switch (cb)
    37543759    {
    3755         case 1: *pu32 = pcnetIoPortReadU8(pThis, Port, &rc); break;
    3756         case 2: *pu32 = pcnetIoPortReadU16(pDevIns, pThis, Port, &rc); break;
    3757         case 4: *pu32 = pcnetIoPortReadU32(pDevIns, pThis, Port, &rc); break;
     3760        case 1: *pu32 = pcnetIoPortReadU8(pThis, offPort); break;
     3761        case 2: *pu32 = pcnetIoPortReadU16(pDevIns, pThis, offPort); break;
     3762        case 4: *pu32 = pcnetIoPortReadU32(pDevIns, pThis, offPort); break;
    37583763        default:
    37593764            rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS,
    3760                                    "pcnetIOPortRead: unsupported op size: offset=%#10x cb=%u\n",
    3761                                    Port, cb);
    3762     }
    3763 
    3764     Log2(("#%d pcnetIOPortRead: Port=%RTiop *pu32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, *pu32, cb, rc));
     3765                                   "pcnetIoPortRead: unsupported op size: offset=%#10x cb=%u\n", offPort, cb);
     3766    }
     3767
     3768    Log2(("#%d pcnetIoPortRead: offPort=%RTiop *pu32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, offPort, *pu32, cb, VBOXSTRICTRC_VAL(rc)));
    37653769    STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatIORead), a);
    37663770    return rc;
    … …  
    37713775 * @callback_method_impl{FNIOMIOPORTOUT}
    37723776 */
    3773 PDMBOTHCBDECL(int) pcnetIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
     3777static DECLCALLBACK(VBOXSTRICTRC) pcnetIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
    37743778{
    37753779    PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
    3776     int         rc    = VINF_SUCCESS;
     3780    VBOXSTRICTRC    rc    = VINF_SUCCESS;
    37773781    STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatIOWrite), a);
    37783782    Assert(PDMCritSectIsOwner(&pThis->CritSect));
    … …  
    37813785    switch (cb)
    37823786    {
    3783         case 1: rc = pcnetIoPortWriteU8(pThis, Port, u32); break;
    3784         case 2: rc = pcnetIoPortWriteU16(pDevIns, pThis, Port, u32); break;
    3785         case 4: rc = pcnetIoPortWriteU32(pDevIns, pThis, Port, u32); break;
     3787        case 1: rc = pcnetIoPortWriteU8(pThis, offPort, u32); break;
     3788        case 2: rc = pcnetIoPortWriteU16(pDevIns, pThis, offPort, u32); break;
     3789        case 4: rc = pcnetIoPortWriteU32(pDevIns, pThis, offPort, u32); break;
    37863790        default:
    37873791            rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS,
    3788                                    "pcnetIOPortWrite: unsupported op size: offset=%#10x cb=%u\n",
    3789                                    Port, cb);
    3790     }
    3791 
    3792     Log2(("#%d pcnetIOPortWrite: Port=%RTiop u32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, Port, u32, cb, rc));
     3792                                   "pcnetIoPortWrite: unsupported op size: offset=%#10x cb=%u\n", offPort, cb);
     3793    }
     3794
     3795    Log2(("#%d pcnetIoPortWrite: offPort=%RTiop u32=%#RX32 cb=%d rc=%Rrc\n", PCNET_INST_NR, offPort, u32, cb, VBOXSTRICTRC_VAL(rc)));
    37933796    STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatIOWrite), a);
    37943797    return rc;
    … …  
    38353838{
    38363839    uint32_t val = ~0U;
    3837     int      rc;
    38383840
    38393841    if (addr & 0x10)
    3840         val = pcnetIoPortReadU16(pDevIns, pThis, addr & 0x0f, &rc);
     3842        val = pcnetIoPortReadU16(pDevIns, pThis, addr & 0x0f);
    38413843    else
    38423844    {
    … …  
    38703872{
    38713873    uint32_t val;
    3872     int      rc;
    38733874
    38743875    if (addr & 0x10)
    3875         val = pcnetIoPortReadU32(pDevIns, pThis, addr & 0x0f, &rc);
     3876        val = pcnetIoPortReadU32(pDevIns, pThis, addr & 0x0f);
    38763877    else
    38773878    {
    … …  
    40444045 * @callback_method_impl{FNPCIIOREGIONMAP, For the PCnet I/O Ports.}
    40454046 */
    4046 static DECLCALLBACK(int) pcnetIOPortMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    4047                                         RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
     4047static DECLCALLBACK(int) pcnetR3PciMapUnmapIoPorts(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
     4048                                                   RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    40484049{
    40494050    PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
    4050     RTIOPORT    Port  = (RTIOPORT)GCPhysAddress;
     4051    int         rc;
    40514052    RT_NOREF(iRegion, cb, enmType, pPciDev);
    40524053
    … …  
    40554056    Assert(cb >= 0x20);
    40564057
    4057     int rc = PDMDevHlpIOPortRegister(pDevIns, Port, 0x10, 0, pcnetIOPortAPromWrite,
    4058                                      pcnetIOPortAPromRead, NULL, NULL, "PCnet APROM");
    4059     if (RT_FAILURE(rc))
    4060         return rc;
    4061     rc = PDMDevHlpIOPortRegister(pDevIns, Port + 0x10, 0x10, 0, pcnetIOPortWrite,
    4062                                  pcnetIOPortRead, NULL, NULL, "PCnet");
    4063     if (RT_FAILURE(rc))
    4064         return rc;
    4065 
    4066     if (pDevIns->fRCEnabled)
    4067     {
    4068         rc = PDMDevHlpIOPortRegisterRC(pDevIns, Port, 0x10, 0, "pcnetIOPortAPromWrite",
    4069                                        "pcnetIOPortAPromRead", NULL, NULL, "PCnet APROM");
    4070         if (RT_FAILURE(rc))
    4071             return rc;
    4072         rc = PDMDevHlpIOPortRegisterRC(pDevIns, Port + 0x10, 0x10, 0, "pcnetIOPortWrite",
    4073                                        "pcnetIOPortRead", NULL, NULL, "PCnet");
    4074         if (RT_FAILURE(rc))
    4075             return rc;
    4076     }
    4077     if (pDevIns->fR0Enabled)
    4078     {
    4079         rc = PDMDevHlpIOPortRegisterR0(pDevIns, Port, 0x10, 0, "pcnetIOPortAPromWrite",
    4080                                        "pcnetIOPortAPromRead", NULL, NULL, "PCnet APROM");
    4081         if (RT_FAILURE(rc))
    4082             return rc;
    4083         rc = PDMDevHlpIOPortRegisterR0(pDevIns, Port + 0x10, 0x10, 0, "pcnetIOPortWrite",
    4084                                        "pcnetIOPortRead", NULL, NULL, "PCnet");
    4085         if (RT_FAILURE(rc))
    4086             return rc;
    4087     }
    4088 
    4089     pThis->IOPortBase = Port;
     4058    if (GCPhysAddress != NIL_RTGCPHYS)
     4059    {
     4060        RTIOPORT Port = (RTIOPORT)GCPhysAddress;
     4061        rc = PDMDevHlpIoPortMap(pDevIns, pThis->hIoPortsPciAProm, Port);
     4062        AssertRCReturn(rc, rc);
     4063        rc = PDMDevHlpIoPortMap(pDevIns, pThis->hIoPortsPci, Port + 0x10);
     4064        AssertRCReturn(rc, rc);
     4065        pThis->IOPortBase = Port;
     4066    }
     4067    else
     4068    {
     4069        rc = PDMDevHlpIoPortUnmap(pDevIns, pThis->hIoPortsPciAProm);
     4070        AssertRCReturn(rc, rc);
     4071        rc = PDMDevHlpIoPortUnmap(pDevIns, pThis->hIoPortsPci);
     4072        AssertRCReturn(rc, rc);
     4073        pThis->IOPortBase = 0;
     4074    }
     4075
    40904076    return VINF_SUCCESS;
    40914077}
    … …  
    50795065     * Init what's required to make the destructor safe.
    50805066     */
    5081     pThis->hEventOutOfRxSpace = NIL_SUPSEMEVENT;
     5067    pThis->hEventOutOfRxSpace   = NIL_SUPSEMEVENT;
     5068    pThis->hIoPortsPci          = NIL_IOMIOPORTHANDLE;
     5069    pThis->hIoPortsPciAProm     = NIL_IOMIOPORTHANDLE;
     5070    pThis->hIoPortsIsa          = NIL_IOMIOPORTHANDLE;
     5071    pThis->hIoPortsIsaAProm     = NIL_IOMIOPORTHANDLE;
    50825072
    50835073    /*
    … …  
    52325222        rc = PDMDevHlpPCIRegister(pDevIns, pPciDev);
    52335223        AssertRCReturn(rc, rc);
    5234         rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, PCNET_IOPORT_SIZE,  PCI_ADDRESS_SPACE_IO,  pcnetIOPortMap);
     5224
     5225        /* Region #0: I/O ports - two handlers: */
     5226        rc = PDMDevHlpIoPortCreate(pDevIns, 0x10 /*cPorts*/, pPciDev, 0 /*iPciRegion*/,
     5227                                   pcnetIoPortAPromWrite, pcnetIOPortAPromRead, NULL /*pvUser*/,
     5228                                   "PCnet APROM",  NULL /*paExtDescs*/, &pThis->hIoPortsPciAProm);
    52355229        AssertRCReturn(rc, rc);
     5230        rc = PDMDevHlpIoPortCreate(pDevIns, 0x10 /*cPorts*/, pPciDev, 0 /*iPciRegion*/,
     5231                                   pcnetIoPortWrite, pcnetIoPortRead, NULL /*pvUser*/,
     5232                                   "PCnet",        NULL /*paExtDescs*/, &pThis->hIoPortsPci);
     5233        AssertRCReturn(rc, rc);
     5234        rc = PDMDevHlpPCIIORegionRegisterIoCustom(pDevIns, 0, PCNET_IOPORT_SIZE, pcnetR3PciMapUnmapIoPorts);
     5235        AssertRCReturn(rc, rc);
     5236
     5237        /* Region #1: MMIO */
    52365238        rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, PCNET_PNPMMIO_SIZE, PCI_ADDRESS_SPACE_MEM, pcnetMMIOMap);
    52375239        AssertRCReturn(rc, rc);
    … …  
    52435245    if (PCNET_IS_ISA(pThis))
    52445246    {
    5245         rc = PDMDevHlpIOPortRegister(pDevIns, pThis->IOPortBase, 0x10, 0, pcnetIOPortAPromWrite,
    5246                                      pcnetIOPortAPromRead, NULL, NULL, "PCnet APROM");
    5247         if (RT_FAILURE(rc))
    5248             return rc;
    5249         rc = PDMDevHlpIOPortRegister(pDevIns, pThis->IOPortBase + 0x10, 0x10, 0, pcnetIOPortWrite,
    5250                                      pcnetIOPortRead, NULL, NULL, "PCnet");
    5251         if (RT_FAILURE(rc))
    5252             return rc;
    5253 
    5254         if (pDevIns->fRCEnabled)
    5255         {
    5256             rc = PDMDevHlpIOPortRegisterRC(pDevIns, pThis->IOPortBase, 0x10, 0, "pcnetIOPortAPromWrite",
    5257                                            "pcnetIOPortAPromRead", NULL, NULL, "PCnet APROM");
    5258             if (RT_FAILURE(rc))
    5259                 return rc;
    5260             rc = PDMDevHlpIOPortRegisterRC(pDevIns, pThis->IOPortBase + 0x10, 0x10, 0, "pcnetIOPortWrite",
    5261                                            "pcnetIOPortRead", NULL, NULL, "PCnet");
    5262             if (RT_FAILURE(rc))
    5263                 return rc;
    5264         }
    5265         if (pDevIns->fR0Enabled)
    5266         {
    5267             rc = PDMDevHlpIOPortRegisterR0(pDevIns, pThis->IOPortBase, 0x10, 0, "pcnetIOPortAPromWrite",
    5268                                            "pcnetIOPortAPromRead", NULL, NULL, "PCnet APROM");
    5269             if (RT_FAILURE(rc))
    5270                 return rc;
    5271             rc = PDMDevHlpIOPortRegisterR0(pDevIns, pThis->IOPortBase + 0x10, 0x10, 0, "pcnetIOPortWrite",
    5272                                            "pcnetIOPortRead", NULL, NULL, "PCnet");
    5273             if (RT_FAILURE(rc))
    5274                 return rc;
    5275         }
    5276 
     5247        rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->IOPortBase, 0x10 /*cPorts*/, pcnetIoPortAPromWrite, pcnetIOPortAPromRead,
     5248                                         "PCnet APROM", NULL /*paExtDesc*/, &pThis->hIoPortsIsaAProm);
     5249        AssertRCReturn(rc, rc);
     5250        rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->IOPortBase + 0x10, 0x10 /*cPorts*/, pcnetIoPortWrite, pcnetIoPortRead,
     5251                                         "PCnet",       NULL /*paExtDesc*/, &pThis->hIoPortsIsa);
     5252        AssertRCReturn(rc, rc);
    52775253    }
    52785254
    … …  
    54675443    PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
    54685444
     5445    /* Critical section setup: */
    54695446    int rc = PDMDevHlpSetDeviceCritSect(pDevIns, &pThis->CritSect);
    54705447    AssertRCReturn(rc, rc);
     5448
     5449    /* PCI I/O ports: */
     5450    if (pThis->hIoPortsPciAProm != NIL_IOMIOPORTHANDLE)
     5451    {
     5452        rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPortsPciAProm, pcnetIoPortAPromWrite, pcnetIOPortAPromRead, NULL /*pvUser*/);
     5453        AssertRCReturn(rc, rc);
     5454        rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPortsPci, pcnetIoPortWrite, pcnetIoPortRead, NULL /*pvUser*/);
     5455        AssertRCReturn(rc, rc);
     5456    }
     5457    else
     5458        Assert(pThis->hIoPortsPci == NIL_IOMIOPORTHANDLE);
     5459
     5460    /* ISA I/O ports: */
     5461    if (pThis->hIoPortsIsaAProm != NIL_IOMIOPORTHANDLE)
     5462    {
     5463        rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPortsIsaAProm, pcnetIoPortAPromWrite, pcnetIOPortAPromRead, NULL /*pvUser*/);
     5464        AssertRCReturn(rc, rc);
     5465        rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPortsIsa, pcnetIoPortWrite, pcnetIoPortRead, NULL /*pvUser*/);
     5466        AssertRCReturn(rc, rc);
     5467    }
     5468    else
     5469        Assert(pThis->hIoPortsIsa == NIL_IOMIOPORTHANDLE);
    54715470
    54725471    return VINF_SUCCESS;
    … …  
    55245523#elif defined(IN_RING0)
    55255524    /* .pfnEarlyConstruct = */      NULL,
    5526     /* .pfnConstruct = */           NULL,
     5525    /* .pfnConstruct = */           pcnetRZConstruct,
    55275526    /* .pfnDestruct = */            NULL,
    55285527    /* .pfnFinalDestruct = */       NULL,
    … …  
    55375536    /* .pfnReserved7 = */           NULL,
    55385537#elif defined(IN_RC)
    5539     /* .pfnConstruct = */           NULL,
     5538    /* .pfnConstruct = */           pcnetRZConstruct,
    55405539    /* .pfnReserved0 = */           NULL,
    55415540    /* .pfnReserved1 = */           NULL,
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