VirtualBox

Changeset 82140 in vbox for trunk/src/VBox/Devices/Network


Ignore:
Timestamp:
Nov 24, 2019 12:40:38 AM (5 years ago)
Author:
vboxsync
Message:

DevPCNet: Converted MMIO handlers. bugref:9218

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Network/DevPCNet.cpp

    r82139 r82140  
    381381
    382382    /** Size of a RX/TX descriptor (8 or 16 bytes according to SWSTYLE */
    383     int                                 iLog2DescSize;
     383    int32_t                             iLog2DescSize;
    384384    /** Bits 16..23 in 16-bit mode */
    385385    RTGCPHYS32                          GCUpperPhys;
    386 
    387     /** Base address of the MMIO region. */
    388     RTGCPHYS32                          MMIOBase;
    389386
    390387    /** Base port of the I/O space region. */
    … …  
    450447    /** PCI Region \#0: I/O ports offset 0x00-0x0f. */
    451448    IOMIOPORTHANDLE                     hIoPortsPciAProm;
     449    /** PCI Region \#1: MMIO alternative to the I/O ports in region \#0. */
     450    IOMMMIOHANDLE                       hMmioPci;
    452451
    453452    /** ISA I/O ports offset 0x10-0x1f. */
    … …  
    37623761        case 4: *pu32 = pcnetIoPortReadU32(pDevIns, pThis, offPort); break;
    37633762        default:
    3764             rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS,
    3765                                    "pcnetIoPortRead: unsupported op size: offset=%#10x cb=%u\n", offPort, cb);
     3763            rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "pcnetIoPortRead: unsupported op size: offset=%#10x cb=%u\n", offPort, cb);
    37663764    }
    37673765
    … …  
    37773775static DECLCALLBACK(VBOXSTRICTRC) pcnetIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
    37783776{
    3779     PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
     3777    PPCNETSTATE     pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
    37803778    VBOXSTRICTRC    rc    = VINF_SUCCESS;
    37813779    STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatIOWrite), a);
    … …  
    37893787        case 4: rc = pcnetIoPortWriteU32(pDevIns, pThis, offPort, u32); break;
    37903788        default:
    3791             rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS,
    3792                                    "pcnetIoPortWrite: unsupported op size: offset=%#10x cb=%u\n", offPort, cb);
     3789            rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "pcnetIoPortWrite: unsupported op size: offset=%#10x cb=%u\n", offPort, cb);
    37933790    }
    37943791
    … …  
    38013798/* -=-=-=-=-=- MMIO -=-=-=-=-=- */
    38023799
    3803 static void pcnetMMIOWriteU8(PPCNETSTATE pThis, RTGCPHYS addr, uint32_t val)
     3800static void pcnetMMIOWriteU8(PPCNETSTATE pThis, RTGCPHYS off, uint32_t val)
    38043801{
    38053802#ifdef PCNET_DEBUG_IO
    3806     Log2(("#%d pcnetMMIOWriteU8: addr=%#010x val=%#04x\n", PCNET_INST_NR, addr, val));
    3807 #endif
    3808     if (!(addr & 0x10))
    3809         pcnetAPROMWriteU8(pThis, addr, val);
     3803    Log2(("#%d pcnetMMIOWriteU8: off=%#010x val=%#04x\n", PCNET_INST_NR, off, val));
     3804#endif
     3805    if (!(off & 0x10))
     3806        pcnetAPROMWriteU8(pThis, off, val);
    38103807}
    38113808
    … …  
    38213818}
    38223819
    3823 static void pcnetMMIOWriteU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, RTGCPHYS addr, uint32_t val)
    3824 {
     3820static VBOXSTRICTRC pcnetMMIOWriteU16(PPDMDEVINS pDevIns, PPCNETSTATE pThis, RTGCPHYS off, uint32_t val)
     3821{
     3822    VBOXSTRICTRC rcStrict;
    38253823#ifdef PCNET_DEBUG_IO
    3826     Log2(("#%d pcnetMMIOWriteU16: addr=%#010x val=%#06x\n", PCNET_INST_NR, addr, val));
    3827 #endif
    3828     if (addr & 0x10)
    3829         pcnetIoPortWriteU16(pDevIns, pThis, addr & 0x0f, val);
     3824    Log2(("#%d pcnetMMIOWriteU16: off=%#010x val=%#06x\n", PCNET_INST_NR, off, val));
     3825#endif
     3826    if (off & 0x10)
     3827    {
     3828        rcStrict = pcnetIoPortWriteU16(pDevIns, pThis, off & 0x0f, val);
     3829        if (rcStrict == VINF_IOM_R3_IOPORT_WRITE)
     3830            rcStrict = VINF_IOM_R3_MMIO_WRITE;
     3831    }
    38303832    else
    38313833    {
    3832         pcnetAPROMWriteU8(pThis, addr,   val     );
    3833         pcnetAPROMWriteU8(pThis, addr+1, val >> 8);
    3834     }
     3834        pcnetAPROMWriteU8(pThis, off,   val     );
     3835        pcnetAPROMWriteU8(pThis, off + 1, val >> 8);
     3836        rcStrict = VINF_SUCCESS;
     3837    }
     3838    return rcStrict;
    38353839}
    38363840
    … …  
    38533857}
    38543858
    3855 static void pcnetMMIOWriteU32(PPDMDEVINS pDevIns, PPCNETSTATE pThis, RTGCPHYS addr, uint32_t val)
    3856 {
     3859static VBOXSTRICTRC pcnetMMIOWriteU32(PPDMDEVINS pDevIns, PPCNETSTATE pThis, RTGCPHYS off, uint32_t val)
     3860{
     3861    VBOXSTRICTRC rcStrict;
    38573862#ifdef PCNET_DEBUG_IO
    3858     Log2(("#%d pcnetMMIOWriteU32: addr=%#010x val=%#010x\n", PCNET_INST_NR, addr, val));
    3859 #endif
    3860     if (addr & 0x10)
    3861         pcnetIoPortWriteU32(pDevIns, pThis, addr & 0x0f, val);
     3863    Log2(("#%d pcnetMMIOWriteU32: off=%#010x val=%#010x\n", PCNET_INST_NR, off, val));
     3864#endif
     3865    if (off & 0x10)
     3866    {
     3867        rcStrict = pcnetIoPortWriteU32(pDevIns, pThis, off & 0x0f, val);
     3868        if (rcStrict == VINF_IOM_R3_IOPORT_WRITE)
     3869            rcStrict = VINF_IOM_R3_MMIO_WRITE;
     3870    }
    38623871    else
    38633872    {
    3864         pcnetAPROMWriteU8(pThis, addr,   val      );
    3865         pcnetAPROMWriteU8(pThis, addr+1, val >>  8);
    3866         pcnetAPROMWriteU8(pThis, addr+2, val >> 16);
    3867         pcnetAPROMWriteU8(pThis, addr+3, val >> 24);
    3868     }
     3873        pcnetAPROMWriteU8(pThis, off,     val      );
     3874        pcnetAPROMWriteU8(pThis, off + 1, val >>  8);
     3875        pcnetAPROMWriteU8(pThis, off + 2, val >> 16);
     3876        pcnetAPROMWriteU8(pThis, off + 3, val >> 24);
     3877        rcStrict = VINF_SUCCESS;
     3878    }
     3879    return rcStrict;
    38693880}
    38703881
    … …  
    38913902}
    38923903
    3893 
    3894 /**
    3895  * @callback_method_impl{FNIOMMMIOREAD}
    3896  */
    3897 PDMBOTHCBDECL(int) pcnetMMIORead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
    3898 {
    3899     PPCNETSTATE pThis = (PPCNETSTATE)pvUser;
    3900     int         rc    = VINF_SUCCESS;
     3904#ifdef IN_RING3
     3905
     3906/**
     3907 * @callback_method_impl{FNIOMMMIONEWREAD}
     3908 */
     3909static DECLCALLBACK(VBOXSTRICTRC) pcnetR3MmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb)
     3910{
     3911    PPCNETSTATE     pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
     3912    VBOXSTRICTRC    rc    = VINF_SUCCESS;
    39013913    Assert(PDMCritSectIsOwner(&pThis->CritSect));
    3902     RT_NOREF_PV(pDevIns);
     3914    RT_NOREF_PV(pvUser);
    39033915
    39043916    /*
    39053917     * We have to check the range, because we're page aligning the MMIO.
    39063918     */
    3907     if (GCPhysAddr - pThis->MMIOBase < PCNET_PNPMMIO_SIZE)
     3919    if (off < PCNET_PNPMMIO_SIZE)
    39083920    {
    39093921        STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatMMIORead), a);
    39103922        switch (cb)
    39113923        {
    3912             case 1:  *(uint8_t  *)pv = pcnetMMIOReadU8 (pThis, GCPhysAddr); break;
    3913             case 2:  *(uint16_t *)pv = pcnetMMIOReadU16(pDevIns, pThis, GCPhysAddr); break;
    3914             case 4:  *(uint32_t *)pv = pcnetMMIOReadU32(pDevIns, pThis, GCPhysAddr); break;
     3924            case 1:  *(uint8_t  *)pv = pcnetMMIOReadU8 (pThis, off); break;
     3925            case 2:  *(uint16_t *)pv = pcnetMMIOReadU16(pDevIns, pThis, off); break;
     3926            case 4:  *(uint32_t *)pv = pcnetMMIOReadU32(pDevIns, pThis, off); break;
    39153927            default:
    3916                 rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS,
    3917                                        "pcnetMMIORead: unsupported op size: address=%RGp cb=%u\n",
    3918                                        GCPhysAddr, cb);
     3928                rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "pcnetR3MmioRead: unsupported op size: address=%RGp cb=%u\n", off, cb);
    39193929        }
    39203930        STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatMMIORead), a);
    … …  
    39233933        memset(pv, 0, cb);
    39243934
    3925     LogFlow(("#%d pcnetMMIORead: pvUser=%p:{%.*Rhxs} cb=%d GCPhysAddr=%RGp rc=%Rrc\n",
    3926              PCNET_INST_NR, pv, cb, pv, cb, GCPhysAddr, rc));
     3935    LogFlow(("#%d pcnetR3MmioRead: pvUser=%p:{%.*Rhxs} cb=%d off=%RGp rc=%Rrc\n",
     3936             PCNET_INST_NR, pv, cb, pv, cb, off, VBOXSTRICTRC_VAL(rc)));
    39273937    return rc;
    39283938}
    … …  
    39303940
    39313941/**
    3932  * @callback_method_impl{FNIOMMMIOWRITE}
    3933  */
    3934 PDMBOTHCBDECL(int) pcnetMMIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
    3935 {
    3936     PPCNETSTATE pThis = (PPCNETSTATE)pvUser;
    3937     int         rc    = VINF_SUCCESS;
     3942 * @callback_method_impl{FNIOMMMIONEWWRITE}
     3943 */
     3944static DECLCALLBACK(VBOXSTRICTRC) pcnetR3MmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb)
     3945{
     3946    PPCNETSTATE     pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
     3947    VBOXSTRICTRC    rc    = VINF_SUCCESS;
    39383948    Assert(PDMCritSectIsOwner(&pThis->CritSect));
    3939     RT_NOREF_PV(pDevIns);
     3949    RT_NOREF_PV(pvUser);
    39403950
    39413951    /*
    39423952     * We have to check the range, because we're page aligning the MMIO stuff presently.
    39433953     */
    3944     if (GCPhysAddr - pThis->MMIOBase < PCNET_PNPMMIO_SIZE)
     3954    if (off < PCNET_PNPMMIO_SIZE)
    39453955    {
    39463956        STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatMMIOWrite), a);
    39473957        switch (cb)
    39483958        {
    3949             case 1:  pcnetMMIOWriteU8 (pThis, GCPhysAddr, *(uint8_t  *)pv); break;
    3950             case 2:  pcnetMMIOWriteU16(pDevIns, pThis, GCPhysAddr, *(uint16_t *)pv); break;
    3951             case 4:  pcnetMMIOWriteU32(pDevIns, pThis, GCPhysAddr, *(uint32_t *)pv); break;
     3959            case 1:  pcnetMMIOWriteU8(pThis, off, *(uint8_t  *)pv); break;
     3960            case 2:  rc = pcnetMMIOWriteU16(pDevIns, pThis, off, *(uint16_t *)pv); break;
     3961            case 4:  rc = pcnetMMIOWriteU32(pDevIns, pThis, off, *(uint32_t *)pv); break;
    39523962            default:
    3953                 rc = PDMDevHlpDBGFStop(pThis->CTX_SUFF(pDevIns), RT_SRC_POS,
    3954                                        "pcnetMMIOWrite: unsupported op size: address=%RGp cb=%u\n",
    3955                                        GCPhysAddr, cb);
     3963                rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "pcnetR3MmioWrite: unsupported op size: address=%RGp cb=%u\n", off, cb);
    39563964        }
    39573965
    39583966        STAM_PROFILE_ADV_STOP(&pThis->CTX_SUFF_Z(StatMMIOWrite), a);
    39593967    }
    3960     LogFlow(("#%d pcnetMMIOWrite: pvUser=%p:{%.*Rhxs} cb=%d GCPhysAddr=%RGp rc=%Rrc\n",
    3961              PCNET_INST_NR, pv, cb, pv, cb, GCPhysAddr, rc));
     3968    LogFlow(("#%d pcnetR3MmioWrite: pvUser=%p:{%.*Rhxs} cb=%d off=%RGp rc=%Rrc\n",
     3969             PCNET_INST_NR, pv, cb, pv, cb, off, VBOXSTRICTRC_VAL(rc)));
    39623970    return rc;
    39633971}
    39643972
    39653973
    3966 #ifdef IN_RING3
    39673974
    39683975/* -=-=-=-=-=- Timer Callbacks -=-=-=-=-=- */
    … …  
    40784085
    40794086
    4080 /**
    4081  * @callback_method_impl{FNPCIIOREGIONMAP, For the PCnet MMIO region.}
    4082  */
    4083 static DECLCALLBACK(int) pcnetMMIOMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
    4084                                       RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
    4085 {
    4086     PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE);
    4087     RT_NOREF(iRegion, cb, enmType, pPciDev);
    4088 
    4089     Assert(pDevIns->apPciDevs[0] == pPciDev);
    4090     Assert(enmType == PCI_ADDRESS_SPACE_MEM);
    4091     Assert(cb >= PCNET_PNPMMIO_SIZE);
    4092 
    4093     /* We use the assigned size here, because we only support page aligned MMIO ranges. */
    4094     int rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, pThis,
    4095                                    IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU,
    4096                                    pcnetMMIOWrite, pcnetMMIORead, "PCnet");
    4097     if (RT_FAILURE(rc))
    4098         return rc;
    4099     pThis->MMIOBase = GCPhysAddress;
    4100     return rc;
    4101 }
    4102 
    4103 
    41044087/* -=-=-=-=-=- Debug Info Handler -=-=-=-=-=- */
    41054088
    … …  
    41374120    }
    41384121    pHlp->pfnPrintf(pHlp,
    4139                     "pcnet #%d: port=%RTiop mmio=%RX32 mac-cfg=%RTmac %s%s%s\n",
    4140                     pDevIns->iInstance,
    4141                     pThis->IOPortBase, pThis->MMIOBase, &pThis->MacConfigured,
    4142                     pcszModel, pDevIns->fRCEnabled ? " RC" : "", pDevIns->fR0Enabled ? " R0" : "");
     4122                    "pcnet #%d: port=%RTiop mmio=%RX32 mac-cfg=%RTmac %s%s%s\n", pDevIns->iInstance,
     4123                    pThis->IOPortBase, PDMDevHlpMmioGetMappingAddress(pDevIns, pThis->hMmioPci),
     4124                    &pThis->MacConfigured, pcszModel, pDevIns->fRCEnabled ? " RC" : "", pDevIns->fR0Enabled ? " R0" : "");
    41434125
    41444126    PDMCritSectEnter(&pThis->CritSect, VERR_INTERNAL_ERROR); /* Take it here so we know why we're hanging... */
    … …  
    52185200     * Register the PCI device, its I/O regions, the timer and the saved state item.
    52195201     */
     5202    Assert(PCNET_IS_PCI(pThis) != PCNET_IS_ISA(pThis)); /* IOPortBase is shared, so it's either one or the other! */
     5203
    52205204    if (PCNET_IS_PCI(pThis))
    52215205    {
    … …  
    52365220
    52375221        /* Region #1: MMIO */
    5238         rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, PCNET_PNPMMIO_SIZE, PCI_ADDRESS_SPACE_MEM, pcnetMMIOMap);
     5222        rc = PDMDevHlpPCIIORegionCreateMmio(pDevIns, 1 /*iPciRegion*/, PCNET_PNPMMIO_SIZE, PCI_ADDRESS_SPACE_MEM,
     5223                                            pcnetR3MmioWrite, pcnetR3MmioRead, NULL /*pvUser*/,
     5224                                            IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU,
     5225                                            "PCnet", &pThis->hMmioPci);
    52395226        AssertRCReturn(rc, rc);
    52405227    }
    … …  
    54575444    else
    54585445        Assert(pThis->hIoPortsPci == NIL_IOMIOPORTHANDLE);
     5446
     5447    /** @todo PCI MMIO   */
    54595448
    54605449    /* ISA I/O ports: */
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