- Timestamp:
- Nov 24, 2019 11:56:38 AM (5 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Network/DevPCNet.cpp
r82146 r82147 1221 1221 uint32_t offsetTDRA = (GCPhysFault - pThis->GCTDRA); 1222 1222 1223 int rc = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);1223 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 1224 1224 if (RT_SUCCESS(rc)) 1225 1225 { … … 1230 1230 pcnetUpdateIrq(pDevIns, pThis); 1231 1231 1232 PDM CritSectLeave(&pThis->CritSect);1232 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1233 1233 return VINF_SUCCESS; 1234 1234 } … … 1268 1268 1269 1269 /* Writes done by our code don't require polling of course */ 1270 if (PDM CritSectIsOwner(&pThis->CritSect) == false)1270 if (PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect) == false) 1271 1271 { 1272 1272 if ( (GCPhys >= pThis->GCTDRA && GCPhys + cbBuf < pcnetTdraAddr(pThis, 0)) … … 1276 1276 ) 1277 1277 { 1278 int rc = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);1278 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 1279 1279 AssertReleaseRC(rc); 1280 1280 /* Check if we can do something now */ 1281 1281 pcnetPollRxTx(pDevIns, pThis, pThisCC); 1282 1282 pcnetUpdateIrq(pDevIns, pThis); 1283 PDM CritSectLeave(&pThis->CritSect);1283 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 1284 1284 } 1285 1285 } … … 2026 2026 * - we don't cache any register state beyond this point 2027 2027 */ 2028 PDM CritSectLeave(&pThis->CritSect);2028 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 2029 2029 pcnetPhysWrite(pDevIns, pThis, rbadr, src, cbBuf); 2030 int rc = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);2030 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 2031 2031 AssertReleaseRC(rc); 2032 2032 … … 2073 2073 * with EMT when the write is to an unallocated page or has an access 2074 2074 * handler associated with it. See above for additional comments. */ 2075 PDM CritSectLeave(&pThis->CritSect);2075 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 2076 2076 pcnetPhysWrite(pDevIns, pThis, rbadr2, src, cbBuf); 2077 rc = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);2077 rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 2078 2078 AssertReleaseRC(rc); 2079 2079 … … 2365 2365 PPDMSCATTERGATHER pSgBuf) 2366 2366 { 2367 Assert(PDM CritSectIsOwner(&pThis->CritSect)); RT_NOREF(pThis);2367 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); RT_NOREF(pThis); 2368 2368 Assert(pSgBuf->cbAvailable >= cbFrame); 2369 2369 … … 2474 2474 static int pcnetAsyncTransmit(PPDMDEVINS pDevIns, PPCNETSTATE pThis, PPCNETSTATECC pThisCC, bool fOnWorkerThread) 2475 2475 { 2476 Assert(PDM CritSectIsOwner(&pThis->CritSect));2476 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 2477 2477 2478 2478 /* … … 2774 2774 return rc; 2775 2775 } 2776 rc = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);2776 rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 2777 2777 if (RT_SUCCESS(rc)) 2778 2778 { … … 2787 2787 * Release the locks. 2788 2788 */ 2789 PDM CritSectLeave(&pThis->CritSect);2789 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 2790 2790 } 2791 2791 else … … 3518 3518 VBOXSTRICTRC rc = VINF_SUCCESS; 3519 3519 STAM_PROFILE_ADV_START(&pThis->StatAPROMRead, a); 3520 Assert(PDM CritSectIsOwner(&pThis->CritSect));3520 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 3521 3521 RT_NOREF_PV(pvUser); 3522 3522 … … 3553 3553 PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE); 3554 3554 VBOXSTRICTRC rc = VINF_SUCCESS; 3555 Assert(PDM CritSectIsOwner(&pThis->CritSect));3555 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 3556 3556 RT_NOREF_PV(pvUser); 3557 3557 … … 3766 3766 VBOXSTRICTRC rc = VINF_SUCCESS; 3767 3767 STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatIORead), a); 3768 Assert(PDM CritSectIsOwner(&pThis->CritSect));3768 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 3769 3769 RT_NOREF_PV(pvUser); 3770 3770 … … 3793 3793 VBOXSTRICTRC rc; 3794 3794 STAM_PROFILE_ADV_START(&pThis->CTX_SUFF_Z(StatIOWrite), a); 3795 Assert(PDM CritSectIsOwner(&pThis->CritSect));3795 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 3796 3796 RT_NOREF_PV(pvUser); 3797 3797 … … 3916 3916 PPCNETSTATECC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PPCNETSTATECC); 3917 3917 VBOXSTRICTRC rc = VINF_SUCCESS; 3918 Assert(PDM CritSectIsOwner(&pThis->CritSect));3918 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 3919 3919 RT_NOREF_PV(pvUser); 3920 3920 … … 3952 3952 PPCNETSTATECC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PPCNETSTATECC); 3953 3953 VBOXSTRICTRC rc = VINF_SUCCESS; 3954 Assert(PDM CritSectIsOwner(&pThis->CritSect));3954 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 3955 3955 RT_NOREF_PV(pvUser); 3956 3956 … … 3988 3988 PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE); 3989 3989 PPCNETSTATECC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PPCNETSTATECC); 3990 Assert(PDM CritSectIsOwner(&pThis->CritSect));3990 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 3991 3991 RT_NOREF(pvUser, pTimer); 3992 3992 … … 4004 4004 { 4005 4005 PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE); 4006 Assert(PDM CritSectIsOwner(&pThis->CritSect));4006 Assert(PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 4007 4007 RT_NOREF(pvUser, pTimer); 4008 4008 … … 4025 4025 RT_NOREF(pTimer, pvUser); 4026 4026 4027 int rc = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);4027 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4028 4028 AssertReleaseRC(rc); 4029 4029 … … 4050 4050 pDevIns->iInstance, pThis->cLinkDownReported)); 4051 4051 4052 PDM CritSectLeave(&pThis->CritSect);4052 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 4053 4053 } 4054 4054 … … 4131 4131 &pThis->MacConfigured, pcszModel, pDevIns->fRCEnabled ? " RC" : "", pDevIns->fR0Enabled ? " R0" : ""); 4132 4132 4133 PDM CritSectEnter(&pThis->CritSect, VERR_INTERNAL_ERROR); /* Take it here so we know why we're hanging... */4133 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_INTERNAL_ERROR); /* Take it here so we know why we're hanging... */ 4134 4134 4135 4135 pHlp->pfnPrintf(pHlp, … … 4353 4353 } 4354 4354 4355 PDM CritSectLeave(&pThis->CritSect);4355 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 4356 4356 } 4357 4357 … … 4422 4422 PPCNETSTATE pThis = PDMDEVINS_2_DATA(pDevIns, PPCNETSTATE); 4423 4423 4424 int rc = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);4424 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4425 4425 AssertRC(rc); 4426 PDM CritSectLeave(&pThis->CritSect);4426 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 4427 4427 4428 4428 return VINF_SUCCESS; … … 4475 4475 PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3; 4476 4476 4477 int rc = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);4477 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4478 4478 AssertRC(rc); 4479 4479 … … 4491 4491 pThis->fSharedRegion = true; 4492 4492 } 4493 PDM CritSectLeave(&pThis->CritSect);4493 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 4494 4494 4495 4495 return rc; … … 4633 4633 static int pcnetR3CanReceive(PPDMDEVINS pDevIns, PPCNETSTATE pThis) 4634 4634 { 4635 int rc = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);4635 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4636 4636 AssertReleaseRC(rc); 4637 4637 … … 4653 4653 } 4654 4654 4655 PDM CritSectLeave(&pThis->CritSect);4655 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 4656 4656 return rc; 4657 4657 } … … 4689 4689 /* Start the poll timer once which will remain active as long fMaybeOutOfSpace 4690 4690 * is true -- even if (transmit) polling is disabled (CSR_DPOLL). */ 4691 rc2 = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);4691 rc2 = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4692 4692 AssertReleaseRC(rc2); 4693 4693 #ifndef PCNET_NO_POLLING 4694 4694 pcnetPollTimerStart(pDevIns, pThis); 4695 4695 #endif 4696 PDM CritSectLeave(&pThis->CritSect);4696 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 4697 4697 PDMDevHlpSUPSemEventWaitNoResume(pDevIns, pThis->hEventOutOfRxSpace, cMillies); 4698 4698 } … … 4714 4714 4715 4715 STAM_PROFILE_ADV_START(&pThis->StatReceive, a); 4716 int rc = PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);4716 int rc = PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4717 4717 AssertReleaseRC(rc); 4718 4718 … … 4752 4752 #endif /* LOG_ENABLED */ 4753 4753 4754 PDM CritSectLeave(&pThis->CritSect);4754 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 4755 4755 STAM_PROFILE_ADV_STOP(&pThis->StatReceive, a); 4756 4756 … … 4850 4850 pThis->Led.Asserted.s.fError = pThis->Led.Actual.s.fError = 1; 4851 4851 } 4852 Assert(!PDM CritSectIsOwner(&pThis->CritSect));4852 Assert(!PDMDevHlpCritSectIsOwner(pDevIns, &pThis->CritSect)); 4853 4853 if (pThisCC->pDrv) 4854 4854 pThisCC->pDrv->pfnNotifyLinkChanged(pThisCC->pDrv, enmState); … … 4920 4920 AssertLogRelReturnVoid(iLUN == 0); 4921 4921 4922 PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);4922 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4923 4923 4924 4924 /** @todo r=pritesh still need to check if i missed … … 4936 4936 //pThis->pDrvRC = NIL_RTRCPTR; 4937 4937 4938 PDM CritSectLeave(&pThis->CritSect);4938 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 4939 4939 } 4940 4940 … … 4953 4953 AssertLogRelReturn(iLUN == 0, VERR_PDM_NO_SUCH_LUN); 4954 4954 4955 PDM CritSectEnter(&pThis->CritSect, VERR_SEM_BUSY);4955 PDMDevHlpCritSectEnter(pDevIns, &pThis->CritSect, VERR_SEM_BUSY); 4956 4956 4957 4957 /* … … 4985 4985 pcnetR3TempLinkDown(pDevIns, pThis); 4986 4986 4987 PDM CritSectLeave(&pThis->CritSect);4987 PDMDevHlpCritSectLeave(pDevIns, &pThis->CritSect); 4988 4988 return rc; 4989 4989 … … 5047 5047 } 5048 5048 5049 if (PDM CritSectIsInitialized(&pThis->CritSect))5050 PDM R3CritSectDelete(&pThis->CritSect);5049 if (PDMDevHlpCritSectIsInitialized(pDevIns, &pThis->CritSect)) 5050 PDMDevHlpCritSectDelete(pDevIns, &pThis->CritSect); 5051 5051 return VINF_SUCCESS; 5052 5052 }
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