- Timestamp:
- Apr 21, 2008 2:29:54 PM (17 years ago)
- svn:sync-xref-src-repo-rev:
- 29963
- Location:
- trunk
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/dis.h
r8228 r8234 342 342 union 343 343 { 344 uint32_t reg_gen8; 345 uint32_t reg_gen16; 346 uint32_t reg_gen32; 347 uint32_t reg_gen64; 344 uint32_t reg_gen; 348 345 /** ST(0) - ST(7) */ 349 346 uint32_t reg_fp; -
trunk/src/VBox/Disassembler/DisasmCore.cpp
r8155 r8234 532 532 533 533 pParam->flags |= USE_BASE | USE_REG_GEN32; 534 pParam->base.reg_gen 32= base;534 pParam->base.reg_gen = base; 535 535 } 536 536 return; /* Already fetched everything in ParseSIB; no size returned */ … … 1240 1240 { 1241 1241 /* Use 32-bit registers. */ 1242 pParam->base.reg_gen 32= pParam->param - OP_PARM_REG_GEN32_START;1242 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START; 1243 1243 pParam->flags |= USE_REG_GEN32; 1244 1244 pParam->size = 4; … … 1247 1247 { 1248 1248 /* Use 16-bit registers. */ 1249 pParam->base.reg_gen 16= pParam->param - OP_PARM_REG_GEN32_START;1249 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN32_START; 1250 1250 pParam->flags |= USE_REG_GEN16; 1251 1251 pParam->size = 2; … … 1265 1265 { 1266 1266 /* 16-bit AX..DI registers. */ 1267 pParam->base.reg_gen 16= pParam->param - OP_PARM_REG_GEN16_START;1267 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN16_START; 1268 1268 pParam->flags |= USE_REG_GEN16; 1269 1269 pParam->size = 2; … … 1273 1273 { 1274 1274 /* 8-bit AL..DL, AH..DH registers. */ 1275 pParam->base.reg_gen 8= pParam->param - OP_PARM_REG_GEN8_START;1275 pParam->base.reg_gen = pParam->param - OP_PARM_REG_GEN8_START; 1276 1276 pParam->flags |= USE_REG_GEN8; 1277 1277 pParam->size = 1; … … 1299 1299 if (pCpu->addrmode == CPUMODE_32BIT) 1300 1300 { 1301 pParam->base.reg_gen 32= USE_REG_ESI;1301 pParam->base.reg_gen = USE_REG_ESI; 1302 1302 pParam->flags |= USE_REG_GEN32; 1303 1303 } 1304 1304 else 1305 1305 { 1306 pParam->base.reg_gen 16= USE_REG_SI;1306 pParam->base.reg_gen = USE_REG_SI; 1307 1307 pParam->flags |= USE_REG_GEN16; 1308 1308 } … … 1318 1318 if (pCpu->addrmode == CPUMODE_32BIT) 1319 1319 { 1320 pParam->base.reg_gen 32= USE_REG_ESI;1320 pParam->base.reg_gen = USE_REG_ESI; 1321 1321 pParam->flags |= USE_REG_GEN32; 1322 1322 } 1323 1323 else 1324 1324 { 1325 pParam->base.reg_gen 16= USE_REG_SI;1325 pParam->base.reg_gen = USE_REG_SI; 1326 1326 pParam->flags |= USE_REG_GEN16; 1327 1327 } … … 1338 1338 if (pCpu->addrmode == CPUMODE_32BIT) 1339 1339 { 1340 pParam->base.reg_gen 32= USE_REG_EDI;1340 pParam->base.reg_gen = USE_REG_EDI; 1341 1341 pParam->flags |= USE_REG_GEN32; 1342 1342 } 1343 1343 else 1344 1344 { 1345 pParam->base.reg_gen 16= USE_REG_DI;1345 pParam->base.reg_gen = USE_REG_DI; 1346 1346 pParam->flags |= USE_REG_GEN16; 1347 1347 } … … 1357 1357 if (pCpu->addrmode == CPUMODE_32BIT) 1358 1358 { 1359 pParam->base.reg_gen 32= USE_REG_EDI;1359 pParam->base.reg_gen = USE_REG_EDI; 1360 1360 pParam->flags |= USE_REG_GEN32; 1361 1361 } 1362 1362 else 1363 1363 { 1364 pParam->base.reg_gen 16= USE_REG_DI;1364 pParam->base.reg_gen = USE_REG_DI; 1365 1365 pParam->flags |= USE_REG_GEN16; 1366 1366 } … … 1826 1826 disasmAddString(pParam->szParam, szModRMReg8[idx]); 1827 1827 pParam->flags |= USE_REG_GEN8; 1828 pParam->base.reg_gen 8= idx;1828 pParam->base.reg_gen = idx; 1829 1829 break; 1830 1830 … … 1832 1832 disasmAddString(pParam->szParam, szModRMReg16[idx]); 1833 1833 pParam->flags |= USE_REG_GEN16; 1834 pParam->base.reg_gen 16= idx;1834 pParam->base.reg_gen = idx; 1835 1835 break; 1836 1836 … … 1838 1838 disasmAddString(pParam->szParam, szModRMReg32[idx]); 1839 1839 pParam->flags |= USE_REG_GEN32; 1840 pParam->base.reg_gen 32= idx;1840 pParam->base.reg_gen = idx; 1841 1841 break; 1842 1842 … … 1860 1860 disasmAddString(pParam->szParam, szModRMReg1616[idx]); 1861 1861 pParam->flags |= USE_REG_GEN16; 1862 pParam->base.reg_gen 16= BaseModRMReg16[idx];1862 pParam->base.reg_gen = BaseModRMReg16[idx]; 1863 1863 if (idx < 4) 1864 1864 { -
trunk/src/VBox/Disassembler/DisasmReg.cpp
r8168 r8234 207 207 return 8; 208 208 209 case OP_PARM_p: 209 case OP_PARM_p: /* far pointer */ 210 210 if (pCpu->addrmode == CPUMODE_32BIT) 211 return 8; 212 else 213 return 4; 211 return 6; /* 16:32 */ 212 else 213 if (pCpu->addrmode == CPUMODE_64BIT) 214 return 12; /* 16:64 */ 215 else 216 return 4; /* 16:16 */ 214 217 215 218 default: … … 232 235 { 233 236 /* Guess segment register by parameter type. */ 234 if (pParam->flags & USE_REG_GEN32) 235 { 236 if (pParam->base.reg_gen32 == USE_REG_ESP || pParam->base.reg_gen32 == USE_REG_EBP) 237 return USE_REG_SS; 238 } 239 else 240 if (pParam->flags & USE_REG_GEN16) 241 { 242 if (pParam->base.reg_gen16 == USE_REG_SP || pParam->base.reg_gen16 == USE_REG_BP) 237 if (pParam->flags & (USE_REG_GEN32|USE_REG_GEN64|USE_REG_GEN16)) 238 { 239 AssertCompile(USE_REG_ESP == USE_REG_RSP); 240 AssertCompile(USE_REG_EBP == USE_REG_RBP); 241 AssertCompile(USE_REG_ESP == USE_REG_SP); 242 AssertCompile(USE_REG_EBP == USE_REG_BP); 243 if (pParam->base.reg_gen == USE_REG_ESP || pParam->base.reg_gen == USE_REG_EBP) 243 244 return USE_REG_SS; 244 245 } … … 486 487 { 487 488 pParamVal->flags |= PARAM_VAL8; 488 if (VBOX_FAILURE(DISFetchReg8(pCtx, pParam->base.reg_gen 8, &pParamVal->val.val8))) return VERR_INVALID_PARAMETER;489 if (VBOX_FAILURE(DISFetchReg8(pCtx, pParam->base.reg_gen, &pParamVal->val.val8))) return VERR_INVALID_PARAMETER; 489 490 } 490 491 else … … 492 493 { 493 494 pParamVal->flags |= PARAM_VAL16; 494 if (VBOX_FAILURE(DISFetchReg16(pCtx, pParam->base.reg_gen 16, &pParamVal->val.val16))) return VERR_INVALID_PARAMETER;495 if (VBOX_FAILURE(DISFetchReg16(pCtx, pParam->base.reg_gen, &pParamVal->val.val16))) return VERR_INVALID_PARAMETER; 495 496 } 496 497 else … … 498 499 { 499 500 pParamVal->flags |= PARAM_VAL32; 500 if (VBOX_FAILURE(DISFetchReg32(pCtx, pParam->base.reg_gen 32, &pParamVal->val.val32))) return VERR_INVALID_PARAMETER;501 if (VBOX_FAILURE(DISFetchReg32(pCtx, pParam->base.reg_gen, &pParamVal->val.val32))) return VERR_INVALID_PARAMETER; 501 502 } 502 503 else … … 504 505 { 505 506 pParamVal->flags |= PARAM_VAL64; 506 if (VBOX_FAILURE(DISFetchReg64(pCtx, pParam->base.reg_gen 64, &pParamVal->val.val64))) return VERR_INVALID_PARAMETER;507 if (VBOX_FAILURE(DISFetchReg64(pCtx, pParam->base.reg_gen, &pParamVal->val.val64))) return VERR_INVALID_PARAMETER; 507 508 } 508 509 else { … … 581 582 pParamVal->flags |= PARAM_VAL8; 582 583 pParamVal->size = sizeof(uint8_t); 583 if (VBOX_FAILURE(DISFetchReg8(pCtx, pParam->base.reg_gen 8, &pParamVal->val.val8))) return VERR_INVALID_PARAMETER;584 if (VBOX_FAILURE(DISFetchReg8(pCtx, pParam->base.reg_gen, &pParamVal->val.val8))) return VERR_INVALID_PARAMETER; 584 585 } 585 586 else … … 588 589 pParamVal->flags |= PARAM_VAL16; 589 590 pParamVal->size = sizeof(uint16_t); 590 if (VBOX_FAILURE(DISFetchReg16(pCtx, pParam->base.reg_gen 16, &pParamVal->val.val16))) return VERR_INVALID_PARAMETER;591 if (VBOX_FAILURE(DISFetchReg16(pCtx, pParam->base.reg_gen, &pParamVal->val.val16))) return VERR_INVALID_PARAMETER; 591 592 } 592 593 else … … 595 596 pParamVal->flags |= PARAM_VAL32; 596 597 pParamVal->size = sizeof(uint32_t); 597 if (VBOX_FAILURE(DISFetchReg32(pCtx, pParam->base.reg_gen 32, &pParamVal->val.val32))) return VERR_INVALID_PARAMETER;598 if (VBOX_FAILURE(DISFetchReg32(pCtx, pParam->base.reg_gen, &pParamVal->val.val32))) return VERR_INVALID_PARAMETER; 598 599 } 599 600 else … … 602 603 pParamVal->flags |= PARAM_VAL64; 603 604 pParamVal->size = sizeof(uint64_t); 604 if (VBOX_FAILURE(DISFetchReg64(pCtx, pParam->base.reg_gen 64, &pParamVal->val.val64))) return VERR_INVALID_PARAMETER;605 if (VBOX_FAILURE(DISFetchReg64(pCtx, pParam->base.reg_gen, &pParamVal->val.val64))) return VERR_INVALID_PARAMETER; 605 606 } 606 607 else … … 698 699 { 699 700 uint8_t *pu8Reg; 700 if (VBOX_SUCCESS(DISPtrReg8(pCtx, pParam->base.reg_gen 8, &pu8Reg)))701 if (VBOX_SUCCESS(DISPtrReg8(pCtx, pParam->base.reg_gen, &pu8Reg))) 701 702 { 702 703 *pcbSize = sizeof(uint8_t); … … 709 710 { 710 711 uint16_t *pu16Reg; 711 if (VBOX_SUCCESS(DISPtrReg16(pCtx, pParam->base.reg_gen 16, &pu16Reg)))712 if (VBOX_SUCCESS(DISPtrReg16(pCtx, pParam->base.reg_gen, &pu16Reg))) 712 713 { 713 714 *pcbSize = sizeof(uint16_t); … … 720 721 { 721 722 uint32_t *pu32Reg; 722 if (VBOX_SUCCESS(DISPtrReg32(pCtx, pParam->base.reg_gen 32, &pu32Reg)))723 if (VBOX_SUCCESS(DISPtrReg32(pCtx, pParam->base.reg_gen, &pu32Reg))) 723 724 { 724 725 *pcbSize = sizeof(uint32_t); … … 731 732 { 732 733 uint64_t *pu64Reg; 733 if (VBOX_SUCCESS(DISPtrReg64(pCtx, pParam->base.reg_gen 64, &pu64Reg)))734 if (VBOX_SUCCESS(DISPtrReg64(pCtx, pParam->base.reg_gen, &pu64Reg))) 734 735 { 735 736 *pcbSize = sizeof(uint64_t); -
trunk/src/VBox/VMM/IOMInternal.h
r8155 r8234 514 514 #endif 515 515 516 /* Disassembly helpers used in IOMAll.cpp & IOMAllMMIO.cpp */ 517 bool iomGetRegImmData(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, uint32_t *pu32Data, unsigned *pcbSize); 518 bool iomSaveDataToReg(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, unsigned u32Data); 519 516 520 __END_DECLS 517 521 522 518 523 #ifdef IN_RING3 519 524 -
trunk/src/VBox/VMM/PATM/PATMPatch.cpp
r8155 r8234 1166 1166 1167 1167 dbgreg = pCpu->param1.base.reg_dbg; 1168 reg = pCpu->param2.base.reg_gen 32;1168 reg = pCpu->param2.base.reg_gen; 1169 1169 } 1170 1170 else … … 1175 1175 1176 1176 pPB[0] = 0x8B; // mov GPR, disp32 1177 reg = pCpu->param1.base.reg_gen 32;1177 reg = pCpu->param1.base.reg_gen; 1178 1178 dbgreg = pCpu->param2.base.reg_dbg; 1179 1179 } … … 1242 1242 pPB[0] = 0x89; //mov disp32, GPR 1243 1243 ctrlreg = pCpu->param1.base.reg_ctrl; 1244 reg = pCpu->param2.base.reg_gen 32;1244 reg = pCpu->param2.base.reg_gen; 1245 1245 Assert(pCpu->param1.flags & USE_REG_CR); 1246 1246 Assert(pCpu->param2.flags & USE_REG_GEN32); … … 1253 1253 1254 1254 pPB[0] = 0x8B; // mov GPR, disp32 1255 reg = pCpu->param1.base.reg_gen 32;1255 reg = pCpu->param1.base.reg_gen; 1256 1256 ctrlreg = pCpu->param2.base.reg_ctrl; 1257 1257 } … … 1319 1319 if (pCpu->prefix & PREFIX_OPSIZE) 1320 1320 pPB[offset++] = 0x66; /* size override -> 16 bits pop */ 1321 pPB[offset++] = 0x58 + pCpu->param1.base.reg_gen 32;1321 pPB[offset++] = 0x58 + pCpu->param1.base.reg_gen; 1322 1322 PATCHGEN_EPILOG(pPatch, offset); 1323 1323 … … 1362 1362 pPB[offset++] = 0x8B; // mov destreg, CPUMCTX.tr/ldtr 1363 1363 /* Modify REG part according to destination of original instruction */ 1364 pPB[offset++] = MAKE_MODRM(0, pCpu->param1.base.reg_gen 32, 5);1364 pPB[offset++] = MAKE_MODRM(0, pCpu->param1.base.reg_gen, 5); 1365 1365 if (pCpu->pCurInstr->opcode == OP_STR) 1366 1366 { -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r8191 r8234 354 354 355 355 #if defined(VBOX_STRICT) || defined(LOG_ENABLED) 356 # ifdef IN_GC357 356 /** 358 357 * Get the mnemonic for the disassembled instruction. … … 375 374 } 376 375 } 377 # endif378 376 #endif 379 377 … … 462 460 { 463 461 case 1: //special case for AH etc 464 rc = DISWriteReg8(pRegFrame, pCpu->param1.base.reg_gen 8, (uint8_t)valpar2); break;465 case 2: rc = DISWriteReg16(pRegFrame, pCpu->param1.base.reg_gen 32, (uint16_t)valpar2); break;466 case 4: rc = DISWriteReg32(pRegFrame, pCpu->param1.base.reg_gen 32, valpar2); break;462 rc = DISWriteReg8(pRegFrame, pCpu->param1.base.reg_gen, (uint8_t)valpar2); break; 463 case 2: rc = DISWriteReg16(pRegFrame, pCpu->param1.base.reg_gen, (uint16_t)valpar2); break; 464 case 4: rc = DISWriteReg32(pRegFrame, pCpu->param1.base.reg_gen, valpar2); break; 467 465 default: AssertFailedReturn(VERR_EM_INTERPRETER); 468 466 } … … 487 485 { 488 486 case 1: //special case for AH etc 489 rc = DISWriteReg8(pRegFrame, pCpu->param2.base.reg_gen 8, (uint8_t)valpar1); break;490 case 2: rc = DISWriteReg16(pRegFrame, pCpu->param2.base.reg_gen 32, (uint16_t)valpar1); break;491 case 4: rc = DISWriteReg32(pRegFrame, pCpu->param2.base.reg_gen 32, valpar1); break;487 rc = DISWriteReg8(pRegFrame, pCpu->param2.base.reg_gen, (uint8_t)valpar1); break; 488 case 2: rc = DISWriteReg16(pRegFrame, pCpu->param2.base.reg_gen, (uint16_t)valpar1); break; 489 case 4: rc = DISWriteReg32(pRegFrame, pCpu->param2.base.reg_gen, valpar1); break; 492 490 default: AssertFailedReturn(VERR_EM_INTERPRETER); 493 491 } … … 626 624 if ( (pCpu->param1.flags & USE_BASE) 627 625 && (pCpu->param1.flags & (USE_REG_GEN16|USE_REG_GEN32)) 628 && pCpu->param1.base.reg_gen 32== USE_REG_ESP626 && pCpu->param1.base.reg_gen == USE_REG_ESP 629 627 ) 630 628 pParam1 = (RTGCPTR)((RTGCUINTPTR)pParam1 + param1.size); … … 1221 1219 switch(param1.size) 1222 1220 { 1223 case 1: rc = DISWriteReg8(pRegFrame, pCpu->param1.base.reg_gen 8, (uint8_t)val32); break;1224 case 2: rc = DISWriteReg16(pRegFrame, pCpu->param1.base.reg_gen 16, (uint16_t)val32); break;1225 case 4: rc = DISWriteReg32(pRegFrame, pCpu->param1.base.reg_gen 32, val32); break;1221 case 1: rc = DISWriteReg8(pRegFrame, pCpu->param1.base.reg_gen, (uint8_t)val32); break; 1222 case 2: rc = DISWriteReg16(pRegFrame, pCpu->param1.base.reg_gen, (uint16_t)val32); break; 1223 case 4: rc = DISWriteReg32(pRegFrame, pCpu->param1.base.reg_gen, val32); break; 1226 1224 default: 1227 1225 return VERR_EM_INTERPRETER; … … 1252 1250 1253 1251 #ifdef LOG_ENABLED 1254 c onst char *pszInstr;1252 char *pszInstr; 1255 1253 1256 1254 if (pCpu->prefix & PREFIX_LOCK) … … 1340 1338 1341 1339 #ifdef LOG_ENABLED 1342 c onst char *pszInstr;1340 char *pszInstr; 1343 1341 1344 1342 if (pCpu->prefix & PREFIX_LOCK) … … 1814 1812 { 1815 1813 if (pCpu->param1.flags == USE_REG_GEN32 && pCpu->param2.flags == USE_REG_CR) 1816 return EMInterpretCRxRead(pVM, pRegFrame, pCpu->param1.base.reg_gen 32, pCpu->param2.base.reg_ctrl);1814 return EMInterpretCRxRead(pVM, pRegFrame, pCpu->param1.base.reg_gen, pCpu->param2.base.reg_ctrl); 1817 1815 if (pCpu->param1.flags == USE_REG_CR && pCpu->param2.flags == USE_REG_GEN32) 1818 return EMInterpretCRxWrite(pVM, pRegFrame, pCpu->param1.base.reg_ctrl, pCpu->param2.base.reg_gen 32);1816 return EMInterpretCRxWrite(pVM, pRegFrame, pCpu->param1.base.reg_ctrl, pCpu->param2.base.reg_gen); 1819 1817 AssertMsgFailedReturn(("Unexpected control register move\n"), VERR_EM_INTERPRETER); 1820 1818 return VERR_EM_INTERPRETER; … … 1878 1876 if(pCpu->param1.flags == USE_REG_GEN32 && pCpu->param2.flags == USE_REG_DBG) 1879 1877 { 1880 rc = EMInterpretDRxRead(pVM, pRegFrame, pCpu->param1.base.reg_gen 32, pCpu->param2.base.reg_dbg);1878 rc = EMInterpretDRxRead(pVM, pRegFrame, pCpu->param1.base.reg_gen, pCpu->param2.base.reg_dbg); 1881 1879 } 1882 1880 else 1883 1881 if(pCpu->param1.flags == USE_REG_DBG && pCpu->param2.flags == USE_REG_GEN32) 1884 1882 { 1885 rc = EMInterpretDRxWrite(pVM, pRegFrame, pCpu->param1.base.reg_dbg, pCpu->param2.base.reg_gen 32);1883 rc = EMInterpretDRxWrite(pVM, pRegFrame, pCpu->param1.base.reg_dbg, pCpu->param2.base.reg_gen); 1886 1884 } 1887 1885 else -
trunk/src/VBox/VMM/VMMAll/IOMAll.cpp
r8155 r8234 46 46 * @param pParam Pointer to parameter of instruction to proccess. 47 47 */ 48 static unsigned iomG CGetRegSize(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam)48 static unsigned iomGetRegSize(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam) 49 49 { 50 50 if (pParam->flags & (USE_BASE | USE_INDEX | USE_SCALE | USE_DISPLACEMENT8 | USE_DISPLACEMENT16 | USE_DISPLACEMENT32 | USE_IMMEDIATE8 | USE_IMMEDIATE16 | USE_IMMEDIATE32 | USE_IMMEDIATE16_SX8 | USE_IMMEDIATE32_SX8)) … … 59 59 if (pParam->flags & USE_REG_GEN8) 60 60 return 1; 61 62 if (pParam->flags & USE_REG_GEN64) 63 return 8; 61 64 62 65 if (pParam->flags & USE_REG_SEG) … … 77 80 * @param pcbSize Where to store the size of data (1, 2, 4). 78 81 */ 79 static bool iomGCGetRegImmData(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, uint32_t *pu32Data, unsigned *pcbSize)82 bool iomGetRegImmData(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, uint32_t *pu32Data, unsigned *pcbSize) 80 83 { 81 84 if (pParam->flags & (USE_BASE | USE_INDEX | USE_SCALE | USE_DISPLACEMENT8 | USE_DISPLACEMENT16 | USE_DISPLACEMENT32)) … … 89 92 { 90 93 *pcbSize = 4; 91 DISFetchReg32(pRegFrame, pParam->base.reg_gen 32, pu32Data);94 DISFetchReg32(pRegFrame, pParam->base.reg_gen, pu32Data); 92 95 return true; 93 96 } … … 96 99 { 97 100 *pcbSize = 2; 98 DISFetchReg16(pRegFrame, pParam->base.reg_gen 16, (uint16_t *)pu32Data);101 DISFetchReg16(pRegFrame, pParam->base.reg_gen, (uint16_t *)pu32Data); 99 102 return true; 100 103 } … … 103 106 { 104 107 *pcbSize = 1; 105 DISFetchReg8(pRegFrame, pParam->base.reg_gen8, (uint8_t *)pu32Data); 108 DISFetchReg8(pRegFrame, pParam->base.reg_gen, (uint8_t *)pu32Data); 109 return true; 110 } 111 112 if (pParam->flags & USE_REG_GEN64) 113 { 114 AssertFailed(); 115 *pcbSize = 8; 116 ///DISFetchReg64(pRegFrame, pParam->base.reg_gen, pu32Data); 117 return true; 118 } 119 120 if (pParam->flags & (USE_IMMEDIATE64)) 121 { 122 AssertFailed(); 123 *pcbSize = 8; 124 *pu32Data = (uint32_t)pParam->parval; 106 125 return true; 107 126 } … … 110 129 { 111 130 *pcbSize = 4; 112 *pu32Data = (uint32_t)pParam->parval;131 //*pu32Data = (uint32_t)pParam->parval; 113 132 return true; 114 133 } … … 135 154 } /* Else - error. */ 136 155 156 AssertFailed(); 137 157 *pcbSize = 0; 138 158 *pu32Data = 0; … … 151 171 * @param u32Data 8/16/32 bit data to store. 152 172 */ 153 static bool iomGCSaveDataToReg(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, unsigned u32Data)173 bool iomSaveDataToReg(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, unsigned u32Data) 154 174 { 155 175 if (pParam->flags & (USE_BASE | USE_INDEX | USE_SCALE | USE_DISPLACEMENT8 | USE_DISPLACEMENT16 | USE_DISPLACEMENT32 | USE_IMMEDIATE8 | USE_IMMEDIATE16 | USE_IMMEDIATE32 | USE_IMMEDIATE32_SX8 | USE_IMMEDIATE16_SX8)) … … 160 180 if (pParam->flags & USE_REG_GEN32) 161 181 { 162 DISWriteReg32(pRegFrame, pParam->base.reg_gen 32, u32Data);182 DISWriteReg32(pRegFrame, pParam->base.reg_gen, u32Data); 163 183 return true; 164 184 } … … 166 186 if (pParam->flags & USE_REG_GEN16) 167 187 { 168 DISWriteReg16(pRegFrame, pParam->base.reg_gen 16, (uint16_t)u32Data);188 DISWriteReg16(pRegFrame, pParam->base.reg_gen, (uint16_t)u32Data); 169 189 return true; 170 190 } … … 172 192 if (pParam->flags & USE_REG_GEN8) 173 193 { 174 DISWriteReg8(pRegFrame, pParam->base.reg_gen 8, (uint8_t)u32Data);194 DISWriteReg8(pRegFrame, pParam->base.reg_gen, (uint8_t)u32Data); 175 195 return true; 176 196 } … … 189 209 * Internal - statistics only. 190 210 */ 191 DECLINLINE(void) iom GCMMIOStatLength(PVM pVM, unsigned cb)211 DECLINLINE(void) iomMMIOStatLength(PVM pVM, unsigned cb) 192 212 { 193 213 #ifdef VBOX_WITH_STATISTICS … … 857 877 uint32_t uPort = 0; 858 878 unsigned cbSize = 0; 859 bool fRc = iomG CGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uPort, &cbSize);879 bool fRc = iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &uPort, &cbSize); 860 880 AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc); 861 881 862 cbSize = iomG CGetRegSize(pCpu, &pCpu->param1);882 cbSize = iomGetRegSize(pCpu, &pCpu->param1); 863 883 Assert(cbSize > 0); 864 884 int rc = IOMInterpretCheckPortIOAccess(pVM, pRegFrame, uPort, cbSize); … … 875 895 * Store the result in the AL|AX|EAX register. 876 896 */ 877 fRc = iom GCSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, u32Data);897 fRc = iomSaveDataToReg(pCpu, &pCpu->param1, pRegFrame, u32Data); 878 898 AssertMsg(fRc, ("Failed to store register value!\n")); NOREF(fRc); 879 899 } … … 916 936 uint32_t uPort = 0; 917 937 unsigned cbSize = 0; 918 bool fRc = iomG CGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uPort, &cbSize);938 bool fRc = iomGetRegImmData(pCpu, &pCpu->param1, pRegFrame, &uPort, &cbSize); 919 939 AssertMsg(fRc, ("Failed to get reg/imm port number!\n")); NOREF(fRc); 920 940 … … 923 943 { 924 944 uint32_t u32Data = 0; 925 fRc = iomG CGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &u32Data, &cbSize);945 fRc = iomGetRegImmData(pCpu, &pCpu->param2, pRegFrame, &u32Data, &cbSize); 926 946 AssertMsg(fRc, ("Failed to get reg value!\n")); NOREF(fRc); 927 947 -
trunk/src/VBox/VMM/VMMAll/IOMAllMMIO.cpp
r8155 r8234 45 45 #include <iprt/string.h> 46 46 47 /*******************************************************************************48 * Internal Functions *49 *******************************************************************************/50 static bool iomGetRegImmData(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, uint32_t *pu32Data, unsigned *pcbSize);51 static bool iomSaveDataToReg(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, uint32_t u32Data);52 47 53 48 … … 55 50 * Global Variables * 56 51 *******************************************************************************/ 57 /**58 * Array for accessing 32-bit general registers in VMMREGFRAME structure59 * by register's index from disasm.60 */61 static unsigned g_aReg32Index[] =62 {63 RT_OFFSETOF(CPUMCTXCORE, eax), /* USE_REG_EAX */64 RT_OFFSETOF(CPUMCTXCORE, ecx), /* USE_REG_ECX */65 RT_OFFSETOF(CPUMCTXCORE, edx), /* USE_REG_EDX */66 RT_OFFSETOF(CPUMCTXCORE, ebx), /* USE_REG_EBX */67 RT_OFFSETOF(CPUMCTXCORE, esp), /* USE_REG_ESP */68 RT_OFFSETOF(CPUMCTXCORE, ebp), /* USE_REG_EBP */69 RT_OFFSETOF(CPUMCTXCORE, esi), /* USE_REG_ESI */70 RT_OFFSETOF(CPUMCTXCORE, edi) /* USE_REG_EDI */71 };72 73 /**74 * Macro for accessing 32-bit general purpose registers in CPUMCTXCORE structure.75 */76 #define ACCESS_REG32(p, idx) (*((uint32_t *)((char *)(p) + g_aReg32Index[idx])))77 78 /**79 * Array for accessing 16-bit general registers in CPUMCTXCORE structure80 * by register's index from disasm.81 */82 static unsigned g_aReg16Index[] =83 {84 RT_OFFSETOF(CPUMCTXCORE, eax), /* USE_REG_AX */85 RT_OFFSETOF(CPUMCTXCORE, ecx), /* USE_REG_CX */86 RT_OFFSETOF(CPUMCTXCORE, edx), /* USE_REG_DX */87 RT_OFFSETOF(CPUMCTXCORE, ebx), /* USE_REG_BX */88 RT_OFFSETOF(CPUMCTXCORE, esp), /* USE_REG_SP */89 RT_OFFSETOF(CPUMCTXCORE, ebp), /* USE_REG_BP */90 RT_OFFSETOF(CPUMCTXCORE, esi), /* USE_REG_SI */91 RT_OFFSETOF(CPUMCTXCORE, edi) /* USE_REG_DI */92 };93 94 /**95 * Macro for accessing 16-bit general purpose registers in CPUMCTXCORE structure.96 */97 #define ACCESS_REG16(p, idx) (*((uint16_t *)((char *)(p) + g_aReg16Index[idx])))98 99 /**100 * Array for accessing 8-bit general registers in CPUMCTXCORE structure101 * by register's index from disasm.102 */103 static unsigned g_aReg8Index[] =104 {105 RT_OFFSETOF(CPUMCTXCORE, eax), /* USE_REG_AL */106 RT_OFFSETOF(CPUMCTXCORE, ecx), /* USE_REG_CL */107 RT_OFFSETOF(CPUMCTXCORE, edx), /* USE_REG_DL */108 RT_OFFSETOF(CPUMCTXCORE, ebx), /* USE_REG_BL */109 RT_OFFSETOF(CPUMCTXCORE, eax) + 1, /* USE_REG_AH */110 RT_OFFSETOF(CPUMCTXCORE, ecx) + 1, /* USE_REG_CH */111 RT_OFFSETOF(CPUMCTXCORE, edx) + 1, /* USE_REG_DH */112 RT_OFFSETOF(CPUMCTXCORE, ebx) + 1 /* USE_REG_BH */113 };114 115 /**116 * Macro for accessing 8-bit general purpose registers in CPUMCTXCORE structure.117 */118 #define ACCESS_REG8(p, idx) (*((uint8_t *)((char *)(p) + g_aReg8Index[idx])))119 120 /**121 * Array for accessing segment registers in CPUMCTXCORE structure122 * by register's index from disasm.123 */124 static unsigned g_aRegSegIndex[] =125 {126 RT_OFFSETOF(CPUMCTXCORE, es), /* USE_REG_ES */127 RT_OFFSETOF(CPUMCTXCORE, cs), /* USE_REG_CS */128 RT_OFFSETOF(CPUMCTXCORE, ss), /* USE_REG_SS */129 RT_OFFSETOF(CPUMCTXCORE, ds), /* USE_REG_DS */130 RT_OFFSETOF(CPUMCTXCORE, fs), /* USE_REG_FS */131 RT_OFFSETOF(CPUMCTXCORE, gs) /* USE_REG_GS */132 };133 134 /**135 * Macro for accessing segment registers in CPUMCTXCORE structure.136 */137 #define ACCESS_REGSEG(p, idx) (*((uint16_t *)((char *)(p) + g_aRegSegIndex[idx])))138 52 139 53 /** … … 211 125 return rc; 212 126 } 213 214 215 /**216 * Returns the contents of register or immediate data of instruction's parameter.217 *218 * @returns true on success.219 *220 * @param pCpu Pointer to current disassembler context.221 * @param pParam Pointer to parameter of instruction to proccess.222 * @param pRegFrame Pointer to CPUMCTXCORE guest structure.223 * @param pu32Data Where to store retrieved data.224 * @param pcbSize Where to store the size of data (1, 2, 4).225 */226 static bool iomGetRegImmData(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, uint32_t *pu32Data, unsigned *pcbSize)227 {228 if (pParam->flags & (USE_BASE | USE_INDEX | USE_SCALE | USE_DISPLACEMENT8 | USE_DISPLACEMENT16 | USE_DISPLACEMENT32))229 {230 *pcbSize = 0;231 *pu32Data = 0;232 return false;233 }234 235 if (pParam->flags & USE_REG_GEN32)236 {237 *pcbSize = 4;238 *pu32Data = ACCESS_REG32(pRegFrame, pParam->base.reg_gen32);239 return true;240 }241 242 if (pParam->flags & USE_REG_GEN16)243 {244 *pcbSize = 2;245 *pu32Data = ACCESS_REG16(pRegFrame, pParam->base.reg_gen16);246 return true;247 }248 249 if (pParam->flags & USE_REG_GEN8)250 {251 *pcbSize = 1;252 *pu32Data = ACCESS_REG8(pRegFrame, pParam->base.reg_gen8);253 return true;254 }255 256 if (pParam->flags & (USE_IMMEDIATE32|USE_IMMEDIATE32_SX8))257 {258 *pcbSize = 4;259 *pu32Data = (uint32_t)pParam->parval;260 return true;261 }262 263 if (pParam->flags & (USE_IMMEDIATE16|USE_IMMEDIATE16_SX8))264 {265 *pcbSize = 2;266 *pu32Data = (uint16_t)pParam->parval;267 return true;268 }269 270 if (pParam->flags & USE_IMMEDIATE8)271 {272 *pcbSize = 1;273 *pu32Data = (uint8_t)pParam->parval;274 return true;275 }276 277 if (pParam->flags & USE_REG_SEG)278 {279 *pcbSize = 2;280 *pu32Data = ACCESS_REGSEG(pRegFrame, pParam->base.reg_seg);281 return true;282 } /* Else - error. */283 284 *pcbSize = 0;285 *pu32Data = 0;286 return false;287 }288 289 290 /**291 * Saves data to 8/16/32 general purpose or segment register defined by292 * instruction's parameter.293 *294 * @returns true on success.295 * @param pCpu Pointer to current disassembler context.296 * @param pParam Pointer to parameter of instruction to proccess.297 * @param pRegFrame Pointer to CPUMCTXCORE guest structure.298 * @param u32Data 8/16/32 bit data to store.299 */300 static bool iomSaveDataToReg(PDISCPUSTATE pCpu, PCOP_PARAMETER pParam, PCPUMCTXCORE pRegFrame, unsigned u32Data)301 {302 if (pParam->flags & (USE_BASE | USE_INDEX | USE_SCALE | USE_DISPLACEMENT8 | USE_DISPLACEMENT16 | USE_DISPLACEMENT32 | USE_IMMEDIATE8 | USE_IMMEDIATE16 | USE_IMMEDIATE32 | USE_IMMEDIATE32_SX8 | USE_IMMEDIATE16_SX8))303 {304 return false;305 }306 307 if (pParam->flags & USE_REG_GEN32)308 {309 ACCESS_REG32(pRegFrame, pParam->base.reg_gen32) = u32Data;310 return true;311 }312 313 if (pParam->flags & USE_REG_GEN16)314 {315 ACCESS_REG16(pRegFrame, pParam->base.reg_gen16) = (uint16_t)u32Data;316 return true;317 }318 319 if (pParam->flags & USE_REG_GEN8)320 {321 ACCESS_REG8(pRegFrame, pParam->base.reg_gen8) = (uint8_t)u32Data;322 return true;323 }324 325 if (pParam->flags & USE_REG_SEG)326 {327 ACCESS_REGSEG(pRegFrame, pParam->base.reg_seg) = (uint16_t)u32Data;328 return true;329 }330 331 /* Else - error. */332 return false;333 }334 335 127 336 128 /* -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r8155 r8234 563 563 } 564 564 if ( (pCpu->param1.flags & USE_REG_GEN32) 565 && (pCpu->param1.base.reg_gen 32== USE_REG_ESP))565 && (pCpu->param1.base.reg_gen == USE_REG_ESP)) 566 566 { 567 567 Log4(("pgmPoolMonitorIsReused: ESP\n"));
Note:
See TracChangeset
for help on using the changeset viewer.