Changeset 82344 in vbox for trunk/src/VBox/Devices/Audio
- Timestamp:
- Dec 3, 2019 12:55:43 PM (5 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Audio/DevIchAc97.cpp
r82343 r82344 501 501 /** R3 pointer to the device instance. */ 502 502 PPDMDEVINSR3 pDevInsR3; 503 /** R0 pointer to the device instance. */504 PPDMDEVINSR0 pDevInsR0;505 /** RC pointer to the device instance. */506 PPDMDEVINSRC pDevInsRC;507 bool afPadding0[4];503 // /** R0 pointer to the device instance. */ 504 // PPDMDEVINSR0 pDevInsR0; 505 // /** RC pointer to the device instance. */ 506 // PPDMDEVINSRC pDevInsRC; 507 // bool afPadding0[4]; 508 508 /** Global Control (Bus Master Control Register). */ 509 509 uint32_t glob_cnt; … … 631 631 static uint32_t ichac97R3StreamGetUsed(PAC97STREAM pStream); 632 632 static uint32_t ichac97R3StreamGetFree(PAC97STREAM pStream); 633 static int ichac97R3StreamTransfer(P AC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax);634 static void ichac97R3StreamUpdate(P AC97STATE pThis, PAC97STREAM pStream, bool fInTimer);633 static int ichac97R3StreamTransfer(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax); 634 static void ichac97R3StreamUpdate(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer); 635 635 636 636 static DECLCALLBACK(void) ichac97R3Reset(PPDMDEVINS pDevIns); … … 734 734 * Updates the status register (SR) of an AC'97 audio stream. 735 735 * 736 * @param pDevIns The device instance. 736 737 * @param pThis AC'97 state. 737 738 * @param pStream AC'97 stream to update SR for. 738 739 * @param new_sr New value for status register (SR). 739 740 */ 740 static void ichac97StreamUpdateSR(PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr) 741 { 742 PPDMDEVINS pDevIns = ICHAC97STATE_2_DEVINS(pThis); 741 static void ichac97StreamUpdateSR(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr) 742 { 743 743 PAC97BMREGS pRegs = &pStream->Regs; 744 744 … … 791 791 * Writes a new value to a stream's status register (SR). 792 792 * 793 * @param pDevIns The device instance. 793 794 * @param pThis AC'97 device state. 794 795 * @param pStream Stream to update SR for. 795 796 * @param u32Val New value to set the stream's SR to. 796 797 */ 797 static void ichac97StreamWriteSR(P AC97STATE pThis, PAC97STREAM pStream, uint32_t u32Val)798 static void ichac97StreamWriteSR(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, uint32_t u32Val) 798 799 { 799 800 PAC97BMREGS pRegs = &pStream->Regs; … … 802 803 803 804 pRegs->sr |= u32Val & ~(AC97_SR_RO_MASK | AC97_SR_WCLEAR_MASK); 804 ichac97StreamUpdateSR(p This, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));805 ichac97StreamUpdateSR(pDevIns, pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK)); 805 806 } 806 807 … … 1245 1246 } 1246 1247 1247 ichac97R3StreamUpdate(p This, pStream, false /* fInTimer */);1248 ichac97R3StreamUpdate(pDevIns, pThis, pStream, false /* fInTimer */); 1248 1249 1249 1250 int rc3 = RTCritSectLeave(&pAIO->CritSect); … … 1470 1471 * (with fInTimer set to @c false). 1471 1472 * 1473 * @param pDevIns The device instance. 1472 1474 * @param pThis AC'97 state. 1473 1475 * @param pStream AC'97 stream to update. … … 1475 1477 * context or an asynchronous I/O stream thread (if supported). 1476 1478 */ 1477 static void ichac97R3StreamUpdate(P AC97STATE pThis, PAC97STREAM pStream, bool fInTimer)1479 static void ichac97R3StreamUpdate(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer) 1478 1480 { 1479 1481 RT_NOREF(fInTimer); … … 1503 1505 1504 1506 /* Do the DMA transfer. */ 1505 rc2 = ichac97R3StreamTransfer(p This, pStream, RT_MIN(pStream->State.cbTransferChunk, cbStreamFree));1507 rc2 = ichac97R3StreamTransfer(pDevIns, pThis, pStream, RT_MIN(pStream->State.cbTransferChunk, cbStreamFree)); 1506 1508 AssertRC(rc2); 1507 1509 … … 1591 1593 /* When running synchronously, do the DMA data transfers here. 1592 1594 * Otherwise this will be done in the stream's async I/O thread. */ 1593 rc2 = ichac97R3StreamTransfer(p This, pStream, cbStreamUsed);1595 rc2 = ichac97R3StreamTransfer(pDevIns, pThis, pStream, cbStreamUsed); 1594 1596 AssertRC(rc2); 1595 1597 } … … 2626 2628 Assert(PDMDevHlpTimerIsLockOwner(pDevIns, RT_SAFE_SUBSCRIPT8(pThis->ahTimers, pStream->u8SD))); 2627 2629 2628 ichac97R3StreamUpdate(p This, pStream, true /* fInTimer */);2630 ichac97R3StreamUpdate(pDevIns, pThis, pStream, true /* fInTimer */); 2629 2631 2630 2632 PAUDMIXSINK pSink = ichac97R3IndexToSink(pThis, pStream->u8SD); … … 2667 2669 * 2668 2670 * @returns IPRT status code. 2671 * @param pDevIns The device instance. 2669 2672 * @param pThis AC'97 state. 2670 2673 * @param pStream AC'97 stream to update. 2671 2674 * @param cbToProcessMax Maximum of data (in bytes) to process. 2672 2675 */ 2673 static int ichac97R3StreamTransfer(P AC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax)2676 static int ichac97R3StreamTransfer(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax) 2674 2677 { 2675 2678 AssertPtrReturn(pThis, VERR_INVALID_POINTER); … … 2852 2855 } 2853 2856 2854 ichac97StreamUpdateSR(p This, pStream, new_sr);2857 ichac97StreamUpdateSR(pDevIns, pThis, pStream, new_sr); 2855 2858 } 2856 2859 … … 3109 3112 ichac97R3StreamReset(pThis, pStream); 3110 3113 3111 ichac97StreamUpdateSR(p This, pStream, AC97_SR_DCH); /** @todo Do we need to do that? */3114 ichac97StreamUpdateSR(pDevIns, pThis, pStream, AC97_SR_DCH); /** @todo Do we need to do that? */ 3112 3115 } 3113 3116 else … … 3157 3160 case MC_SR: 3158 3161 { 3159 ichac97StreamWriteSR(p This, pStream, u32);3162 ichac97StreamWriteSR(pDevIns, pThis, pStream, u32); 3160 3163 break; 3161 3164 } … … 3175 3178 case PO_SR: 3176 3179 case MC_SR: 3177 ichac97StreamWriteSR(p This, pStream, u32);3180 ichac97StreamWriteSR(pDevIns, pThis, pStream, u32); 3178 3181 break; 3179 3182 default: … … 3933 3936 3934 3937 /** 3935 * @interface_method_impl{PDMDEVREG,pfnRelocate}3936 */3937 static DECLCALLBACK(void) ichac97R3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)3938 {3939 NOREF(offDelta);3940 PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);3941 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);3942 }3943 3944 /**3945 3938 * @interface_method_impl{PDMDEVREG,pfnDestruct} 3946 3939 */ … … 3980 3973 */ 3981 3974 pThis->pDevInsR3 = pDevIns; 3982 pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);3983 pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);3984 3975 pThis->IBase.pfnQueryInterface = ichac97R3QueryInterface; 3985 3976 RTListInit(&pThis->lstDrv); … … 4337 4328 /* .pfnConstruct = */ ichac97R3Construct, 4338 4329 /* .pfnDestruct = */ ichac97R3Destruct, 4339 /* .pfnRelocate = */ ichac97R3Relocate,4330 /* .pfnRelocate = */ NULL, 4340 4331 /* .pfnMemSetup = */ NULL, 4341 4332 /* .pfnPowerOn = */ NULL,
Note:
See TracChangeset
for help on using the changeset viewer.