Changeset 82657 in vbox for trunk/src/VBox
- Timestamp:
- Jan 3, 2020 8:57:28 AM (5 years ago)
- File:
-
- 1 edited
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- Unmodified
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trunk/src/VBox/Devices/PC/DevDMA.cpp
r81990 r82657 922 922 } 923 923 924 /** @callback_method_impl{FNDBGFHANDLERDEV} */ 925 static DECLCALLBACK(void) dmaR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs) 926 { 927 PDMASTATE pThis = PDMDEVINS_2_DATA(pDevIns, PDMASTATE); 928 NOREF(pszArgs); 929 930 /* 931 * Show info. 932 */ 933 for (unsigned i = 0; i < RT_ELEMENTS(pThis->DMAC); i++) 934 { 935 PDMACONTROLLER pDmac = &pThis->DMAC[i]; 936 937 pHlp->pfnPrintf(pHlp, "\nDMAC%d:\n", i); 938 pHlp->pfnPrintf(pHlp, " Status : %02X - DRQ 3210 TC 3210\n", pDmac->u8Status); 939 pHlp->pfnPrintf(pHlp, " %u%u%u%u %u%u%u%u\n", 940 !!(pDmac->u8Status & RT_BIT(7)), !!(pDmac->u8Status & RT_BIT(6)), 941 !!(pDmac->u8Status & RT_BIT(5)), !!(pDmac->u8Status & RT_BIT(4)), 942 !!(pDmac->u8Status & RT_BIT(3)), !!(pDmac->u8Status & RT_BIT(2)), 943 !!(pDmac->u8Status & RT_BIT(1)), !!(pDmac->u8Status & RT_BIT(0))); 944 pHlp->pfnPrintf(pHlp, " Mask : %02X - Chn 3210\n", pDmac->u8Mask); 945 pHlp->pfnPrintf(pHlp, " %u%u%u%u\n", 946 !!(pDmac->u8Mask & RT_BIT(3)), !!(pDmac->u8Mask & RT_BIT(2)), 947 !!(pDmac->u8Mask & RT_BIT(1)), !!(pDmac->u8Mask & RT_BIT(0))); 948 pHlp->pfnPrintf(pHlp, " Temp : %02x\n", pDmac->u8Temp); 949 pHlp->pfnPrintf(pHlp, " Command: %02X\n", pDmac->u8Command); 950 pHlp->pfnPrintf(pHlp, " DACK: active %s DREQ: active %s\n", 951 pDmac->u8Command & RT_BIT(7) ? "high" : "low ", 952 pDmac->u8Command & RT_BIT(6) ? "high" : "low "); 953 pHlp->pfnPrintf(pHlp, " Extended write: %s Priority: %s\n", 954 pDmac->u8Command & RT_BIT(5) ? "enabled " : "disabled", 955 pDmac->u8Command & RT_BIT(4) ? "rotating" : "fixed "); 956 pHlp->pfnPrintf(pHlp, " Timing: %s Controller: %s\n", 957 pDmac->u8Command & RT_BIT(3) ? "normal " : "compressed", 958 pDmac->u8Command & RT_BIT(2) ? "enabled " : "disabled"); 959 pHlp->pfnPrintf(pHlp, " Adress Hold: %s Mem-to-Mem Ch 0/1: %s\n", 960 pDmac->u8Command & RT_BIT(1) ? "enabled " : "disabled", 961 pDmac->u8Command & RT_BIT(0) ? "enabled " : "disabled"); 962 963 for (unsigned ch = 0; ch < RT_ELEMENTS(pDmac->ChState); ch++) 964 { 965 PDMACHANNEL pChan = &pDmac->ChState[ch]; 966 const char *apszChanMode[] = { "demand ", "single ", "block ", "cascade" }; 967 const char *apszChanType[] = { "verify ", "write ", "read ", "illegal" }; 968 969 pHlp->pfnPrintf(pHlp, "\n DMA Channel %d: Page:%02X\n", 970 ch, pDmac->au8Page[DMACX2PG(ch)]); 971 pHlp->pfnPrintf(pHlp, " Mode : %02X Auto-init: %s %screment\n", 972 pChan->u8Mode, pChan->u8Mode & RT_BIT(4) ? "yes" : "no", 973 pChan->u8Mode & RT_BIT(5) ? "De" : "In" ); 974 pHlp->pfnPrintf(pHlp, " Xfer Type: %s Mode: %s\n", 975 apszChanType[((pChan->u8Mode >> 2) & 3)], 976 apszChanMode[((pChan->u8Mode >> 6) & 3)]); 977 pHlp->pfnPrintf(pHlp, " Base address:%04X count:%04X\n", 978 pChan->u16BaseAddr, pChan->u16BaseCount); 979 pHlp->pfnPrintf(pHlp, " Current address:%04X count:%04X\n", 980 pChan->u16CurAddr, pChan->u16CurCount); 981 } 982 } 983 } 984 924 985 /** 925 986 * @interface_method_impl{PDMDEVREG,pfnReset} … … 1032 1093 */ 1033 1094 PDMDevHlpSTAMRegister(pDevIns, &pThis->StatRun, STAMTYPE_PROFILE, "DmaRun", STAMUNIT_TICKS_PER_CALL, "Profiling dmaR3Run()."); 1095 1096 /* 1097 * Register the info item. 1098 */ 1099 PDMDevHlpDBGFInfoRegister(pDevIns, "dmac", "DMA controller info.", dmaR3Info); 1034 1100 1035 1101 return VINF_SUCCESS;
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