Changeset 83462 in vbox

Timestamp:

Mar 27, 2020 6:35:56 AM (5 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

136696

Message:

AMD IOMMU: bugref:9654 Bits.

File:

• trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp (modified) (10 diffs)

trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

@@ -1549 +1549 @@
 typedef CMD_BUF_HEAD_PTR_T      EVT_LOG_B_TAIL_PTR_T;
 
+/**
+ * PPR Log Auto Response Register (MMIO).
+ * In accordance with the AMD spec.
+ */
+typedef union
+{
+    struct
+    {
+        uint32_t    u3AutoRespCode : 4;     /**< Bits 3:0   - PprAutoRespCode: PPR log Auto Response Code. */
+        uint32_t    u1AutoRespMaskGen : 1;  /**< Bit  4     - PprAutoRespMaskGn: PPR log Auto Response Mask Gen. */
+        uint32_t    u27Rsvd0 : 27;          /**< Bits 31:5  - Reserved. */
+        uint32_t    u32Rsvd0;               /**< Bits 63:32 - Reserved.*/
+    } n;
+    /** The 32-bit unsigned integer view. */
+    uint32_t    au32[2];
+    /** The 64-bit unsigned integer view. */
+    uint64_t    u64;
+} PPR_LOG_AUTO_RESP_T;
+AssertCompileSize(PPR_LOG_AUTO_RESP_T, 8);
+
+/**
+ * PPR Log Overflow Early Indicator Register (MMIO).
+ * In accordance with the AMD spec.
+ */
+typedef union
+{
+    struct
+    {
+        uint32_t    u15Threshold : 15;  /**< Bits 14:0  - PprOvrflwEarlyThreshold: Overflow early indicator threshold. */
+        uint32_t    u15Rsvd0 : 15;      /**< Bits 29:15 - Reserved. */
+        uint32_t    u1IntrEn : 1;       /**< Bit  30    - PprOvrflwEarlyIntEn: Overflow early indicator interrupt enable. */
+        uint32_t    u1Enable : 1;       /**< Bit  31    - PprOvrflwEarlyEn: Overflow early indicator enable. */
+        uint32_t    u32Rsvd0;           /**< Bits 63:32 - Reserved. */
+    } n;
+    /** The 32-bit unsigned integer view. */
+    uint32_t    au32[2];
+    /** The 64-bit unsigned integer view. */
+    uint64_t    u64;
+} PPR_LOG_OVERFLOW_EARLY_T;
+AssertCompileSize(PPR_LOG_OVERFLOW_EARLY_T, 8);
+
+/**
+ * PPR Log B Overflow Early Indicator Register (MMIO).
+ * In accordance with the AMD spec.
+ * Currently identical to PPR_LOG_OVERFLOW_EARLY_T.
+ */
+typedef PPR_LOG_OVERFLOW_EARLY_T        PPR_LOG_B_OVERFLOW_EARLY_T;
+
 
 /**
@@ -1579 +1627 @@
     /** @} */
 
+    /** @todo IOMMU: SMI filter. */
+
     /** @name MMIO: Guest Virtual-APIC Log registers.
      * @{ */
@@ -1605 +1655 @@
     /** @name MMIO: MSI Capability Block registers.
      * @{ */
-    MSI_MISC_INFO_T             MsiMiscInfo0;       /**< MSI Misc. info registers / MSI Vector registers. */
+    MSI_MISC_INFO_T             MsiMiscInfo;        /**< MSI Misc. info registers / MSI Vector registers. */
     MSI_CAP_HDR_T               MsiCapHdr;          /**< MSI Capability header register. */
     MSI_ADDR_T                  MsiAddr;            /**< MSI Address register.*/
@@ -1624 +1674 @@
     /** @} */
 
+    /** @todo MARC registers. */
+
     /** @name MMIO: Reserved register.
      *  @{ */
@@ -1629 +1681 @@
     /** @} */
 
-    /** @name MMIO: Command and Event Log registers.
+    /** @name MMIO: Command and Event Log pointer registers.
      * @{ */
     CMD_BUF_HEAD_PTR_T          CmdBufHeadPtr;      /**< Command buffer head pointer register. */
@@ -1637 +1689 @@
     /** @} */
 
-    /** @name MMIO: Command Event status register.
+    /** @name MMIO: Command and Event Status register.
      * @{ */
     IOMMU_STATUS_T              IommuStatus;        /**< IOMMU status register. */
     /** @} */
 
-    /** @name MMIO: PPR Log Head and Tail Pointer registers.
+    /** @name MMIO: PPR Log Head and Tail pointer registers.
      * @{ */
     PPR_LOG_HEAD_PTR_T          PprLogHeadPtr;      /**< IOMMU PPR log head pointer register. */
@@ -1648 +1700 @@
     /** @} */
 
-    /** @name MMIO: Guest Virtual-APIC Log Head and Tail Pointer registers.
+    /** @name MMIO: Guest Virtual-APIC Log Head and Tail pointer registers.
      * @{ */
     GALOG_HEAD_PTR_T            GALogHeadPtr;       /**< Guest Virtual-APIC log head pointer register. */
@@ -1654 +1706 @@
     /** @} */
 
-    /** @name MMIO: PPR Log B Head and Tail Pointer registers.
+    /** @name MMIO: PPR Log B Head and Tail pointer registers.
      *  @{ */
     PPR_LOG_B_HEAD_PTR_T        PprLogBHeadPtr;     /**< PPR log B head pointer register. */
@@ -1660 +1712 @@
     /** @} */
 
-    /** @name MMIO: Event Log B Head and Tail Pointer registers.
+    /** @name MMIO: Event Log B Head and Tail pointer registers.
      * @{ */
     EVT_LOG_B_HEAD_PTR_T        EvtLogBHeadPtr;     /**< Event log B head pointer register. */
@@ -1666 +1718 @@
     /** @} */
 
+    /** @name MMIO: PPR Log Overflow protection registers.
+     * @{ */
+    PPR_LOG_AUTO_RESP_T         PprLogAutoResp;         /**< PPR Log Auto Response register. */
+    PPR_LOG_OVERFLOW_EARLY_T    PprLogOverflowEarly;    /**< PPR Log Overflow Early Indicator register. */
+    PPR_LOG_B_OVERFLOW_EARLY_T  PprLogBOverflowEarly;   /**< PPR Log B Overflow Early Indicator register. */
+    /** @} */
+
+    /** @todo IOMMU: IOMMU Event counter registers. */
 } IOMMU;
 /** Pointer to the IOMMU device state. */