Index: trunk/src/VBox/Disassembler/Disasm.cpp
===================================================================
--- trunk/src/VBox/Disassembler/Disasm.cpp	(revision 8357)
+++ trunk/src/VBox/Disassembler/Disasm.cpp	(revision 8361)
@@ -92,5 +92,5 @@
  */
 DISDECL(int) DISInstr(PDISCPUSTATE pCpu, RTUINTPTR pu8Instruction, unsigned u32EipOffset, unsigned *pcbSize,
-                       char *pszOutput)
+                      char *pszOutput)
 {
     return DISInstrEx(pCpu, pu8Instruction, u32EipOffset, pcbSize, pszOutput, OPTYPE_ALL);
@@ -113,5 +113,5 @@
  */
 DISDECL(int) DISInstrEx(PDISCPUSTATE pCpu, RTUINTPTR pu8Instruction, unsigned u32EipOffset, unsigned *pcbSize,
-                         char *pszOutput, unsigned uFilter)
+                        char *pszOutput, unsigned uFilter)
 {
     unsigned i = 0, prefixbytes;
@@ -124,6 +124,4 @@
     pCpu->prefix      = PREFIX_NONE;
     pCpu->prefix_seg  = 0;
-    pCpu->addrmode    = pCpu->mode;
-    pCpu->opmode      = pCpu->mode;
     pCpu->ModRM.u     = 0;
     pCpu->SIB.u       = 0;
@@ -147,4 +145,15 @@
         *pszOutput = '\0';
 
+    if (pCpu->mode == CPUMODE_64BIT)
+    {
+        pCpu->addrmode   = CPUMODE_64BIT;
+        pCpu->opmode     = CPUMODE_32BIT;
+    }
+    else
+    {
+        pCpu->addrmode   = pCpu->mode;
+        pCpu->opmode     = pCpu->mode;
+    }
+
     prefixbytes = 0;
 #ifndef __L4ENV__  /* Unfortunately, we have no exception handling in l4env */
@@ -164,4 +173,9 @@
             {
                 pCpu->lastprefix = opcode;
+
+                /* The REX prefix must precede the opcode byte(s). Any other placement is ignored. */
+                if (opcode != OP_REX)
+                    pCpu->prefix &= ~PREFIX_REX;
+
                 switch(opcode)
                 {
@@ -175,5 +189,10 @@
                 case OP_SEG:
                     pCpu->prefix_seg = g_aOneByteMapX86[codebyte].param1 - OP_PARM_REG_SEG_START;
-                    pCpu->prefix |= PREFIX_SEG;
+                    /* Segment prefixes for CS, DS, ES and SS are ignored in long mode. */
+                    if (   pCpu->mode != CPUMODE_64BIT
+                        || pCpu->prefix_seg >= OP_PARM_REG_FS)
+                    {
+                        pCpu->prefix    |= PREFIX_SEG;
+                    }
                     i += sizeof(uint8_t);
                     prefixbytes++;
@@ -188,9 +207,14 @@
 
                 // address size override prefix byte
-                case OP_ADRSIZE:
+                case OP_ADDRSIZE:
                     pCpu->prefix |= PREFIX_ADDRSIZE;
-                    if(pCpu->mode == CPUMODE_16BIT)
-                         pCpu->addrmode = CPUMODE_32BIT;
-                    else pCpu->addrmode = CPUMODE_16BIT;
+                    if (pCpu->mode == CPUMODE_16BIT)
+                        pCpu->addrmode = CPUMODE_32BIT;
+                    else 
+                    if (pCpu->mode == CPUMODE_32BIT)
+                        pCpu->addrmode = CPUMODE_16BIT;
+                    else
+                        pCpu->addrmode = CPUMODE_32BIT;     /* 64 bits */
+
                     i += sizeof(uint8_t);
                     prefixbytes++;
@@ -200,7 +224,9 @@
                 case OP_OPSIZE:
                     pCpu->prefix |= PREFIX_OPSIZE;
-                    if(pCpu->mode == CPUMODE_16BIT)
-                         pCpu->opmode = CPUMODE_32BIT;
-                    else pCpu->opmode = CPUMODE_16BIT;
+                    if (pCpu->mode == CPUMODE_16BIT)
+                        pCpu->opmode = CPUMODE_32BIT;
+                    else 
+                        pCpu->opmode = CPUMODE_16BIT;  /* for 32 and 64 bits mode (there is no 32 bits operand size override prefix) */
+
                     i += sizeof(uint8_t);
                     prefixbytes++;
@@ -225,4 +251,7 @@
                     pCpu->prefix    |= PREFIX_REX;
                     pCpu->prefix_rex = PREFIX_REX_OP_2_FLAGS(opcode);
+
+                    if (pCpu->prefix_rex & PREFIX_REX_FLAGS_W)
+                        pCpu->opmode = CPUMODE_64BIT;  /* overrides size prefix byte */
                     break;
                 }
@@ -390,7 +419,8 @@
             case 'e': //register based on operand size (e.g. %eAX)
                 if(pCpu->opmode == CPUMODE_32BIT)
-                {
                     RTStrPrintf(&pszOutput[strlen(pszOutput)], 64, "E");
-                }
+                if(pCpu->opmode == CPUMODE_64BIT)
+                    RTStrPrintf(&pszOutput[strlen(pszOutput)], 64, "R");
+
                 RTStrPrintf(&pszOutput[strlen(pszOutput)], 64, "%c%c", lpszFormat[2], lpszFormat[3]);
                 break;
Index: trunk/src/VBox/Disassembler/DisasmCore.cpp
===================================================================
--- trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 8357)
+++ trunk/src/VBox/Disassembler/DisasmCore.cpp	(revision 8361)
@@ -174,6 +174,4 @@
     pCpu->prefix_seg = 0;
     pCpu->lastprefix = 0;
-    pCpu->addrmode   = pCpu->mode;
-    pCpu->opmode     = pCpu->mode;
     pCpu->ModRM.u    = 0;
     pCpu->SIB.u      = 0;
@@ -221,6 +219,4 @@
     pCpu->lastprefix = 0;
     pCpu->mode       = enmCpuMode;
-    pCpu->addrmode   = enmCpuMode;
-    pCpu->opmode     = enmCpuMode;
     pCpu->ModRM.u    = 0;
     pCpu->SIB.u      = 0;
@@ -261,4 +257,15 @@
     unsigned  cbInc;
 
+    if (pCpu->mode == CPUMODE_64BIT)
+    {
+        pCpu->addrmode   = CPUMODE_64BIT;
+        pCpu->opmode     = CPUMODE_32BIT;
+    }
+    else
+    {
+        pCpu->addrmode   = pCpu->mode;
+        pCpu->opmode     = pCpu->mode;
+    }
+
     while(1)
     {
@@ -284,6 +291,11 @@
             case OP_SEG:
                 pCpu->prefix_seg = g_aOneByteMapX86[codebyte].param1 - OP_PARM_REG_SEG_START;
-                pCpu->prefix    |= PREFIX_SEG;
-                iByte           += sizeof(uint8_t);
+                /* Segment prefixes for CS, DS, ES and SS are ignored in long mode. */
+                if (   pCpu->mode != CPUMODE_64BIT
+                    || pCpu->prefix_seg >= OP_PARM_REG_FS)
+                {
+                    pCpu->prefix    |= PREFIX_SEG;
+                }
+                iByte += sizeof(uint8_t);
                 continue;   //fetch the next byte
 
@@ -295,9 +307,14 @@
 
             // address size override prefix byte
-            case OP_ADRSIZE:
+            case OP_ADDRSIZE:
                 pCpu->prefix |= PREFIX_ADDRSIZE;
                 if (pCpu->mode == CPUMODE_16BIT)
-                     pCpu->addrmode = CPUMODE_32BIT;
-                else pCpu->addrmode = CPUMODE_16BIT;
+                    pCpu->addrmode = CPUMODE_32BIT;
+                else 
+                if (pCpu->mode == CPUMODE_32BIT)
+                    pCpu->addrmode = CPUMODE_16BIT;
+                else
+                    pCpu->addrmode = CPUMODE_32BIT;     /* 64 bits */
+
                 iByte        += sizeof(uint8_t);
                 continue;   //fetch the next byte
@@ -307,6 +324,7 @@
                 pCpu->prefix |= PREFIX_OPSIZE;
                 if (pCpu->mode == CPUMODE_16BIT)
-                     pCpu->opmode = CPUMODE_32BIT;
-                else pCpu->opmode = CPUMODE_16BIT;
+                    pCpu->opmode = CPUMODE_32BIT;
+                else 
+                    pCpu->opmode = CPUMODE_16BIT;  /* for 32 and 64 bits mode (there is no 32 bits operand size override prefix) */
 
                 iByte        += sizeof(uint8_t);
@@ -390,4 +408,15 @@
     pCpu->param3.param = pOp->param3;
 
+    /* Correct the operand size if the instruction is marked as forced or default 64 bits */
+    if (pCpu->mode == CPUMODE_64BIT)
+    {
+        if (pOp->optype & OPTYPE_FORCED_64_OP_SIZE)
+            pCpu->opsize = CPUMODE_64BIT;
+        else
+        if (    (pOp->optype & OPTYPE_DEFAULT_64_OP_SIZE)
+            &&  !(pCpu->prefix & PREFIX_OPSIZE))
+            pCpu->opsize = CPUMODE_64BIT;
+    }
+
     if (pOp->idxParse1 != IDX_ParseNop) 
     {
@@ -450,4 +479,16 @@
         /* Not filtered out -> full disassembly */
         pCpu->pfnDisasmFnTable = pfnFullDisasm;
+    }
+
+    /* Correct the operand size if the instruction is marked as forced or default 64 bits */
+    if (pCpu->mode == CPUMODE_64BIT)
+    {
+        /* Note: redundant, but just in case this ever changes */
+        if (fpop->optype & OPTYPE_FORCED_64_OP_SIZE)
+            pCpu->opsize = CPUMODE_64BIT;
+        else
+        if (    (fpop->optype & OPTYPE_DEFAULT_64_OP_SIZE)
+            &&  !(pCpu->prefix & PREFIX_OPSIZE))
+            pCpu->opsize = CPUMODE_64BIT;
     }
 
Index: trunk/src/VBox/Disassembler/DisasmTables.cpp
===================================================================
--- trunk/src/VBox/Disassembler/DisasmTables.cpp	(revision 8357)
+++ trunk/src/VBox/Disassembler/DisasmTables.cpp	(revision 8361)
@@ -199,5 +199,5 @@
     OP("SEG GS",             0,                  0,                 0,                  OP_SEG,     OP_PARM_REG_GS,     OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
     OP("OP SIZE",            0,                  0,                 0,                  OP_OPSIZE,  OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("ADR SIZE",           0,                  0,                 0,                  OP_ADRSIZE, OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("ADR SIZE",           0,                  0,                 0,                  OP_ADDRSIZE,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
     OP("push %Iv",           IDX_ParseImmV,      0,                 0,                  OP_PUSH,    OP_PARM_Iv,         OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS | OPTYPE_DEFAULT_64_OP_SIZE),
     OP("imul %Gv,%Ev,%Iv",   IDX_ParseModRM,     IDX_UseModRM,      IDX_ParseImmV,      OP_IMUL,    OP_PARM_Gv,         OP_PARM_Ev,     OP_PARM_Iv,     OPTYPE_HARMLESS),
@@ -517,20 +517,20 @@
 
     /* 7 */
-    OP("pshufw %Pq,%Qq,%Ib", IDX_ParseModRM,     IDX_UseModRM,   IDX_ParseImmByte,OP_PSHUFW, OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_Ib,     OPTYPE_HARMLESS),
-    OP("Grp12",              IDX_ParseGrp12,     0,          0,          OP_GRP12,   OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("Grp13",              IDX_ParseGrp13,     0,          0,          OP_GRP13,   OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("Grp14",              IDX_ParseGrp14,     0,          0,          OP_GRP14,   OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("pcmpeqb %Pq,%Qq",    IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PCMPEQB, OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("pcmpeqw %Pq,%Qq",    IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PCMPEQW, OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("pcmpeqd %Pq,%Qq",    IDX_ParseModRM,     IDX_UseModRM,   0,          OP_PCMPEQD, OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("emms",               0,              0,          0,          OP_EMMS,    OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("MMX UD 0x78",        0,              0,          0,          OP_MMX_UD78,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("MMX UD 0x79",        0,              0,          0,          OP_MMX_UD79,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("MMX UD 0x7A",        0,              0,          0,          OP_MMX_UD7A,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("MMX UD 0x7B",        0,              0,          0,          OP_MMX_UD7B,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("MMX UD 0x7C",        0,              0,          0,          OP_MMX_UD7C,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("MMX UD 0x7D",        0,              0,          0,          OP_MMX_UD7D,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("movd %Ed,%Pd",       IDX_ParseModRM,     IDX_UseModRM,   0,          OP_MOVD,    OP_PARM_Ed,         OP_PARM_Pd,     OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("movq %Qq,%Pq",       IDX_ParseModRM,     IDX_UseModRM,   0,          OP_MOVQ,    OP_PARM_Qq,         OP_PARM_Pq,     OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("pshufw %Pq,%Qq,%Ib", IDX_ParseModRM,     IDX_UseModRM,   IDX_ParseImmByte,  OP_PSHUFW,  OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_Ib,     OPTYPE_HARMLESS),
+    OP("Grp12",              IDX_ParseGrp12,     0,              0,                 OP_GRP12,   OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("Grp13",              IDX_ParseGrp13,     0,              0,                 OP_GRP13,   OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("Grp14",              IDX_ParseGrp14,     0,              0,                 OP_GRP14,   OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("pcmpeqb %Pq,%Qq",    IDX_ParseModRM,     IDX_UseModRM,   0,                 OP_PCMPEQB, OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("pcmpeqw %Pq,%Qq",    IDX_ParseModRM,     IDX_UseModRM,   0,                 OP_PCMPEQW, OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("pcmpeqd %Pq,%Qq",    IDX_ParseModRM,     IDX_UseModRM,   0,                 OP_PCMPEQD, OP_PARM_Pq,         OP_PARM_Qq,     OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("emms",               0,                  0,              0,                 OP_EMMS,    OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("MMX UD 0x78",        0,                  0,              0,                 OP_MMX_UD78,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("MMX UD 0x79",        0,                  0,              0,                 OP_MMX_UD79,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("MMX UD 0x7A",        0,                  0,              0,                 OP_MMX_UD7A,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("MMX UD 0x7B",        0,                  0,              0,                 OP_MMX_UD7B,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("MMX UD 0x7C",        0,                  0,              0,                 OP_MMX_UD7C,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("MMX UD 0x7D",        0,                  0,              0,                 OP_MMX_UD7D,OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("movd %Ed,%Pd",       IDX_ParseModRM,     IDX_UseModRM,   0,                 OP_MOVD,    OP_PARM_Ed,         OP_PARM_Pd,     OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("movq %Qq,%Pq",       IDX_ParseModRM,     IDX_UseModRM,   0,                 OP_MOVQ,    OP_PARM_Qq,         OP_PARM_Pq,     OP_PARM_NONE,   OPTYPE_HARMLESS),
 
     /* 8 */
Index: trunk/src/VBox/Disassembler/DisasmTablesX64.cpp
===================================================================
--- trunk/src/VBox/Disassembler/DisasmTablesX64.cpp	(revision 8357)
+++ trunk/src/VBox/Disassembler/DisasmTablesX64.cpp	(revision 8361)
@@ -199,5 +199,5 @@
     OP("SEG GS",             0,                  0,                 0,                  OP_SEG,         OP_PARM_REG_GS,     OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
     OP("OP SIZE",            0,                  0,                 0,                  OP_OPSIZE,      OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
-    OP("ADR SIZE",           0,                  0,                 0,                  OP_ADRSIZE,     OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
+    OP("ADDR SIZE",          0,                  0,                 0,                  OP_ADDRSIZE,    OP_PARM_NONE,       OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS),
     OP("push %Iv",           IDX_ParseImmV,      0,                 0,                  OP_PUSH,        OP_PARM_Iv,         OP_PARM_NONE,   OP_PARM_NONE,   OPTYPE_HARMLESS | OPTYPE_DEFAULT_64_OP_SIZE),
     OP("imul %Gv,%Ev,%Iv",   IDX_ParseModRM,     IDX_UseModRM,      IDX_ParseImmV,      OP_IMUL,        OP_PARM_Gv,         OP_PARM_Ev,     OP_PARM_Iv,     OPTYPE_HARMLESS),
