Changeset 84023 in vbox for trunk/src/VBox/Devices

Timestamp:

Apr 27, 2020 7:37:58 PM (5 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

137593

Message:

AMD IOMMU: bugref:9654 Bits.

File:

• trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp (modified) (14 diffs)

trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

@@ -21 +21 @@
 *********************************************************************************************************************************/
 #define LOG_GROUP LOG_GROUP_DEV_IOMMU
+#include <VBox/msi.h>
 #include <VBox/vmm/pdmdev.h>
 #include <VBox/AssertGuest.h>
@@ -375 +376 @@
 RT_BF_ASSERT_COMPILE_CHECKS(IOMMU_BF_MSI_MAP_CAPHDR_, UINT32_C(0), UINT32_MAX,
                             (CAP_ID, CAP_PTR, EN, FIXED, RSVD_18_28, CAP_TYPE));
+/** @} */
+
+/**
+ * @name IOMMU Status Register Bits.
+ * In accordance with the AMD spec.
+ * @{
+ */
+/** EventOverflow: Event log overflow. */
+#define IOMMU_STATUS_EVT_LOG_OVERFLOW               RT_BIT_64(0)
+/** EventLogInt: Event log interrupt. */
+#define IOMMU_STATUS_EVT_LOG_INTR                   RT_BIT_64(1)
+/** ComWaitInt: Completion wait interrupt. */
+#define IOMMU_STATUS_COMPLETION_WAIT_INTR           RT_BIT_64(2)
+/** EventLogRun: Event log is running. */
+#define IOMMU_STATUS_EVT_LOG_RUNNING                RT_BIT_64(3)
+/** CmdBufRun: Command buffer is running. */
+#define IOMMU_STATUS_CMD_BUF_RUNNING                RT_BIT_64(4)
+/** PprOverflow: Peripheral page request log overflow. */
+#define IOMMU_STATUS_PPR_LOG_OVERFLOW               RT_BIT_64(5)
+/** PprInt: Peripheral page request log interrupt. */
+#define IOMMU_STATUS_PPR_LOG_INTR                   RT_BIT_64(6)
+/** PprLogRun: Peripheral page request log is running. */
+#define IOMMU_STATUS_PPR_LOG_RUN                    RT_BIT_64(7)
+/** GALogRun: Guest virtual-APIC log is running. */
+#define IOMMU_STATUS_GA_LOG_RUN                     RT_BIT_64(8)
+/** GALOverflow: Guest virtual-APIC log overflow. */
+#define IOMMU_STATUS_GA_LOG_OVERFLOW                RT_BIT_64(9)
+/** GAInt: Guest virtual-APIC log interrupt. */
+#define IOMMU_STATUS_GA_LOG_INTR                    RT_BIT_64(10)
+/** PprOvrflwB: PPR Log B overflow. */
+#define IOMMU_STATUS_PPR_LOG_B_OVERFLOW             RT_BIT_64(11)
+/** PprLogActive: PPR Log B is active. */
+#define IOMMU_STATUS_PPR_LOG_B_ACTIVE               RT_BIT_64(12)
+/** EvtOvrflwB: Event log B overflow. */
+#define IOMMU_STATUS_EVT_LOG_B_OVERFLOW             RT_BIT_64(15)
+/** EventLogActive: Event log B active. */
+#define IOMMU_STATUS_EVT_LOG_B_ACTIVE               RT_BIT_64(16)
+/** PprOvrflwEarlyB: PPR log B overflow early warning. */
+#define IOMMU_STATUS_PPR_LOG_B_OVERFLOW_EARLY       RT_BIT_64(17)
+/** PprOverflowEarly: PPR log overflow early warning. */
+#define IOMMU_STATUS_PPR_LOG_OVERFLOW_EARLY         RT_BIT_64(18)
 /** @} */
 
@@ -767 +809 @@
 } EVT_GENERIC_T;
 AssertCompileSize(EVT_GENERIC_T, 16);
+/** Pointer to a generic event log entry. */
+typedef EVT_GENERIC_T *PEVT_GENERIC_T;
+/** Pointer to a const generic event log entry. */
+typedef const EVT_GENERIC_T *PCEVT_GENERIC_T;
 
 /**
@@ -2105 +2151 @@
 
 #ifndef VBOX_DEVICE_STRUCT_TESTCASE
-
-/**
- * Gets the buffer length length corresponding to a base address.
+/**
+ * Gets the number of buffer entries given a base register's encoded length.
  *
- * @param   uEncodedLen     The length to decode (power-of-2 encoded).
- * @param   pcEntries       Where to store the number of entries. Optional, can be
- *                          NULL.
- * @param   pcbBuffer       Where to store the size of the buffer. Optional, can be
- *                          NULL.
+ * @returns Number of buffer entries.
+ * @param   uEncodedLen     The length (power-of-2 encoded).
+ */
+DECLINLINE(uint32_t) iommuAmdGetBaseBufEntryCount(uint8_t uEncodedLen)
+{
+    Assert(uEncodedLen > 7);
+    return 2 << (uEncodedLen - 1);
+}
+
+
+/**
+ * Gets the length of the buffer given a base register's encoded length.
  *
- * @remarks Both @a pcEntries and @a pcbBuffer cannot both be NULL.
- */
-static void iommuAmdGetBaseBufferLength(uint8_t uEncodedLen, uint32_t *pcEntries, uint32_t *pcbBuffer)
-{
-    uint32_t cEntries;
-    uint32_t cbBuffer;
-    if (uEncodedLen > 7)
-    {
-        cEntries = 2 << (uEncodedLen - 1);
-        cbBuffer = *pcEntries << 4;
-    }
-    else
-        cEntries = cbBuffer = 0;
-
-    Assert(pcEntries || pcbBuffer);
-    if (pcEntries)
-        *pcEntries = cEntries;
-    if (pcbBuffer)
-        *pcbBuffer = cbBuffer;
+ * @returns The length of the buffer in bytes.
+ * @param   uEncodedLen     The length (power-of-2 encoded).
+ */
+DECLINLINE(uint32_t) iommuAmdGetBaseBufLength(uint8_t uEncodedLen)
+{
+    Assert(uEncodedLen > 7);
+    return (2 << (uEncodedLen - 1)) << 4;
 }
 
 
-DECL_FORCE_INLINE(IOMMU_STATUS_T) iommuAmdGetStatus(PCIOMMU pThis)
+DECLINLINE(IOMMU_STATUS_T) iommuAmdGetStatus(PCIOMMU pThis)
 {
     IOMMU_STATUS_T Status;
@@ -2145 +2185 @@
 
 
-DECL_FORCE_INLINE(IOMMU_CTRL_T) iommuAmdGetCtrl(PCIOMMU pThis)
+DECLINLINE(IOMMU_CTRL_T) iommuAmdGetCtrl(PCIOMMU pThis)
 {
     IOMMU_CTRL_T Ctrl;
     Ctrl.u64 = ASMAtomicReadU64((volatile uint64_t *)&pThis->Ctrl.u64);
     return Ctrl;
+}
+
+
+/**
+ * Determines whether MSI is enabled for the IOMMU. This influences interrupt
+ * handling in IOMMU.
+ *
+ * @note There should be a PCIDevXxx function for this.
+ */
+static bool iommuAmdIsMsiEnabled(PPDMPCIDEV pDevIns)
+{
+    uint16_t const uMsgCtl = PDMPciDevGetWord(pDevIns, IOMMU_PCI_OFF_MSI_CAP_HDR + VBOX_MSI_CAP_MESSAGE_CONTROL);
+    return RT_BOOL(uMsgCtl & VBOX_PCI_MSI_FLAGS_ENABLE);
 }
 
@@ -2507 +2560 @@
      * In our emulation, we ignore the write entirely.
      */
-    uint32_t const      offBuf     = u64Value & IOMMU_CMD_BUF_HEAD_PTR_VALID_MASK;
-    CMD_BUF_BAR_T const CmdBufBar  = pThis->CmdBufBaseAddr;
-    uint32_t            cbBuf;
-    iommuAmdGetBaseBufferLength(CmdBufBar.n.u4Len, NULL, &cbBuf);
+    uint32_t const      offBuf    = u64Value & IOMMU_CMD_BUF_HEAD_PTR_VALID_MASK;
+    CMD_BUF_BAR_T const CmdBufBar = pThis->CmdBufBaseAddr;
+    uint32_t const      cbBuf     = iommuAmdGetBaseBufLength(CmdBufBar.n.u4Len);
     if (offBuf >= cbBuf)
     {
@@ -2754 +2806 @@
  * This is because most registers are 64-bit and aligned on 8-byte boundaries but
  * some are really 32-bit registers aligned on an 8-byte boundary. We cannot assume
- * guests will only perform 32-bit reads on those 32-bit registers that are aligned
- * on 8-byte boundaries.
+ * software will only perform 32-bit reads on those 32-bit registers that are
+ * aligned on 8-byte boundaries.
  *
  * @returns Strict VBox status code.
@@ -2915 +2967 @@
     *puResult = uReg;
     return VINF_SUCCESS;
+}
+
+
+static int iommuAmdWriteEventLogEntry(PPDMDEVINS pDevIns, PCEVT_GENERIC_T pEvent)
+{
+    PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU);
+    IOMMU_STATUS_T const Status = iommuAmdGetStatus(pThis);
+
+    /* Check if event logging is active and the log has not overflowed. */
+    if (   Status.n.u1EvtLogRunning
+        && !Status.n.u1EvtOverflow)
+    {
+        /* Figure out the event log entry offset. */
+        EVT_LOG_TAIL_PTR_T const TailPtr = pThis->EvtLogTailPtr;
+        uint32_t const offEvtLogEntry = TailPtr.n.u15Ptr << 4;
+
+        /* Ensure the event log entry is within limits. */
+        uint32_t const uEvtLogLen = iommuAmdGetBaseBufLength(pThis->EvtLogBaseAddr.n.u4Len);
+        if (offEvtLogEntry < uEvtLogLen)
+        {
+            /* Write the event log entry to memory. */
+            RTGCPHYS const GCPhysEvtLog      = pThis->EvtLogBaseAddr.n.u40Base;
+            RTGCPHYS const GCPhysEvtLogEntry = GCPhysEvtLog + offEvtLogEntry;
+            int rc = PDMDevHlpPCIPhysWrite(pDevIns, GCPhysEvtLogEntry, pEvent, sizeof(*pEvent));
+            if (RT_FAILURE(rc))
+                Log((IOMMU_LOG_PFX ": Failed to write event log entry at %#RGp. rc=%Rrc\n", GCPhysEvtLogEntry, rc));
+
+            /* Increment the event log tail pointer. */
+            pThis->EvtLogTailPtr.n.u15Ptr += sizeof(*pEvent);
+
+            /* Check if software wants to receive an interrupt when the event log is updated. */
+            IOMMU_CTRL_T const Ctrl = iommuAmdGetCtrl(pThis);
+            if (Ctrl.n.u1EvtIntrEn)
+            {
+                /* Signal the event log interrupt. */
+                ASMAtomicOrU64(&pThis->Status.u64, IOMMU_STATUS_EVT_LOG_INTR);
+                /** @todo IOMMU: Generate the interrupt. */
+            }
+        }
+    }
 }
 
@@ -3151 +3243 @@
     {
         CMD_BUF_BAR_T const CmdBufBar = pThis->CmdBufBaseAddr;
-        uint32_t      cEntries;
-        uint32_t      cbBuffer;
-        uint8_t const uEncodedLen = CmdBufBar.n.u4Len;
-        iommuAmdGetBaseBufferLength(uEncodedLen, &cEntries, &cbBuffer);
+        uint8_t const  uEncodedLen = CmdBufBar.n.u4Len;
+        uint32_t const cEntries    = iommuAmdGetBaseBufEntryCount(uEncodedLen);
+        uint32_t const cbBuffer    = iommuAmdGetBaseBufLength(uEncodedLen);
         pHlp->pfnPrintf(pHlp, "  Command buffer BAR                      = %#RX64\n", CmdBufBar.u64);
         if (fVerbose)
@@ -3166 +3257 @@
     {
         EVT_LOG_BAR_T const EvtLogBar = pThis->EvtLogBaseAddr;
-        uint32_t      cEntries;
-        uint32_t      cbBuffer;
-        uint8_t const uEncodedLen = EvtLogBar.n.u4Len;
-        iommuAmdGetBaseBufferLength(uEncodedLen, &cEntries, &cbBuffer);
+        uint8_t const  uEncodedLen = EvtLogBar.n.u4Len;
+        uint32_t const cEntries    = iommuAmdGetBaseBufEntryCount(uEncodedLen);
+        uint32_t const cbBuffer    = iommuAmdGetBaseBufLength(uEncodedLen);
         pHlp->pfnPrintf(pHlp, "  Event log BAR                           = %#RX64\n", EvtLogBar.u64);
         if (fVerbose)
@@ -3288 +3378 @@
     {
         PPR_LOG_BAR_T PprLogBar = pThis->PprLogBaseAddr;
-        uint32_t      cEntries;
-        uint32_t      cbBuffer;
-        uint8_t const uEncodedLen = PprLogBar.n.u4Len;
-        iommuAmdGetBaseBufferLength(uEncodedLen, &cEntries, &cbBuffer);
+        uint8_t const  uEncodedLen = PprLogBar.n.u4Len;
+        uint32_t const cEntries    = iommuAmdGetBaseBufEntryCount(uEncodedLen);
+        uint32_t const cbBuffer    = iommuAmdGetBaseBufLength(uEncodedLen);
         pHlp->pfnPrintf(pHlp, "  PPR Log BAR                             = %#RX64\n",   PprLogBar.u64);
         if (fVerbose)
@@ -3325 +3414 @@
     {
         GALOG_BAR_T const GALogBar = pThis->GALogBaseAddr;
-        uint32_t      cEntries;
-        uint32_t      cbBuffer;
-        uint8_t const uEncodedLen = GALogBar.n.u4Len;
-        iommuAmdGetBaseBufferLength(uEncodedLen, &cEntries, &cbBuffer);
+        uint8_t const  uEncodedLen = GALogBar.n.u4Len;
+        uint32_t const cEntries    = iommuAmdGetBaseBufEntryCount(uEncodedLen);
+        uint32_t const cbBuffer    = iommuAmdGetBaseBufLength(uEncodedLen);
         pHlp->pfnPrintf(pHlp, "  Guest Log BAR                           = %#RX64\n",    GALogBar.u64);
         if (fVerbose)
@@ -3347 +3435 @@
     {
         PPR_LOG_B_BAR_T PprLogBBar = pThis->PprLogBBaseAddr;
-        uint32_t      cEntries;
-        uint32_t      cbBuffer;
-        uint8_t const uEncodedLen = PprLogBBar.n.u4Len;
-        iommuAmdGetBaseBufferLength(uEncodedLen, &cEntries, &cbBuffer);
+        uint8_t const uEncodedLen  = PprLogBBar.n.u4Len;
+        uint32_t const cEntries    = iommuAmdGetBaseBufEntryCount(uEncodedLen);
+        uint32_t const cbBuffer    = iommuAmdGetBaseBufLength(uEncodedLen);
         pHlp->pfnPrintf(pHlp, "  PPR Log B BAR                           = %#RX64\n",   PprLogBBar.u64);
         if (fVerbose)
@@ -3362 +3449 @@
     {
         EVT_LOG_B_BAR_T EvtLogBBar = pThis->EvtLogBBaseAddr;
-        uint32_t      cEntries;
-        uint32_t      cbBuffer;
-        uint8_t const uEncodedLen = EvtLogBBar.n.u4Len;
-        iommuAmdGetBaseBufferLength(uEncodedLen, &cEntries, &cbBuffer);
+        uint8_t const  uEncodedLen = EvtLogBBar.n.u4Len;
+        uint32_t const cEntries    = iommuAmdGetBaseBufEntryCount(uEncodedLen);
+        uint32_t const cbBuffer    = iommuAmdGetBaseBufLength(uEncodedLen);
         pHlp->pfnPrintf(pHlp, "  Event Log B BAR                         = %#RX64\n",   EvtLogBBar.u64);
         if (fVerbose)