- Timestamp:
- May 13, 2020 4:06:42 PM (5 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp
r84291 r84292 489 489 * This will make a long jump to ring-3 to acquire the lock if necessary. 490 490 */ 491 #define IOMMU_LOCK(a_pDevIns , a_pThis) \491 #define IOMMU_LOCK(a_pDevIns) \ 492 492 do { \ 493 NOREF(pThis); \494 493 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), (a_pDevIns)->CTX_SUFF(pCritSectRo), VINF_SUCCESS); \ 495 494 if (RT_LIKELY(rcLock == VINF_SUCCESS)) \ … … 500 499 501 500 /** 502 * Acquires the IOMMU PDM lock ( no return, only asserts on failure).501 * Acquires the IOMMU PDM lock (asserts on failure rather than returning an error). 503 502 * This will make a long jump to ring-3 to acquire the lock if necessary. 504 503 */ 505 #define IOMMU_LOCK_NORET(a_pDevIns , a_pThis) \504 #define IOMMU_LOCK_NORET(a_pDevIns) \ 506 505 do { \ 507 NOREF(pThis); \508 506 int rcLock = PDMDevHlpCritSectEnter((a_pDevIns), (a_pDevIns)->CTX_SUFF(pCritSectRo), VINF_SUCCESS); \ 509 507 AssertRC(rcLock); \ … … 513 511 * Releases the IOMMU PDM lock. 514 512 */ 515 #define IOMMU_UNLOCK(a_pDevIns , a_pThis) \513 #define IOMMU_UNLOCK(a_pDevIns) \ 516 514 do { \ 517 515 PDMDevHlpCritSectLeave((a_pDevIns), (a_pDevIns)->CTX_SUFF(pCritSectRo)); \ … … 3545 3543 PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU); 3546 3544 3547 IOMMU_ LOCK(pDevIns, pThis);3545 IOMMU_ASSERT_LOCKED(pDevIns); 3548 3546 3549 3547 /* Check if event logging is active and the log has not overflowed. */ … … 3593 3591 } 3594 3592 } 3595 3596 IOMMU_UNLOCK(pDevIns, pThis);3597 3593 } 3598 3594 … … 3608 3604 static void iommuAmdSetHwError(PPDMDEVINS pDevIns, PCEVT_GENERIC_T pEvent) 3609 3605 { 3606 IOMMU_ASSERT_LOCKED(pDevIns); 3607 3610 3608 PIOMMU pThis = PDMDEVINS_2_DATA(pDevIns, PIOMMU); 3611 IOMMU_LOCK_NORET(pDevIns, pThis);3612 3609 if (pThis->ExtFeat.n.u1HwErrorSup) 3613 3610 { … … 3619 3616 Assert(pThis->HwEvtHi.n.u4EvtCode == IOMMU_EVT_DEV_TAB_HW_ERROR); 3620 3617 } 3621 IOMMU_UNLOCK(pDevIns, pThis);3622 3618 } 3623 3619 … … 3639 3635 pEvtPageTabHwErr->n.u16DevId = uDevId; 3640 3636 pEvtPageTabHwErr->n.u16DomainOrPasidLo = uDomainId; 3641 //pEvtPageTabHwErr->n.u1GuestOrNested= 0;3637 pEvtPageTabHwErr->n.u1GuestOrNested = 0; 3642 3638 pEvtPageTabHwErr->n.u1Interrupt = RT_BOOL(enmOp == IOMMUOP_INTR_REQ); 3643 3639 pEvtPageTabHwErr->n.u1ReadWrite = RT_BOOL(enmOp == IOMMUOP_MEM_WRITE); … … 3656 3652 * @param pEvtPageTabHwErr The page table hardware error event. 3657 3653 * @param enmEvtType The hardware error event type. 3654 * 3655 * @thread Any. 3658 3656 */ 3659 3657 static void iommuAmdRaisePageTabHwErrorEvent(PPDMDEVINS pDevIns, IOMMUOP enmOp, PEVT_PAGE_TAB_HW_ERR_T pEvtPageTabHwErr, … … 3662 3660 AssertCompile(sizeof(EVT_GENERIC_T) == sizeof(EVT_PAGE_TAB_HW_ERR_T)); 3663 3661 PCEVT_GENERIC_T pEvent = (PCEVT_GENERIC_T)pEvtPageTabHwErr; 3662 3663 IOMMU_LOCK_NORET(pDevIns); 3664 3664 3665 3665 iommuAmdSetHwError(pDevIns, (PCEVT_GENERIC_T)pEvent); … … 3668 3668 iommuAmdSetPciTargetAbort(pDevIns); 3669 3669 3670 IOMMU_UNLOCK(pDevIns); 3671 3670 3672 Log((IOMMU_LOG_PFX ": Raised PAGE_TAB_HARDWARE_ERROR. uDevId=%#x uDomainId=%#x GCPhysPtEntity=%#RGp enmOp=%u enmType=%u\n", 3671 3673 pEvtPageTabHwErr->n.u16DevId, pEvtPageTabHwErr->n.u16DomainOrPasidLo, pEvtPageTabHwErr->n.u64Addr, enmOp, enmEvtType)); … … 3696 3698 * @param pEvtCmdHwErr The command hardware error event. 3697 3699 * @param enmEvtType The hardware error event type. 3700 * 3701 * @thread Any. 3698 3702 */ 3699 3703 static void iommuAmdRaiseCmdHwErrorEvent(PPDMDEVINS pDevIns, PCEVT_CMD_HW_ERR_T pEvtCmdHwErr, EVT_HW_ERR_TYPE_T enmEvtType) … … 3701 3705 AssertCompile(sizeof(EVT_GENERIC_T) == sizeof(EVT_CMD_HW_ERR_T)); 3702 3706 PCEVT_GENERIC_T pEvent = (PCEVT_GENERIC_T)pEvtCmdHwErr; 3707 3708 IOMMU_LOCK_NORET(pDevIns); 3703 3709 3704 3710 iommuAmdSetHwError(pDevIns, (PCEVT_GENERIC_T)pEvent); 3705 3711 iommuAmdWriteEvtLogEntry(pDevIns, (PCEVT_GENERIC_T)pEvent); 3706 3712 iommuAmdHaltCmdProcessing(pDevIns); 3713 3714 IOMMU_UNLOCK(pDevIns); 3707 3715 3708 3716 Log((IOMMU_LOG_PFX ": Raised COMMAND_HARDWARE_ERROR. GCPhysCmd=%#RGp enmType=%u\n", pEvtCmdHwErr->n.u64Addr, enmEvtType)); … … 3742 3750 * @param pEvtDevTabHwErr The device table hardware error event. 3743 3751 * @param enmEvtType The hardware error event type. 3752 * 3753 * @thread Any. 3744 3754 */ 3745 3755 static void iommuAmdRaiseDevTabHwErrorEvent(PPDMDEVINS pDevIns, IOMMUOP enmOp, PEVT_DEV_TAB_HW_ERROR_T pEvtDevTabHwErr, … … 3748 3758 AssertCompile(sizeof(EVT_GENERIC_T) == sizeof(EVT_DEV_TAB_HW_ERROR_T)); 3749 3759 PCEVT_GENERIC_T pEvent = (PCEVT_GENERIC_T)pEvtDevTabHwErr; 3760 3761 IOMMU_LOCK_NORET(pDevIns); 3762 3750 3763 iommuAmdSetHwError(pDevIns, (PCEVT_GENERIC_T)pEvent); 3751 3764 iommuAmdWriteEvtLogEntry(pDevIns, (PCEVT_GENERIC_T)pEvent); 3752 3765 if (enmOp != IOMMUOP_CMD) 3753 3766 iommuAmdSetPciTargetAbort(pDevIns); 3767 3768 IOMMU_UNLOCK(pDevIns); 3754 3769 3755 3770 Log((IOMMU_LOG_PFX ": Raised DEV_TAB_HARDWARE_ERROR. uDevId=%#x GCPhysDte=%#RGp enmOp=%u enmType=%u\n", … … 3794 3809 * @param pEvtIllegalDte The illegal device table entry event. 3795 3810 * @param enmEvtType The illegal DTE event type. 3811 * 3812 * @thread Any. 3796 3813 */ 3797 3814 static void iommuAmdRaiseIllegalDteEvent(PPDMDEVINS pDevIns, IOMMUOP enmOp, PCEVT_ILLEGAL_DTE_T pEvtIllegalDte, … … 3800 3817 AssertCompile(sizeof(EVT_GENERIC_T) == sizeof(EVT_ILLEGAL_DTE_T)); 3801 3818 PCEVT_GENERIC_T pEvent = (PCEVT_GENERIC_T)pEvtIllegalDte; 3819 3820 IOMMU_LOCK_NORET(pDevIns); 3821 3802 3822 iommuAmdWriteEvtLogEntry(pDevIns, pEvent); 3803 3823 if (enmOp != IOMMUOP_CMD) 3804 3824 iommuAmdSetPciTargetAbort(pDevIns); 3825 3826 IOMMU_UNLOCK(pDevIns); 3805 3827 3806 3828 Log((IOMMU_LOG_PFX ": Raised ILLEGAL_DTE_EVENT. uDevId=%#x uIova=%#RX64 enmOp=%u enmEvtType=%u\n", pEvtIllegalDte->n.u16DevId, … … 3868 3890 PCEVT_GENERIC_T pEvent = (PCEVT_GENERIC_T)pEvtIoPageFault; 3869 3891 3892 IOMMU_LOCK_NORET(pDevIns); 3893 3870 3894 bool fSuppressEvtLogging = false; 3871 3895 if ( enmOp == IOMMUOP_MEM_READ … … 3967 3991 } 3968 3992 } 3993 3994 IOMMU_UNLOCK(pDevIns); 3969 3995 } 3970 3996 … … 4630 4656 if (Status.u64 & IOMMU_STATUS_CMD_BUF_RUNNING) 4631 4657 { 4632 IOMMU_LOCK(pDevIns , pThis);4658 IOMMU_LOCK(pDevIns); 4633 4659 4634 4660 uint32_t const cbCmdBuf = iommuAmdGetBufLength(pThis->CmdBufBaseAddr.n.u4Len); … … 4648 4674 4649 4675 /* Process the fetched command. */ 4650 IOMMU_UNLOCK(pDevIns , pThis);4676 IOMMU_UNLOCK(pDevIns); 4651 4677 rc = iommuAmdR3ProcessCmd(pDevIns, &Cmd); 4652 IOMMU_LOCK(pDevIns , pThis);4678 IOMMU_LOCK(pDevIns); 4653 4679 if (RT_SUCCESS(rc)) 4654 4680 { /* likely */ } … … 4665 4691 /* Reporting this as a "data error". Maybe target abort is more appropriate? */ 4666 4692 EVT_CMD_HW_ERR_T EvtCmdHwErr; 4667 iommuAmdInitCmdHwErrorEvent(GCPhysCmd, HWEVTTYPE_DATA_ERROR, & 4693 iommuAmdInitCmdHwErrorEvent(GCPhysCmd, HWEVTTYPE_DATA_ERROR, &EvtCmdHwErr); 4668 4694 iommuAmdRaiseCmdHwErrorEvent(pDevIns, &EvtCmdHwErr, kHwErrType_PoisonedData); 4669 4695 break; … … 4671 4697 } 4672 4698 4673 IOMMU_UNLOCK(pDevIns , pThis);4699 IOMMU_UNLOCK(pDevIns); 4674 4700 } 4675 4701 } … … 4732 4758 } 4733 4759 4734 IOMMU_LOCK(pDevIns , pThis);4760 IOMMU_LOCK(pDevIns); 4735 4761 4736 4762 VBOXSTRICTRC rcStrict; … … 4783 4809 } 4784 4810 4785 IOMMU_UNLOCK(pDevIns , pThis);4811 IOMMU_UNLOCK(pDevIns); 4786 4812 4787 4813 Log3((IOMMU_LOG_PFX ": PCI config write: %#x -> To %#x (%u) %Rrc\n", u32Value, uAddress, cb, VBOXSTRICTRC_VAL(rcStrict)));
Note:
See TracChangeset
for help on using the changeset viewer.