VirtualBox

Changeset 84332 in vbox for trunk/include/VBox/vmm


Ignore:
Timestamp:
May 18, 2020 2:45:14 PM (5 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
138009
Message:

PDMDevHlp: Add flags to the guest physical read/write helpers to let a device indicate whether the read or written data not being processed by the device in any way (user data) or whether the device parses/created the data (meta data). This will be used for tracing later to decide whether to include certain data in the log

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/pdmdev.h

    r84170 r84332  
    21562156/** Mask of valid flags.   */
    21572157#define PDMPCIDEV_IORGN_F_VALID_MASK        UINT32_C(0x00000007)
     2158/** @} */
     2159
     2160
     2161/** @name Flags for the guest physical read/write helpers
     2162 * @{ */
     2163/** Default flag with no indication whether the data is processed by the device or just passed through. */
     2164#define PDM_DEVHLP_PHYS_RW_F_DEFAULT        UINT32_C(0x00000000)
     2165/** The data is user data which is just passed through between the guest and the source or destination and not processed
     2166 * by the device in any way. */
     2167#define PDM_DEVHLP_PHYS_RW_F_DATA_USER      RT_BIT_32(0)
     2168/** The data is metadata and being processed by the device in some way. */
     2169#define PDM_DEVHLP_PHYS_RW_F_DATA_META      RT_BIT_32(1)
    21582170/** @} */
    21592171
    … …  
    27872799     * @param   pvBuf               Where to put the read bits.
    27882800     * @param   cbRead              How many bytes to read.
     2801     * @param   fFlags              Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
    27892802     * @thread  Any thread, but the call may involve the emulation thread.
    27902803     */
    2791     DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
     2804    DECLR3CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags));
    27922805
    27932806    /**
    … …  
    27992812     * @param   pvBuf               What to write.
    28002813     * @param   cbWrite             How many bytes to write.
     2814     * @param   fFlags              Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
    28012815     * @thread  Any thread, but the call may involve the emulation thread.
    28022816     */
    2803     DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
     2817    DECLR3CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags));
    28042818
    28052819    /**
    … …  
    32453259     * @param   pvBuf               Where to put the read bits.
    32463260     * @param   cbRead              How many bytes to read.
     3261     * @param   fFlags              Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
    32473262     * @thread  Any thread, but the call may involve the emulation thread.
    32483263     */
    3249     DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
     3264    DECLR3CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags));
    32503265
    32513266    /**
    … …  
    32603275     * @param   pvBuf               What to write.
    32613276     * @param   cbWrite             How many bytes to write.
     3277     * @param   fFlags              Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
    32623278     * @thread  Any thread, but the call may involve the emulation thread.
    32633279     */
    3264     DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
     3280    DECLR3CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags));
    32653281
    32663282    /**
    … …  
    43564372     * @param   pvBuf               Where to put the read bits.
    43574373     * @param   cbRead              How many bytes to read.
     4374     * @param   fFlags              Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
    43584375     * @thread  Any thread, but the call may involve the emulation thread.
    43594376     */
    43604377    DECLRCCALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
    4361                                               void *pvBuf, size_t cbRead));
     4378                                              void *pvBuf, size_t cbRead, uint32_t fFlags));
    43624379
    43634380    /**
    … …  
    43724389     * @param   pvBuf               What to write.
    43734390     * @param   cbWrite             How many bytes to write.
     4391     * @param   fFlags              Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
    43744392     * @thread  Any thread, but the call may involve the emulation thread.
    43754393     */
    43764394    DECLRCCALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
    4377                                                const void *pvBuf, size_t cbWrite));
     4395                                               const void *pvBuf, size_t cbWrite, uint32_t fFlags));
    43784396
    43794397    /**
    … …  
    44174435     * @param   pvBuf           Where to put the read bits.
    44184436     * @param   cbRead          How many bytes to read.
    4419      */
    4420     DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
     4437     * @param   fFlags          Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
     4438     */
     4439    DECLRCCALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags));
    44214440
    44224441    /**
    … …  
    44284447     * @param   pvBuf           What to write.
    44294448     * @param   cbWrite         How many bytes to write.
    4430      */
    4431     DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
     4449     * @param   fFlags          Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
     4450     */
     4451    DECLRCCALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags));
    44324452
    44334453    /**
    … …  
    48024822     * @param   pvBuf               Where to put the read bits.
    48034823     * @param   cbRead              How many bytes to read.
     4824     * @param   fFlags              Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
    48044825     * @thread  Any thread, but the call may involve the emulation thread.
    48054826     */
    48064827    DECLR0CALLBACKMEMBER(int, pfnPCIPhysRead,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
    4807                                               void *pvBuf, size_t cbRead));
     4828                                              void *pvBuf, size_t cbRead, uint32_t fFlags));
    48084829
    48094830    /**
    … …  
    48184839     * @param   pvBuf               What to write.
    48194840     * @param   cbWrite             How many bytes to write.
     4841     * @param   fFlags              Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
    48204842     * @thread  Any thread, but the call may involve the emulation thread.
    48214843     */
    48224844    DECLR0CALLBACKMEMBER(int, pfnPCIPhysWrite,(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys,
    4823                                                const void *pvBuf, size_t cbWrite));
     4845                                               const void *pvBuf, size_t cbWrite, uint32_t fFlags));
    48244846
    48254847    /**
    … …  
    48634885     * @param   pvBuf           Where to put the read bits.
    48644886     * @param   cbRead          How many bytes to read.
    4865      */
    4866     DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead));
     4887     * @param   fFlags          Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
     4888     */
     4889    DECLR0CALLBACKMEMBER(int, pfnPhysRead,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead, uint32_t fFlags));
    48674890
    48684891    /**
    … …  
    48744897     * @param   pvBuf           What to write.
    48754898     * @param   cbWrite         How many bytes to write.
    4876      */
    4877     DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite));
     4899     * @param   fFlags          Combination of PDM_DEVHLP_PHYS_RW_F_XXX.
     4900     */
     4901    DECLR0CALLBACKMEMBER(int, pfnPhysWrite,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite, uint32_t fFlags));
    48784902
    48794903    /**
    … …  
    62916315
    62926316/**
    6293  * @copydoc PDMDEVHLPR3::pfnPhysRead
     6317 * Read physical memory - unknown data usage.
     6318 *
     6319 * @returns VINF_SUCCESS (for now).
     6320 * @param   pDevIns             The device instance.
     6321 * @param   GCPhys              Physical address start reading from.
     6322 * @param   pvBuf               Where to put the read bits.
     6323 * @param   cbRead              How many bytes to read.
     6324 * @thread  Any thread, but the call may involve the emulation thread.
    62946325 */
    62956326DECLINLINE(int) PDMDevHlpPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
    62966327{
    6297     return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead);
    6298 }
    6299 
    6300 /**
    6301  * @copydoc PDMDEVHLPR3::pfnPhysWrite
     6328    return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead, PDM_DEVHLP_PHYS_RW_F_DEFAULT);
     6329}
     6330
     6331/**
     6332 * Write to physical memory - unknown data usage.
     6333 *
     6334 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
     6335 * @param   pDevIns             The device instance.
     6336 * @param   GCPhys              Physical address to write to.
     6337 * @param   pvBuf               What to write.
     6338 * @param   cbWrite             How many bytes to write.
     6339 * @thread  Any thread, but the call may involve the emulation thread.
    63026340 */
    63036341DECLINLINE(int) PDMDevHlpPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
    63046342{
    6305     return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite);
     6343    return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite, PDM_DEVHLP_PHYS_RW_F_DEFAULT);
     6344}
     6345
     6346/**
     6347 * Read physical memory - reads meta data processed by the device.
     6348 *
     6349 * @returns VINF_SUCCESS (for now).
     6350 * @param   pDevIns             The device instance.
     6351 * @param   GCPhys              Physical address start reading from.
     6352 * @param   pvBuf               Where to put the read bits.
     6353 * @param   cbRead              How many bytes to read.
     6354 * @thread  Any thread, but the call may involve the emulation thread.
     6355 */
     6356DECLINLINE(int) PDMDevHlpPhysReadMeta(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
     6357{
     6358    return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead, PDM_DEVHLP_PHYS_RW_F_DATA_META);
     6359}
     6360
     6361/**
     6362 * Write to physical memory - written data was created/altered by the device.
     6363 *
     6364 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
     6365 * @param   pDevIns             The device instance.
     6366 * @param   GCPhys              Physical address to write to.
     6367 * @param   pvBuf               What to write.
     6368 * @param   cbWrite             How many bytes to write.
     6369 * @thread  Any thread, but the call may involve the emulation thread.
     6370 */
     6371DECLINLINE(int) PDMDevHlpPhysWriteMeta(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
     6372{
     6373    return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite, PDM_DEVHLP_PHYS_RW_F_DATA_META);
     6374}
     6375
     6376/**
     6377 * Read physical memory - read data will not be touched by the device.
     6378 *
     6379 * @returns VINF_SUCCESS (for now).
     6380 * @param   pDevIns             The device instance.
     6381 * @param   GCPhys              Physical address start reading from.
     6382 * @param   pvBuf               Where to put the read bits.
     6383 * @param   cbRead              How many bytes to read.
     6384 * @thread  Any thread, but the call may involve the emulation thread.
     6385 */
     6386DECLINLINE(int) PDMDevHlpPhysReadUser(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
     6387{
     6388    return pDevIns->CTX_SUFF(pHlp)->pfnPhysRead(pDevIns, GCPhys, pvBuf, cbRead, PDM_DEVHLP_PHYS_RW_F_DATA_USER);
     6389}
     6390
     6391/**
     6392 * Write to physical memory - written data was not touched/created by the device.
     6393 *
     6394 * @returns VINF_SUCCESS for now, and later maybe VERR_EM_MEMORY.
     6395 * @param   pDevIns             The device instance.
     6396 * @param   GCPhys              Physical address to write to.
     6397 * @param   pvBuf               What to write.
     6398 * @param   cbWrite             How many bytes to write.
     6399 * @thread  Any thread, but the call may involve the emulation thread.
     6400 */
     6401DECLINLINE(int) PDMDevHlpPhysWriteUser(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
     6402{
     6403    return pDevIns->CTX_SUFF(pHlp)->pfnPhysWrite(pDevIns, GCPhys, pvBuf, cbWrite, PDM_DEVHLP_PHYS_RW_F_DATA_USER);
    63066404}
    63076405
    … …  
    68896987DECLINLINE(int) PDMDevHlpPCIPhysRead(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
    68906988{
    6891     return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, NULL, GCPhys, pvBuf, cbRead);
    6892 }
    6893 
    6894 /**
    6895  * @copydoc PDMDEVHLPR3::pfnPCIPhysRead
     6989    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, NULL, GCPhys, pvBuf, cbRead, PDM_DEVHLP_PHYS_RW_F_DEFAULT);
     6990}
     6991
     6992/**
     6993 * Bus master physical memory read - unknown data usage.
     6994 *
     6995 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
     6996 *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     6997 * @param   pDevIns             The device instance.
     6998 * @param   pPciDev             The PCI device structure.  If NULL the default
     6999 *                              PCI device for this device instance is used.
     7000 * @param   GCPhys              Physical address start reading from.
     7001 * @param   pvBuf               Where to put the read bits.
     7002 * @param   cbRead              How many bytes to read.
     7003 * @thread  Any thread, but the call may involve the emulation thread.
    68967004 */
    68977005DECLINLINE(int) PDMDevHlpPCIPhysReadEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
    68987006{
    6899     return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead);
    6900 }
    6901 
    6902 /**
    6903  * Bus master physical memory write from the default PCI device.
     7007    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead, PDM_DEVHLP_PHYS_RW_F_DEFAULT);
     7008}
     7009
     7010/**
     7011 * Bus master physical memory read from the default PCI device.
     7012 *
     7013 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
     7014 *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     7015 * @param   pDevIns             The device instance.
     7016 * @param   GCPhys              Physical address start reading from.
     7017 * @param   pvBuf               Where to put the read bits.
     7018 * @param   cbRead              How many bytes to read.
     7019 * @thread  Any thread, but the call may involve the emulation thread.
     7020 */
     7021DECLINLINE(int) PDMDevHlpPCIPhysReadMeta(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
     7022{
     7023    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, NULL, GCPhys, pvBuf, cbRead, PDM_DEVHLP_PHYS_RW_F_DATA_META);
     7024}
     7025
     7026/**
     7027 * Bus master physical memory read - reads meta data processed by the device.
     7028 *
     7029 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
     7030 *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     7031 * @param   pDevIns             The device instance.
     7032 * @param   pPciDev             The PCI device structure.  If NULL the default
     7033 *                              PCI device for this device instance is used.
     7034 * @param   GCPhys              Physical address start reading from.
     7035 * @param   pvBuf               Where to put the read bits.
     7036 * @param   cbRead              How many bytes to read.
     7037 * @thread  Any thread, but the call may involve the emulation thread.
     7038 */
     7039DECLINLINE(int) PDMDevHlpPCIPhysReadMetaEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
     7040{
     7041    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead, PDM_DEVHLP_PHYS_RW_F_DATA_META);
     7042}
     7043
     7044/**
     7045 * Bus master physical memory read from the default PCI device - read data will not be touched by the device.
     7046 *
     7047 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
     7048 *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     7049 * @param   pDevIns             The device instance.
     7050 * @param   GCPhys              Physical address start reading from.
     7051 * @param   pvBuf               Where to put the read bits.
     7052 * @param   cbRead              How many bytes to read.
     7053 * @thread  Any thread, but the call may involve the emulation thread.
     7054 */
     7055DECLINLINE(int) PDMDevHlpPCIPhysReadUser(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
     7056{
     7057    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, NULL, GCPhys, pvBuf, cbRead, PDM_DEVHLP_PHYS_RW_F_DATA_USER);
     7058}
     7059
     7060/**
     7061 * Bus master physical memory read - read data will not be touched by the device.
     7062 *
     7063 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_READ_BM_DISABLED, later maybe
     7064 *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     7065 * @param   pDevIns             The device instance.
     7066 * @param   pPciDev             The PCI device structure.  If NULL the default
     7067 *                              PCI device for this device instance is used.
     7068 * @param   GCPhys              Physical address start reading from.
     7069 * @param   pvBuf               Where to put the read bits.
     7070 * @param   cbRead              How many bytes to read.
     7071 * @thread  Any thread, but the call may involve the emulation thread.
     7072 */
     7073DECLINLINE(int) PDMDevHlpPCIPhysReadUserEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, void *pvBuf, size_t cbRead)
     7074{
     7075    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysRead(pDevIns, pPciDev, GCPhys, pvBuf, cbRead, PDM_DEVHLP_PHYS_RW_F_DATA_USER);
     7076}
     7077
     7078/**
     7079 * Bus master physical memory write from the default PCI device - unknown data usage.
    69047080 *
    69057081 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
    … …  
    69137089DECLINLINE(int) PDMDevHlpPCIPhysWrite(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
    69147090{
    6915     return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, NULL, GCPhys, pvBuf, cbWrite);
    6916 }
    6917 
    6918 /**
    6919  * @copydoc PDMDEVHLPR3::pfnPCIPhysWrite
     7091    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, NULL, GCPhys, pvBuf, cbWrite, PDM_DEVHLP_PHYS_RW_F_DEFAULT);
     7092}
     7093
     7094/**
     7095 * Bus master physical memory write - unknown data usage.
     7096 *
     7097 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
     7098 *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     7099 * @param   pDevIns             The device instance.
     7100 * @param   pPciDev             The PCI device structure.  If NULL the default
     7101 *                              PCI device for this device instance is used.
     7102 * @param   GCPhys              Physical address to write to.
     7103 * @param   pvBuf               What to write.
     7104 * @param   cbWrite             How many bytes to write.
     7105 * @thread  Any thread, but the call may involve the emulation thread.
    69207106 */
    69217107DECLINLINE(int) PDMDevHlpPCIPhysWriteEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
    69227108{
    6923     return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite);
     7109    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite, PDM_DEVHLP_PHYS_RW_F_DEFAULT);
     7110}
     7111
     7112/**
     7113 * Bus master physical memory write from the default PCI device.
     7114 *
     7115 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
     7116 *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     7117 * @param   pDevIns             The device instance.
     7118 * @param   GCPhys              Physical address to write to.
     7119 * @param   pvBuf               What to write.
     7120 * @param   cbWrite             How many bytes to write.
     7121 * @thread  Any thread, but the call may involve the emulation thread.
     7122 */
     7123DECLINLINE(int) PDMDevHlpPCIPhysWriteMeta(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
     7124{
     7125    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, NULL, GCPhys, pvBuf, cbWrite, PDM_DEVHLP_PHYS_RW_F_DATA_META);
     7126}
     7127
     7128/**
     7129 * Bus master physical memory write - written data was created/altered by the device.
     7130 *
     7131 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
     7132 *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     7133 * @param   pDevIns             The device instance.
     7134 * @param   pPciDev             The PCI device structure.  If NULL the default
     7135 *                              PCI device for this device instance is used.
     7136 * @param   GCPhys              Physical address to write to.
     7137 * @param   pvBuf               What to write.
     7138 * @param   cbWrite             How many bytes to write.
     7139 * @thread  Any thread, but the call may involve the emulation thread.
     7140 */
     7141DECLINLINE(int) PDMDevHlpPCIPhysWriteMetaEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
     7142{
     7143    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite, PDM_DEVHLP_PHYS_RW_F_DATA_META);
     7144}
     7145
     7146/**
     7147 * Bus master physical memory write from the default PCI device.
     7148 *
     7149 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
     7150 *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     7151 * @param   pDevIns             The device instance.
     7152 * @param   GCPhys              Physical address to write to.
     7153 * @param   pvBuf               What to write.
     7154 * @param   cbWrite             How many bytes to write.
     7155 * @thread  Any thread, but the call may involve the emulation thread.
     7156 */
     7157DECLINLINE(int) PDMDevHlpPCIPhysWriteUser(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
     7158{
     7159    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, NULL, GCPhys, pvBuf, cbWrite, PDM_DEVHLP_PHYS_RW_F_DATA_USER);
     7160}
     7161
     7162/**
     7163 * Bus master physical memory write - written data was not touched/created by the device.
     7164 *
     7165 * @returns VINF_SUCCESS or VERR_PGM_PCI_PHYS_WRITE_BM_DISABLED, later maybe
     7166 *          VERR_EM_MEMORY.  The informational status shall NOT be propagated!
     7167 * @param   pDevIns             The device instance.
     7168 * @param   pPciDev             The PCI device structure.  If NULL the default
     7169 *                              PCI device for this device instance is used.
     7170 * @param   GCPhys              Physical address to write to.
     7171 * @param   pvBuf               What to write.
     7172 * @param   cbWrite             How many bytes to write.
     7173 * @thread  Any thread, but the call may involve the emulation thread.
     7174 */
     7175DECLINLINE(int) PDMDevHlpPCIPhysWriteUserEx(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
     7176{
     7177    return pDevIns->CTX_SUFF(pHlp)->pfnPCIPhysWrite(pDevIns, pPciDev, GCPhys, pvBuf, cbWrite, PDM_DEVHLP_PHYS_RW_F_DATA_USER);
    69247178}
    69257179
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