VirtualBox

Changeset 84826 in vbox for trunk/src/VBox/Devices


Ignore:
Timestamp:
Jun 15, 2020 8:20:40 AM (5 years ago)
Author:
vboxsync
Message:

AMD IOMMU: bugref:9654 PDM interface changes for supplying bus:device:function for devices' initiating PCI interrupts and MSIs.

Location:
trunk/src/VBox/Devices
Files:
6 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

    r84808 r84826  
    42234223        if (uNextLevel == 7)
    42244224        {
    4225             /* The default page size of the translation is overriden. */
     4225            /* The default page size of the translation is overridden. */
    42264226            RTGCPHYS const GCPhysPte = PtEntity.u64 & IOMMU_PTENTITY_ADDR_MASK;
    42274227            uint8_t        cShift    = X86_PAGE_4K_SHIFT;

  • trunk/src/VBox/Devices/Bus/DevPCI.cpp

    r82968 r84826  
    246246    /* This is only allowed to be called with a pointer to the host bus. */
    247247    AssertMsg(pBus->iBus == 0, ("iBus=%u\n", pBus->iBus));
     248    uint16_t const uBusDevFn = PCIBDF_MAKE(pBus->iBus, uDevFn);
    248249
    249250    if (iAcpiIrq == -1) {
    … …  
    261262        Log3Func(("%s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d\n",
    262263              R3STRING(pPciDev->pszNameR3), irq_num1, iLevel, apic_irq, apic_level, irq_num));
    263         pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, apic_irq, apic_level, uTagSrc);
     264        pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, uBusDevFn, apic_irq, apic_level, uTagSrc);
    264265
    265266        if ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP) {
    … …  
    269270            Log3Func(("%s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d (flop)\n",
    270271                  R3STRING(pPciDev->pszNameR3), irq_num1, iLevel, apic_irq, apic_level, irq_num));
    271             pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, apic_irq, apic_level, uTagSrc);
     272            pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, uBusDevFn, apic_irq, apic_level, uTagSrc);
    272273        }
    273274    } else {
    274         Log3Func(("%s: irq_num1=%d level=%d iAcpiIrq=%d\n",
    275               R3STRING(pPciDev->pszNameR3), irq_num1, iLevel, iAcpiIrq));
    276         pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, iAcpiIrq, iLevel, uTagSrc);
     275        Log3Func(("%s: irq_num1=%d level=%d iAcpiIrq=%d\n", R3STRING(pPciDev->pszNameR3), irq_num1, iLevel, iAcpiIrq));
     276        pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, uBusDevFn, iAcpiIrq, iLevel, uTagSrc);
    277277    }
    278278}

  • trunk/src/VBox/Devices/Bus/DevPciIch9.cpp

    r82968 r84826  
    547547    /* This is only allowed to be called with a pointer to the root bus. */
    548548    AssertMsg(pBus->iBus == 0, ("iBus=%u\n", pBus->iBus));
     549    uint16_t const uBusDevFn = PCIBDF_MAKE(pBus->iBus, uDevFn);
    549550
    550551    if (iForcedIrq == -1)
    … …  
    563564        Log3Func(("%s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d uTagSrc=%#x\n",
    564565                  R3STRING(pPciDev->pszNameR3), irq_num1, iLevel, apic_irq, apic_level, irq_num, uTagSrc));
    565         pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, apic_irq, apic_level, uTagSrc);
     566        pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, uBusDevFn, apic_irq, apic_level, uTagSrc);
    566567
    567568        if ((iLevel & PDM_IRQ_LEVEL_FLIP_FLOP) == PDM_IRQ_LEVEL_FLIP_FLOP)
    … …  
    576577            Log3Func(("%s: irq_num1=%d level=%d apic_irq=%d apic_level=%d irq_num1=%d uTagSrc=%#x (flop)\n",
    577578                      R3STRING(pPciDev->pszNameR3), irq_num1, iLevel, apic_irq, apic_level, irq_num, uTagSrc));
    578             pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, apic_irq, apic_level, uTagSrc);
     579            pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, uBusDevFn, apic_irq, apic_level, uTagSrc);
    579580        }
    580581    } else {
    581582        Log3Func(("(forced) %s: irq_num1=%d level=%d acpi_irq=%d uTagSrc=%#x\n",
    582583                  R3STRING(pPciDev->pszNameR3), irq_num1, iLevel, iForcedIrq, uTagSrc));
    583         pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, iForcedIrq, iLevel, uTagSrc);
     584        pBusCC->CTX_SUFF(pPciHlp)->pfnIoApicSetIrq(pDevIns, uBusDevFn, iForcedIrq, iLevel, uTagSrc);
    584585    }
    585586}

  • trunk/src/VBox/Devices/Bus/MsiCommon.cpp

    r82968 r84826  
    2727#include "MsiCommon.h"
    2828#include "PciInline.h"
     29#include "DevPciInternal.h"
    2930
    3031
    … …  
    330331    }
    331332
    332     RTGCPHYS   GCAddr = msiGetMsiAddress(pDev);
    333     uint32_t   u32Value = msiGetMsiData(pDev, iVector);
     333    MSIMSG Msi;
     334    Msi.Addr.u64 = msiGetMsiAddress(pDev);
     335    Msi.Data.u32 = msiGetMsiData(pDev, iVector);
    334336
    335337    if (puPending)
    336338        *puPending &= ~(1<<iVector);
    337339
     340    PPDMDEVINS pDevInsBus = pPciHlp->pfnGetBusByNo(pDevIns, pDev->Int.s.idxPdmBus);
     341    Assert(pDevInsBus);
     342    PDEVPCIBUS pBus = PDMINS_2_DATA(pDevInsBus, PDEVPCIBUS);
     343    uint16_t const uBusDevFn = PCIBDF_MAKE(pBus->iBus, pDev->uDevFn);
     344
    338345    Assert(pPciHlp->pfnIoApicSendMsi != NULL);
    339     pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value, uTagSrc);
    340 }
    341 
     346    pPciHlp->pfnIoApicSendMsi(pDevIns, uBusDevFn, &Msi, uTagSrc);
     347}
     348

  • trunk/src/VBox/Devices/Bus/MsixCommon.cpp

    r82968 r84826  
    2929
    3030#include "MsiCommon.h"
     31#include "DevPCIInternal.h"
    3132#include "PciInline.h"
    3233
    … …  
    268269    msixClearPending(pDev, iVector);
    269270
    270     RTGCPHYS   GCAddr = msixGetMsiAddress(pDev, iVector);
    271     uint32_t   u32Value = msixGetMsiData(pDev, iVector);
    272 
    273     pPciHlp->pfnIoApicSendMsi(pDevIns, GCAddr, u32Value, uTagSrc);
     271    MSIMSG Msi;
     272    Msi.Addr.u64 = msixGetMsiAddress(pDev, iVector);
     273    Msi.Data.u32 = msixGetMsiData(pDev, iVector);
     274
     275    PPDMDEVINS pDevInsBus = pPciHlp->pfnGetBusByNo(pDevIns, pDev->Int.s.idxPdmBus);
     276    Assert(pDevInsBus);
     277    PDEVPCIBUS pBus = PDMINS_2_DATA(pDevInsBus, PDEVPCIBUS);
     278    uint16_t const uBusDevFn = PCIBDF_MAKE(pBus->iBus, pDev->uDevFn);
     279
     280    pPciHlp->pfnIoApicSendMsi(pDevIns, uBusDevFn, &Msi, uTagSrc);
    274281}
    275282

  • trunk/src/VBox/Devices/PC/DevIoApic.cpp

    r84677 r84826  
    166166#define IOAPIC_DIRECT_OFF_EOI                   0x40    /* Newer I/O APIC only. */
    167167
     168/** The I/O APIC's Bus:Device:Function. */
     169#define IOAPIC_BUS_DEV_FN                       NIL_PCIBDF
     170
    168171/* Use PDM critsect for now for I/O APIC locking, see @bugref{8245#c121}. */
    169172#define IOAPIC_WITH_PDM_CRITSECT
    … …  
    472475 * @param   pThis       The shared I/O APIC device state.
    473476 * @param   pThisCC     The I/O APIC device state for the current context.
     477 * @param   uBusDevFn   The bus:device:function of the device initiating the IRQ.
    474478 * @param   idxRte      The index of the RTE (validated).
    475479 *
    … …  
    478482 *          function.
    479483 */
    480 static void ioapicSignalIntrForRte(PPDMDEVINS pDevIns, PIOAPIC pThis, PIOAPICCC pThisCC, uint8_t idxRte)
     484static void ioapicSignalIntrForRte(PPDMDEVINS pDevIns, PIOAPIC pThis, PIOAPICCC pThisCC, PCIBDF uBusDevFn, uint8_t idxRte)
    481485{
    482486#ifndef IOAPIC_WITH_PDM_CRITSECT
    … …  
    499503            }
    500504        }
     505
     506        /** @todo IOMMU: Call into the IOMMU on how to remap this interrupt. uBusDevFn
     507         *        will be needed then. */
     508        NOREF(uBusDevFn);
    501509
    502510        uint8_t const  u8Vector       = IOAPIC_RTE_GET_VECTOR(u64Rte);
    … …  
    622630        uint32_t const uPinMask = UINT32_C(1) << idxRte;
    623631        if (pThis->uIrr & uPinMask)
    624             ioapicSignalIntrForRte(pDevIns, pThis, pThisCC, idxRte);
     632            ioapicSignalIntrForRte(pDevIns, pThis, pThisCC, IOAPIC_BUS_DEV_FN, idxRte);
    625633
    626634        IOAPIC_UNLOCK(pDevIns, pThis, pThisCC);
    … …  
    737745                uint32_t const uPinMask = UINT32_C(1) << idxRte;
    738746                if (pThis->uIrr & uPinMask)
    739                     ioapicSignalIntrForRte(pDevIns, pThis, pThisCC, idxRte);
     747                    ioapicSignalIntrForRte(pDevIns, pThis, pThisCC, IOAPIC_BUS_DEV_FN, idxRte);
    740748            }
    741749        }
    … …  
    754762 * @interface_method_impl{PDMIOAPICREG,pfnSetIrq}
    755763 */
    756 static DECLCALLBACK(void) ioapicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
    757 {
    758 #define IOAPIC_ASSERT_IRQ(a_idxRte, a_PinMask) do { \
     764static DECLCALLBACK(void) ioapicSetIrq(PPDMDEVINS pDevIns, PCIBDF uBusDevFn, int iIrq, int iLevel, uint32_t uTagSrc)
     765{
     766#define IOAPIC_ASSERT_IRQ(a_uBusDevFn, a_idxRte, a_PinMask) do { \
    759767        pThis->au32TagSrc[(a_idxRte)] = !pThis->au32TagSrc[(a_idxRte)] ? uTagSrc : RT_BIT_32(31); \
    760768        pThis->uIrr |= a_PinMask; \
    761         ioapicSignalIntrForRte(pDevIns, pThis, pThisCC, (a_idxRte)); \
     769        ioapicSignalIntrForRte(pDevIns, pThis, pThisCC, (a_uBusDevFn), (a_idxRte)); \
    762770    } while (0)
    763771
    … …  
    803811                 */
    804812                if (!uPrevIrr)
    805                     IOAPIC_ASSERT_IRQ(idxRte, uPinMask);
     813                    IOAPIC_ASSERT_IRQ(uBusDevFn, idxRte, uPinMask);
    806814                else
    807815                {
    … …  
    827835                }
    828836
    829                 IOAPIC_ASSERT_IRQ(idxRte, uPinMask);
     837                IOAPIC_ASSERT_IRQ(uBusDevFn, idxRte, uPinMask);
    830838            }
    831839        }
    … …  
    838846             * hence just the assert is done.
    839847             */
    840             IOAPIC_ASSERT_IRQ(idxRte, uPinMask);
     848            IOAPIC_ASSERT_IRQ(uBusDevFn, idxRte, uPinMask);
    841849        }
    842850
    … …  
    850858 * @interface_method_impl{PDMIOAPICREG,pfnSendMsi}
    851859 */
    852 static DECLCALLBACK(void) ioapicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)
     860static DECLCALLBACK(void) ioapicSendMsi(PPDMDEVINS pDevIns, PCIBDF uBusDevFn, PCMSIMSG pMsi, uint32_t uTagSrc)
    853861{
    854862    PIOAPICCC pThisCC = PDMDEVINS_2_DATA_CC(pDevIns, PIOAPICCC);
    855     LogFlow(("IOAPIC: ioapicSendMsi: GCPhys=%#RGp uValue=%#RX32\n", GCPhys, uValue));
    856 
    857     MSIMSG Msi;
    858     Msi.Addr.u64 = GCPhys;
    859     Msi.Data.u32 = uValue;
     863    LogFlow(("IOAPIC: ioapicSendMsi: uBusDevFn=%#x Addr=%#RX64 Data=%#RX32\n", uBusDevFn, pMsi->Addr.u64, pMsi->Data.u32));
    860864
    861865    XAPICINTR ApicIntr;
    862866    RT_ZERO(ApicIntr);
    863     ioapicGetApicIntrFromMsi(&Msi, &ApicIntr);
     867    ioapicGetApicIntrFromMsi(pMsi, &ApicIntr);
     868
     869    /** @todo IOMMU: Call into the IOMMU to remap the MSI. uBusDevFn will be used
     870     *        then. */
     871    NOREF(uBusDevFn);
    864872
    865873    /*
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