Changeset 85494 in vbox for trunk

Timestamp:

Jul 29, 2020 5:28:58 AM (4 years ago)

Author:

vboxsync

Message:

AMD IOMMU: bugref:9654 Nits and comment.

File:

• trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp (modified) (2 diffs)

trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp

@@ -5921 +5921 @@
 
     /* Capability Header. */
+    /* NOTE! Fields (e.g, EFR) must match what we expose in the ACPI tables. */
     PDMPciDevSetDWord(pPciDev, IOMMU_PCI_OFF_CAP_HDR,
                         RT_BF_MAKE(IOMMU_BF_CAPHDR_CAP_ID,    0xf)     /* RO - Secure Device capability block */
@@ -5942 +5943 @@
 
     /* Misc. Information Register 0. */
+    /* NOTE! Fields (e.g, GVA size) must match what we expose in the ACPI tables. */
     PDMPciDevSetDWord(pPciDev, IOMMU_PCI_OFF_MISCINFO_REG_0,
-                        RT_BF_MAKE(IOMMU_BF_MISCINFO_0_MSI_NUM,     0x0)    /* RO - MSI number */
-                      | RT_BF_MAKE(IOMMU_BF_MISCINFO_0_GVA_SIZE,    0x2)    /* RO - Guest Virt. Addr size (2=48 bits) */
-                      | RT_BF_MAKE(IOMMU_BF_MISCINFO_0_PA_SIZE,     0x30)   /* RO - Physical Addr size (48 bits) */
-                      | RT_BF_MAKE(IOMMU_BF_MISCINFO_0_VA_SIZE,     0x40)   /* RO - Virt. Addr size (64 bits) */
-                      | RT_BF_MAKE(IOMMU_BF_MISCINFO_0_HT_ATS_RESV, 0x0)    /* RW - HT ATS reserved */
-                      | RT_BF_MAKE(IOMMU_BF_MISCINFO_0_MSI_NUM_PPR, 0x0));  /* RW - PPR interrupt number */
+                        RT_BF_MAKE(IOMMU_BF_MISCINFO_0_MSI_NUM,      0)     /* RO - MSI number */
+                      | RT_BF_MAKE(IOMMU_BF_MISCINFO_0_GVA_SIZE,     2)     /* RO - Guest Virt. Addr size (2=48 bits) */
+                      | RT_BF_MAKE(IOMMU_BF_MISCINFO_0_PA_SIZE,     48)     /* RO - Physical Addr size (48 bits) */
+                      | RT_BF_MAKE(IOMMU_BF_MISCINFO_0_VA_SIZE,     64)     /* RO - Virt. Addr size (64 bits) */
+                      | RT_BF_MAKE(IOMMU_BF_MISCINFO_0_HT_ATS_RESV,  0)     /* RW - HT ATS reserved */
+                      | RT_BF_MAKE(IOMMU_BF_MISCINFO_0_MSI_NUM_PPR,  0));   /* RW - PPR interrupt number */
 
     /* Misc. Information Register 1. */