Changeset 85718 in vbox for trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg

Timestamp:

Aug 12, 2020 4:09:12 PM (5 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

139865

Message:

Devices/EFI: Merge edk-stable202005 and make it build, bugref:4643

Location:

trunk/src/VBox/Devices/EFI/FirmwareNew

Files:

• . (modified) (1 prop)
• PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c (modified) (6 diffs)
• PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf (modified) (1 diff)
• PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni (modified) (1 diff)
• PcAtChipsetPkg/Include/Library/IoApicLib.h (modified) (1 diff)
• PcAtChipsetPkg/Include/Register/Hpet.h (modified) (2 diffs)
• PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c (modified) (1 diff)
• PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c (modified) (1 diff)
• PcAtChipsetPkg/Library/ResetSystemLib/ResetSystemLib.c (modified) (1 diff)
• PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c (modified) (7 diffs)
• PcAtChipsetPkg/PcAtChipsetPkg.ci.yaml (added)
• PcAtChipsetPkg/PcAtChipsetPkg.dec (modified) (3 diffs)
• PcAtChipsetPkg/PcAtChipsetPkg.uni (modified) (1 diff)
• PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c (modified) (1 diff)
• PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h (modified) (3 diffs)
• PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c (modified) (1 diff)
• PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf (modified) (3 diffs)

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c

@@ -1 +1 @@
 /** @file
-  Timer Architectural Protocol module using High Precesion Event Timer (HPET)
+  Timer Architectural Protocol module using High Precision Event Timer (HPET)
 
   Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
@@ -247 +247 @@
   Write a 64-bit HPET register.
 
-  @param  Offset  Specifies the ofsfert of the HPET register to write.
+  @param  Offset  Specifies the offset of the HPET register to write.
   @param  Value   Specifies the value to write to the HPET register specified by Offset.
 
@@ -531 +531 @@
     //
 
-    if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
+    if (mTimerConfiguration.Bits.MsiInterruptCapability != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
       //
       // Disable HPET MSI interrupt generation
@@ -577 +577 @@
     // Enable HPET Timer interrupt generation
     //
-    if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
+    if (mTimerConfiguration.Bits.MsiInterruptCapability != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
       //
       // Program MSI Address and MSI Data values in the selected HPET Timer
@@ -835 +835 @@
     // Check to see if this HPET Timer supports MSI
     //
-    if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0) {
+    if (mTimerConfiguration.Bits.MsiInterruptCapability != 0) {
       //
       // Save the index of the first HPET Timer that supports MSI interrupts
@@ -960 +960 @@
   //
   DEBUG_CODE (
-    if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
+    if (mTimerConfiguration.Bits.MsiInterruptCapability != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
       DEBUG ((DEBUG_INFO, "HPET Interrupt Mode MSI\n"));
     } else {

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf

@@ -1 +1 @@
 ## @file
-# Timer Architectural Protocol module using High Precesion Event Timer (HPET).
+# Timer Architectural Protocol module using High Precision Event Timer (HPET).
 #
 # Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.uni

@@ -1 +1 @@
 // /** @file
-// Timer Architectural Protocol module using High Precesion Event Timer (HPET).
+// Timer Architectural Protocol module using High Precision Event Timer (HPET).
 //
 // Timer Architectural Protocol module using High Precision Event Timer (HPET).

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/Include/Library/IoApicLib.h

@@ -64 +64 @@
 
   Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical
-  mode to the Local APIC of the currntly executing CPU.  The default state of the
+  mode to the Local APIC of the currently executing CPU.  The default state of the
   entry is for the interrupt to be disabled (masked).  IoApicEnableInterrupts() must
   be used to enable(unmask) the I/O APIC Interrupt.

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/Include/Register/Hpet.h

@@ -71 +71 @@
     UINT32  InterruptEnable:1;
     UINT32  PeriodicInterruptEnable:1;
-    UINT32  PeriodicInterruptCapablity:1;
-    UINT32  CounterSizeCapablity:1;
+    UINT32  PeriodicInterruptCapability:1;
+    UINT32  CounterSizeCapability:1;
     UINT32  ValueSetEnable:1;
     UINT32  Reserved1:1;
@@ -78 +78 @@
     UINT32  InterruptRoute:5;
     UINT32  MsiInterruptEnable:1;
-    UINT32  MsiInterruptCapablity:1;
+    UINT32  MsiInterruptCapability:1;
     UINT32  Reserved2:16;
     UINT32  InterruptRouteCapability;

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/Library/AcpiTimerLib/AcpiTimerLib.c

@@ -60 +60 @@
   //
   // If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then
-  // no PCI register programming is required to enable access to the the ACPI registers
+  // no PCI register programming is required to enable access to the ACPI registers
   // specified by PcdAcpiIoPortBaseAddress
   //

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/Library/BaseIoApicLib/IoApicLib.c

@@ -95 +95 @@
 
   Configure an I/O APIC Redirection Table Entry to deliver an interrupt in physical
-  mode to the Local APIC of the currntly executing CPU.  The default state of the
+  mode to the Local APIC of the currently executing CPU.  The default state of the
   entry is for the interrupt to be disabled (masked).  IoApicEnableInterrupts() must
   be used to enable(unmask) the I/O APIC Interrupt.

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/Library/ResetSystemLib/ResetSystemLib.c

@@ -67 +67 @@
 
 /**
-  Calling this function causes the system to enter a power state for capsule
-  update.
-
-  Reset update should not return, if it returns, it means the system does
-  not support capsule update.
-
-**/
-VOID
-EFIAPI
-EnterS3WithImmediateWake (
-  VOID
-  )
-{
-  ASSERT (FALSE);
-}
-
-/**
   This function causes a systemwide reset. The exact type of the reset is
   defined by the EFI_GUID that follows the Null-terminated Unicode string passed

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/Library/SerialIoLib/SerialPortLib.c

@@ -59 +59 @@
 
   @retval RETURN_SUCCESS        The serial device was initialized.
-  @retval RETURN_DEVICE_ERROR   The serail device could not be initialized.
+  @retval RETURN_DEVICE_ERROR   The serial device could not be initialized.
 
 **/
@@ -140 +140 @@
   while ((NumberOfBytes--) != 0) {
     //
-    // Wait for the serail port to be ready.
+    // Wait for the serial port to be ready.
     //
     do {
@@ -181 +181 @@
   while ((NumberOfBytes--) != 0) {
     //
-    // Wait for the serail port to be ready.
+    // Wait for the serial port to be ready.
     //
     do {
@@ -196 +196 @@
   Polls a serial device to see if there is any data waiting to be read.
 
-  Polls aserial device to see if there is any data waiting to be read.
+  Polls a serial device to see if there is any data waiting to be read.
   If there is data waiting to be read from the serial device, then TRUE is returned.
   If there is no data waiting to be read from the serial device, then FALSE is returned.
@@ -340 +340 @@
 
 /**
-  Sets the baud rate, receive FIFO depth, transmit/receice time out, parity,
+  Sets the baud rate, receive FIFO depth, transmit/receive time out, parity,
   data bits, and stop bits on a serial device.
 
@@ -346 +346 @@
                             device's default interface speed.
                             On output, the value actually set.
-  @param ReveiveFifoDepth   The requested depth of the FIFO on the receive side of the
+  @param ReceiveFifoDepth   The requested depth of the FIFO on the receive side of the
                             serial interface. A ReceiveFifoDepth value of 0 will use
                             the device's default FIFO depth.
@@ -359 +359 @@
                             On output, the value actually set.
   @param DataBits           The number of data bits to use on the serial device. A DataBits
-                            vaule of 0 will use the device's default data bit setting.
+                            value of 0 will use the device's default data bit setting.
                             On output, the value actually set.
   @param StopBits           The number of stop bits to use on this serial device. A StopBits

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/PcAtChipsetPkg.dec

@@ -5 +5 @@
 # PcAt defacto standard.
 #
-# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
 # Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
 #
@@ -51 +51 @@
   gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A
 
-  ## This PCD specifies the defaut period of the HPET Timer in 100 ns units.
+  ## This PCD specifies the default period of the HPET Timer in 100 ns units.
   #  The default value of 100000 100 ns units is the same as 10 ms.
   # @Prompt Default period of HPET timer.
@@ -139 +139 @@
   gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister|0x71|UINT8|0x0000001F
 
+  ## RTC Update Timeout Value(microsecond).
+  # @Prompt RTC Update Timeout Value.
+  gPcAtChipsetPkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout|100000|UINT32|0x00000020
+
 [UserExtensions.TianoCore."ExtraFiles"]
   PcAtChipsetPkgExtra.uni

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/PcAtChipsetPkg.uni

@@ -116 +116 @@
 #string STR_gPcAtChipsetPkgTokenSpaceGuid_PcdRtcTargetRegister_PROMPT         #language en-US "RTC Target Register address"
 #string STR_gPcAtChipsetPkgTokenSpaceGuid_PcdRtcTargetRegister_HELP           #language en-US "Specifies RTC Target Register address in I/O space."
+
+#string STR_gPcAtChipsetPkgTokenSpaceGuid_PcdRealTimeClockUpdateTimeout_PROMPT #language en-US "RTC Update Timeout Value"
+#string STR_gPcAtChipsetPkgTokenSpaceGuid_PcdRealTimeClockUpdateTimeout_HELP   #language en-US "RTC Update Timeout Value(microsecond)."

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.c

@@ -1052 +1052 @@
 
 /**
-  Converts time from EFI_TIME format defined by UEFI spec to RTC's.
-
-  This function converts time from EFI_TIME format defined by UEFI spec to RTC's.
+  Converts time from EFI_TIME format defined by UEFI spec to RTC format.
+
+  This function converts time from EFI_TIME format defined by UEFI spec to RTC format.
   If data mode of RTC is BCD, then converts EFI_TIME to it.
   If RTC is in 12-hour format, then converts EFI_TIME to it.

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtc.h

@@ -111 +111 @@
   UINT8 Af : 1;       // Alarm Interrupt Flag
   UINT8 Pf : 1;       // Periodic Interrupt Flag
-  UINT8 Irqf : 1;     // Iterrupt Request Flag = PF & PIE | AF & AIE | UF & UIE
+  UINT8 Irqf : 1;     // Interrupt Request Flag = PF & PIE | AF & AIE | UF & UIE
 } RTC_REGISTER_C_BITS;
 
@@ -235 +235 @@
   The user Entry Point for PcRTC module.
 
-  This is the entrhy point for PcRTC module. It installs the UEFI runtime service
+  This is the entry point for PcRTC module. It installs the UEFI runtime service
   including GetTime(),SetTime(),GetWakeupTime(),and SetWakeupTime().
 
@@ -267 +267 @@
 
 /**
-  Converts time from EFI_TIME format defined by UEFI spec to RTC's.
-
-  This function converts time from EFI_TIME format defined by UEFI spec to RTC's.
+  Converts time from EFI_TIME format defined by UEFI spec to RTC format.
+
+  This function converts time from EFI_TIME format defined by UEFI spec to RTC format.
   If data mode of RTC is BCD, then converts EFI_TIME to it.
   If RTC is in 12-hour format, then converts EFI_TIME to it.

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c

@@ -109 +109 @@
   The user Entry Point for PcRTC module.
 
-  This is the entrhy point for PcRTC module. It installs the UEFI runtime service
+  This is the entry point for PcRTC module. It installs the UEFI runtime service
   including GetTime(),SetTime(),GetWakeupTime(),and SetWakeupTime().
 

trunk/src/VBox/Devices/EFI/FirmwareNew/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf

@@ -5 +5 @@
 # It will install a tagging protocol with gEfiRealTimeClockArchProtocolGuid.
 #
-# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
 # Copyright (c) 2017, AMD Inc. All rights reserved.<BR>
 #
@@ -34 +34 @@
 [Packages]
   MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
   PcAtChipsetPkg/PcAtChipsetPkg.dec
 
@@ -69 +68 @@
 
 [Pcd]
-  gEfiMdeModulePkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout  ## CONSUMES
+  gPcAtChipsetPkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout   ## CONSUMES
   gPcAtChipsetPkgTokenSpaceGuid.PcdMinimalValidYear             ## CONSUMES
   gPcAtChipsetPkgTokenSpaceGuid.PcdMaximalValidYear             ## CONSUMES