VirtualBox

Changeset 85819 in vbox for trunk/src/VBox/Devices/VirtIO


Ignore:
Timestamp:
Aug 18, 2020 12:58:30 PM (4 years ago)
Author:
vboxsync
Message:

Fix assert when guest uses raw PCI bus access to get 1, 2, 4 byte quantities in early boot

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/Devices/VirtIO/VirtioCore.cpp

    r85415 r85819  
    287287DECLINLINE(uint16_t) virtioCoreVirtqAvailBufCount_inline(PPDMDEVINS pDevIns, PVIRTIOCORE pVirtio, PVIRTQUEUE pVirtq)
    288288{
    289     uint16_t uIdx    = virtioReadAvailRingIdx(pDevIns, pVirtio, pVirtq);
    290     uint16_t uShadow = pVirtq->uAvailIdxShadow;
    291 
    292     uint16_t uDelta;
    293     if (uIdx < uShadow)
    294         uDelta = (uIdx + VIRTQ_MAX_ENTRIES) - uShadow;
    295     else
    296         uDelta = uIdx - uShadow;
     289    uint16_t uIdxActual = virtioReadAvailRingIdx(pDevIns, pVirtio, pVirtq);
     290    uint16_t uIdxShadow = pVirtq->uAvailIdxShadow;
     291    uint16_t uIdxDelta;
     292
     293    if (uIdxActual < uIdxShadow)
     294        uIdxDelta = (uIdxActual + VIRTQ_MAX_ENTRIES) - uIdxShadow;
     295    else
     296        uIdxDelta = uIdxActual - uIdxShadow;
    297297
    298298    LogFunc(("%s has %u %s (idx=%u shadow=%u)\n",
    299         pVirtq->szName, uDelta, uDelta == 1 ? "entry" : "entries",
    300         uIdx, uShadow));
    301 
    302     return uDelta;
     299        pVirtq->szName, uIdxDelta, uIdxDelta == 1 ? "entry" : "entries",
     300        uIdxActual, uIdxShadow));
     301
     302    return uIdxDelta;
    303303}
    304304/**
     
    763763    pVirtqBuf->uHeadIdx  = uHeadIdx;
    764764    pVirtqBuf->uVirtq    = uVirtq;
    765     *ppVirtqBuf = pVirtqBuf;
     765    *ppVirtqBuf          = pVirtqBuf;
    766766
    767767    /*
     
    14861486    RT_NOREF(pPciDev);
    14871487
    1488     Log7Func((" pDevIns=%p pPciDev=%p uAddress=%#x%s cb=%u pu32Value=%p\n",
    1489                  pDevIns, pPciDev, uAddress,  uAddress < 0x10 ? " " : "", cb, pu32Value));
    14901488    if (uAddress == pVirtio->uPciCfgDataOff)
    14911489    {
     
    14981496        uint32_t uLength = pPciCap->uLength;
    14991497
     1498        Log7Func((" pDevIns=%p pPciDev=%p uAddress=%#x%s cb=%u uLength=%d, bar=%d\n",
     1499                     pDevIns, pPciDev, uAddress,  uAddress < 0x10 ? " " : "", cb, uLength, pPciCap->uBar));
     1500
    15001501        if (  (uLength != 1 && uLength != 2 && uLength != 4)
    15011502            || cb != uLength
    15021503            || pPciCap->uBar != VIRTIO_REGION_PCI_CAP)
    15031504        {
    1504             ASSERT_GUEST_MSG_FAILED(("Guest read virtio_pci_cfg_cap.pci_cfg_data using mismatching config. Ignoring\n"));
     1505            ASSERT_GUEST_MSG_FAILED(("Guest read virtio_pci_cfg_cap.pci_cfg_data using mismatching config. "
     1506                                     "Ignoring\n"));
    15051507            *pu32Value = UINT32_MAX;
    15061508            return VINF_SUCCESS;
     
    15081510
    15091511        VBOXSTRICTRC rcStrict = virtioMmioRead(pDevIns, pVirtio, pPciCap->uOffset, pu32Value, cb);
    1510         Log7Func(("virtio: Guest read  virtio_pci_cfg_cap.pci_cfg_data, bar=%d, offset=%d, length=%d, result=%d -> %Rrc\n",
     1512        Log7Func((" Guest read virtio_pci_cfg_cap.pci_cfg_data, bar=%d, offset=%d, length=%d, result=0x%x -> %Rrc\n",
    15111513                   pPciCap->uBar, pPciCap->uOffset, uLength, *pu32Value, VBOXSTRICTRC_VAL(rcStrict)));
    15121514        return rcStrict;
    15131515    }
     1516    Log7Func((" pDevIns=%p pPciDev=%p uAddress=%#x%s cb=%u pu32Value=%p\n",
     1517                 pDevIns, pPciDev, uAddress,  uAddress < 0x10 ? " " : "", cb, pu32Value));
    15141518    return VINF_PDM_PCI_DO_DEFAULT;
    15151519}
     
    18601864    pCfg->uCapLen  = sizeof(VIRTIO_PCI_CFG_CAP_T);
    18611865    pCfg->uCapNext = (pVirtio->fMsiSupport || pVirtioCC->pbDevSpecificCfg) ? CFG_ADDR_2_IDX(pCfg) + pCfg->uCapLen : 0;
    1862     pCfg->uBar     = 0;
     1866    pCfg->uBar     = VIRTIO_REGION_PCI_CAP;
    18631867    pCfg->uOffset  = 0;
    1864     pCfg->uLength  = 0;
     1868    pCfg->uLength  = 4;
    18651869    cbRegion += pCfg->uLength;
    18661870    SET_PCI_CAP_LOC(pPciDev, pCfg, pVirtio->LocPciCfgCap, 1);
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