- Timestamp:
- Aug 31, 2020 11:42:54 PM (4 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/APICAll.cpp
r84652 r85964 21 21 *********************************************************************************************************************************/ 22 22 #define LOG_GROUP LOG_GROUP_DEV_APIC 23 #define VMCPU_INCL_CPUM_GST_CTX /* for macOS hack */ 23 24 #include "APICInternal.h" 24 25 #include <VBox/vmm/apic.h> … … 969 970 PX2APICPAGE pX2ApicPage = VMCPU_TO_X2APICPAGE(pVCpu); 970 971 uint32_t const fDest = XAPIC_IN_X2APIC_MODE(pVCpu) ? pX2ApicPage->icr_hi.u32IcrHi : pXApicPage->icr_hi.u.u8Dest; 972 Log5(("apicSendIpi: delivery=%u mode=%u init=%u trigger=%u short=%u vector=%#x fDest=%#x\n", 973 enmDeliveryMode, enmDestMode, enmInitLevel, enmTriggerMode, enmDestShorthand, uVector, fDest)); 971 974 972 975 #if XAPIC_HARDWARE_VERSION == XAPIC_HARDWARE_VERSION_P4 … … 1930 1933 { 1931 1934 STAM_COUNTER_INC(&pVCpu->apic.s.StatIdMsrRead); 1935 /* Horrible macOS hack (sample rdmsr addres: 0008:ffffff801686f21a). */ 1936 if ( !pApic->fMacOSWorkaround 1937 || pVCpu->cpum.GstCtx.cs.Sel != 8 1938 || pVCpu->cpum.GstCtx.rip < UINT64_C(0xffffff8000000000)) 1939 { /* likely */ } 1940 else 1941 { 1942 PCX2APICPAGE pX2ApicPage = VMCPU_TO_CX2APICPAGE(pVCpu); 1943 uint32_t const idApic = pX2ApicPage->id.u32ApicId; 1944 *pu64Value = (idApic << 24) | idApic; 1945 Log(("APIC: Applying macOS hack to MSR_IA32_X2APIC_ID: %#RX64\n", *pu64Value)); 1946 break; 1947 } 1932 1948 RT_FALL_THRU(); 1933 1949 } -
trunk/src/VBox/VMM/VMMR3/APIC.cpp
r84652 r85964 1414 1414 * Validate APIC settings. 1415 1415 */ 1416 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "Mode|IOAPIC|NumCPUs", ""); 1417 1416 PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "Mode|IOAPIC|NumCPUs|MacOSWorkaround", ""); 1417 1418 /** @devcfgm{apic, IOAPIC, bool, true} 1419 * Indicates whether an I/O APIC is present in the system. */ 1418 1420 int rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "IOAPIC", &pApic->fIoApicPresent, true); 1419 1421 AssertLogRelRCReturn(rc, rc); 1420 1422 1421 /* Max APIC feature level. */ 1423 /** @devcfgm{apic, Mode, PDMAPICMODE, APIC(2)} 1424 * Max APIC feature level. */ 1422 1425 uint8_t uMaxMode; 1423 1426 rc = pHlp->pfnCFGMQueryU8Def(pCfg, "Mode", &uMaxMode, PDMAPICMODE_APIC); … … 1434 1437 } 1435 1438 pApic->enmMaxMode = (PDMAPICMODE)uMaxMode; 1439 1440 /** @devcfgm{apic, MacOSWorkaround, bool, false} 1441 * Enables a workaround for incorrect MSR_IA32_X2APIC_ID handling in macOS. 1442 * 1443 * Vital code in osfmk/i386/i386_init.c's vstart() routine incorrectly applies a 1444 * 24 right shift to the ID register value (correct for legacy APIC, but 1445 * entirely wrong for x2APIC), with the consequence that all CPUs use the same 1446 * per-cpu data and things panic pretty quickly. There are some shifty ID 1447 * reads in lapic_native.c too, but they are for either harmless (assuming boot 1448 * CPU has ID 0) or are for logging/debugging purposes only. */ 1449 rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "MacOSWorkaround", &pApic->fMacOSWorkaround, false); 1450 AssertLogRelRCReturn(rc, rc); 1436 1451 1437 1452 /* -
trunk/src/VBox/VMM/include/APICInternal.h
r84652 r85964 940 940 /** Whether Hyper-V x2APIC compatibility mode is enabled. */ 941 941 bool fHyperVCompatMode; 942 /** Alignment padding. */ 943 bool afAlignment[1]; 942 /** Enable horrible macOS workaround where the ID register has the value 943 * shifted up 24 bits to be compatible with buggy code in 944 * i386_init.c/vstart(). Only applied if we're in typical macOS 64-bit 945 * kernel load area and macOS kernel selector value (8), as we must not ever 946 * apply this to the EFI code. */ 947 bool fMacOSWorkaround; 944 948 /** The max supported APIC mode from CFGM. */ 945 949 PDMAPICMODE enmMaxMode;
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