Index: trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp
===================================================================
--- trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp	(revision 86014)
+++ trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp	(revision 86031)
@@ -1981,4 +1981,6 @@
     RTGCPHYS const GCPhysDte    = GCPhysDevTab + offDte;
 
+    LogFlowFunc(("idxSegsEn=%#x GCPhysDevTab=%#RGp offDte=%#x GCPhysDte=%#RGp\n", idxSegsEn, GCPhysDevTab, offDte, GCPhysDte));
+
     Assert(!(GCPhysDevTab & X86_PAGE_4K_OFFSET_MASK));
     int rc = PDMDevHlpPCIPhysRead(pDevIns, GCPhysDte, pDte, sizeof(*pDte));
@@ -2066,5 +2068,5 @@
          *        raising an ILLEGAL_DEV_TABLE_ENTRY event or an IO_PAGE_FAULT event here.
          *        I'm just going with I/O page fault. */
-        LogFunc(("Invalid root page table level %#x -> IOPF", uMaxLevel));
+        LogFunc(("Invalid root page table level %#x -> IOPF\n", uMaxLevel));
         EVT_IO_PAGE_FAULT_T EvtIoPageFault;
         iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
@@ -2081,5 +2083,5 @@
     else
     {
-        LogFunc(("Permission denied (fAccess=%#x fRootPtePerm=%#x) -> IOPF", fAccess, fRootPtePerm));
+        LogFunc(("Permission denied (fAccess=%#x fRootPtePerm=%#x) -> IOPF\n", fAccess, fRootPtePerm));
         EVT_IO_PAGE_FAULT_T EvtIoPageFault;
         iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
@@ -2153,5 +2155,5 @@
         else
         {
-            LogFunc(("Page table entry permission denied (fAccess=%#x fPtePerm=%#x) -> IOPF", fAccess, fPtePerm));
+            LogFunc(("Page table entry permission denied (fAccess=%#x fPtePerm=%#x) -> IOPF\n", fAccess, fPtePerm));
             EVT_IO_PAGE_FAULT_T EvtIoPageFault;
             iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
@@ -2190,5 +2192,5 @@
             }
 
-            LogFunc(("Page size invalid cShift=%#x -> IOPF", cShift));
+            LogFunc(("Page size invalid cShift=%#x -> IOPF\n", cShift));
             EVT_IO_PAGE_FAULT_T EvtIoPageFault;
             iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
@@ -2205,5 +2207,5 @@
         else
         {
-            LogFunc(("Next level of PDE invalid uNextLevel=%#x -> IOPF", uNextLevel));
+            LogFunc(("Next level of PDE invalid uNextLevel=%#x -> IOPF\n", uNextLevel));
             EVT_IO_PAGE_FAULT_T EvtIoPageFault;
             iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
@@ -2222,5 +2224,5 @@
         else
         {
-            LogFunc(("Next level (%#x) must be less than the current level (%#x) -> IOPF", uNextLevel, uLevel));
+            LogFunc(("Next level (%#x) must be less than the current level (%#x) -> IOPF\n", uNextLevel, uLevel));
             EVT_IO_PAGE_FAULT_T EvtIoPageFault;
             iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
@@ -2240,5 +2242,5 @@
         else
         {
-            LogFunc(("IOVA of skipped levels are not zero %#RX64 (SkipMask=%#RX64) -> IOPF", uIova, uIovaSkipMask));
+            LogFunc(("IOVA of skipped levels are not zero %#RX64 (SkipMask=%#RX64) -> IOPF\n", uIova, uIovaSkipMask));
             EVT_IO_PAGE_FAULT_T EvtIoPageFault;
             iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, uIova, true /* fPresent */, false /* fRsvdNotZero */,
@@ -2533,5 +2535,5 @@
                 }
 
-                LogFunc(("Interrupt type (%#x) invalid -> IOPF", Irte.n.u3IntrType));
+                LogFunc(("Interrupt type (%#x) invalid -> IOPF\n", Irte.n.u3IntrType));
                 EVT_IO_PAGE_FAULT_T EvtIoPageFault;
                 iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable,
@@ -2541,5 +2543,5 @@
             }
 
-            LogFunc(("Guest mode not supported -> IOPF"));
+            LogFunc(("Guest mode not supported -> IOPF\n"));
             EVT_IO_PAGE_FAULT_T EvtIoPageFault;
             iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable,
@@ -2549,5 +2551,5 @@
         }
 
-        LogFunc(("Remapping disabled -> IOPF"));
+        LogFunc(("Remapping disabled -> IOPF\n"));
         EVT_IO_PAGE_FAULT_T EvtIoPageFault;
         iommuAmdInitIoPageFaultEvent(uDevId, pDte->n.u16DomainId, pMsiIn->Addr.u64, Irte.n.u1RemapEnable,
@@ -2576,4 +2578,6 @@
 {
     /* Read the device table entry from memory. */
+    LogFlowFunc(("uDevId=%#x enmOp=%u\n", uDevId, enmOp));
+
     DTE_T Dte;
     int rc = iommuAmdReadDte(pDevIns, uDevId, enmOp, &Dte);
@@ -2673,5 +2677,5 @@
                         Assert(uIntrCtrl == IOMMU_INTR_CTRL_RSVD);
 
-                        LogFunc(("IntCtl mode invalid %#x -> Illegal DTE", uIntrCtrl));
+                        LogFunc(("IntCtl mode invalid %#x -> Illegal DTE\n", uIntrCtrl));
 
                         EVT_ILLEGAL_DTE_T Event;
@@ -2688,5 +2692,5 @@
                     default:
                     {
-                        LogFunc(("MSI data delivery mode invalid %#x -> Target abort", u8DeliveryMode));
+                        LogFunc(("MSI data delivery mode invalid %#x -> Target abort\n", u8DeliveryMode));
                         iommuAmdSetPciTargetAbort(pDevIns);
                         return VERR_IOMMU_INTR_REMAP_FAILED;
@@ -2705,5 +2709,5 @@
             else
             {
-                LogFunc(("MSI address region invalid %#RX64.", pMsiIn->Addr.u64));
+                LogFunc(("MSI address region invalid %#RX64\n", pMsiIn->Addr.u64));
                 return VERR_IOMMU_INTR_REMAP_FAILED;
             }
@@ -2712,4 +2716,5 @@
         {
             /** @todo IOMMU: Add to interrupt remapping cache. */
+            LogFlowFunc(("DTE interrupt map not valid\n"));
             *pMsiOut = *pMsiIn;
             return VINF_SUCCESS;
