Changeset 86487 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Oct 8, 2020 8:17:31 AM (4 years ago)

Author:

vboxsync

Message:

VMM/PGM: Working on eliminating page table bitfield use (PAE PTEs). bugref:9841 bugref:9746

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• PGMAllBth.h (modified) (10 diffs)
• PGMAllGst.h (modified) (1 diff)
• PGMAllPool.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMAll/PGMAllBth.h

@@ -1576 +1576 @@
 
 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE)
-    if (   PteSrc.n.u1Present
+    if (   (PteSrc.u & X86_PTE_P)
         && GST_IS_PTE_VALID(pVCpu, PteSrc))
 # endif
@@ -1606 +1606 @@
                 &&  (   PGM_PAGE_IS_ZERO(pPage)
 #  if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE)
-                     || (   PteSrc.n.u1Write
+                     || (   (PteSrc.u & X86_PTE_RW)
 #  else
                      || (   1
@@ -1713 +1713 @@
              */
 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE)
-            if (!PteSrc.n.u1Global)
+            if (!(PteSrc.u & X86_PTE_G))
                 pShwPage->fSeenNonGlobal = true;
 # endif
@@ -1724 +1724 @@
     }
 # if PGM_WITH_PAGING(PGM_GST_TYPE, PGM_SHW_TYPE)
-    else if (!PteSrc.n.u1Present)
+    else if (!(PteSrc.u & X86_PTE_P))
         Log2(("SyncPageWorker: page not present in Pte\n"));
     else
@@ -1927 +1927 @@
                             const PGSTPTE pPteSrc = &pPTSrc->a[offPTSrc + iPTDst];
 
-                            if (   pPteSrc->n.u1Present
+                            if (   (pPteSrc->u & X86_PTE_P)
                                 && !SHW_PTE_IS_P(pPTDst->a[iPTDst]))
                             {
@@ -2382 +2382 @@
                     STAM_COUNTER_INC(&pVCpu->pgm.s.CTX_SUFF(pStats)->CTX_MID_Z(Stat,DirtyPageTrap));
 
-                    Assert(PteSrc.n.u1Write);
+                    Assert(PteSrc.u & X86_PTE_RW);
 
                     /* Note: No need to invalidate this entry on other VCPUs as a stale TLB
@@ -2734 +2734 @@
                     const unsigned iPTSrc = iPTDst + offPTSrc;
                     const GSTPTE   PteSrc = pPTSrc->a[iPTSrc];
-
-                    if (PteSrc.n.u1Present)
+                    if (PteSrc.u & X86_PTE_P)
                     {
                         PGM_BTH_NAME(SyncPageWorker)(pVCpu, &pPTDst->a[iPTDst], PdeSrc, PteSrc, pShwPage, iPTDst);
@@ -3918 +3917 @@
 
                             const GSTPTE PteSrc = pPTSrc->a[iPT + offPTSrc];
-                            if (!PteSrc.n.u1Present)
+                            if (!(PteSrc.u & X86_PTE_P))
                             {
 #  ifdef IN_RING3
@@ -4023 +4022 @@
                             else
                             {
-                                if (!PteSrc.n.u1Dirty && PteSrc.n.u1Write)
+                                if ((PteSrc.u & (X86_PTE_RW | X86_PTE_D)) == X86_PTE_RW)
                                 {
                                     if (SHW_PTE_IS_RW(PteDst))
@@ -4060 +4059 @@
                                 {
                                     /* access bit emulation (not implemented). */
-                                    if (PteSrc.n.u1Accessed || SHW_PTE_IS_P(PteDst))
+                                    if ((PteSrc.u & X86_PTE_A) || SHW_PTE_IS_P(PteDst))
                                     {
                                         AssertMsgFailed(("PGM_PTFLAGS_TRACK_DIRTY set at %RGv but no accessed bit emulation! PteSrc=%#RX64 PteDst=%#RX64\n",

trunk/src/VBox/VMM/VMMAll/PGMAllGst.h

@@ -266 +266 @@
         pWalk->Pte.u = Pte.u = pPte->u;
 
-        if (Pte.n.u1Present) { /* probable */ }
+        if (Pte.u & X86_PTE_P) { /* probable */ }
         else return PGM_GST_NAME(WalkReturnNotPresent)(pVCpu, pWalk, 1);
 

trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

@@ -1532 +1532 @@
          * it's fairly safe to assume the guest is reusing the PT.
          */
-        if (    fAllowRemoval
-            &&  pGstPT->a[i].n.u1Present)
+        if (   fAllowRemoval
+            && (pGstPT->a[i].u & X86_PTE_P))
         {
             if (!PGMPhysIsGCPhysValid(pPool->CTX_SUFF(pVM), pGstPT->a[i].u & X86_PTE_PAE_PG_MASK))
@@ -3289 +3289 @@
             if ((PGMSHWPTEPAE_GET_U(pPT->a[iPte]) & (X86_PTE_PAE_PG_MASK | X86_PTE_P | X86_PTE_PAE_MBZ_MASK_NX)) == u64)
             {
+                Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX64\n", iPte, PGMSHWPTEPAE_GET_LOG(pPT->a[iPte])));
                 X86PTEPAE Pte;
-
-                Log4(("pgmPoolTrackFlushGCPhysPTs: i=%d pte=%RX64\n", iPte, PGMSHWPTEPAE_GET_LOG(pPT->a[iPte])));
                 Pte.u = (PGMSHWPTEPAE_GET_U(pPT->a[iPte]) & u64AndMask) | u64OrMask;
                 if (Pte.u & PGM_PTFLAGS_TRACK_DIRTY)
-                    Pte.n.u1Write = 0;    /* need to disallow writes when dirty bit tracking is still active. */
+                    Pte.u &= ~(X86PGPAEUINT)X86_PTE_RW;    /* need to disallow writes when dirty bit tracking is still active. */
 
                 PGMSHWPTEPAE_ATOMIC_SET(pPT->a[iPte], Pte.u);