- Timestamp:
- Nov 11, 2020 4:44:15 PM (4 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp
r86834 r86863 3463 3463 } 3464 3464 3465 /* Paranoia. */ 3466 Assert(uIntrCtrl == IOMMU_INTR_CTRL_RSVD); 3467 3465 Assert(uIntrCtrl == IOMMU_INTR_CTRL_RSVD); /* Paranoia. */ 3468 3466 LogFunc(("IntCtl mode invalid %#x -> Illegal DTE\n", uIntrCtrl)); 3469 3467 EVT_ILLEGAL_DTE_T Event; … … 3486 3484 } 3487 3485 3488 if (fPassThru) 3486 /* 3487 * For those other than fixed and arbitrated interrupts, destination mode must be 0 (physical). 3488 * See AMD IOMMU spec. The note below Table 19: "IOMMU Controls and Actions for Upstream Interrupts". 3489 */ 3490 if ( u8DeliveryMode <= VBOX_MSI_DELIVERY_MODE_LOWEST_PRIO 3491 || !pMsiIn->Addr.n.u1DestMode) 3489 3492 { 3490 *pMsiOut = *pMsiIn; 3491 return VINF_SUCCESS; 3493 if (fPassThru) 3494 { 3495 *pMsiOut = *pMsiIn; 3496 return VINF_SUCCESS; 3497 } 3498 LogFunc(("Remapping/passthru disallowed for interrupt %#x -> Target abort\n", pMsiIn->Data.n.u8Vector)); 3492 3499 } 3493 3494 LogFunc(("Remapping/passthru disallowed for interrupt (%#x) -> Target abort\n", pMsiIn->Data.n.u8Vector)); 3500 else 3501 LogFunc(("Logical destination mode invalid for delivery mode %#x\n -> Target abort\n", u8DeliveryMode)); 3502 3495 3503 iommuAmdSetPciTargetAbort(pDevIns); 3496 3504 return VERR_IOMMU_INTR_REMAP_DENIED;
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