Index: trunk/include/iprt/asm.h
===================================================================
--- trunk/include/iprt/asm.h	(revision 87178)
+++ trunk/include/iprt/asm.h	(revision 87181)
@@ -182,4 +182,200 @@
 #endif
 
+/*
+ * ARM is great fun.
+ */
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+
+# define RTASM_ARM_NO_BARRIER
+# ifdef RT_ARCH_ARM64
+#  define RTASM_ARM_NO_BARRIER_IN_REG
+#  define RTASM_ARM_NO_BARRIER_COMMA_IN_REG
+#  define RTASM_ARM_DSB_SY              "dsb    sy\n\t"
+#  define RTASM_ARM_DSB_SY_IN_REG
+#  define RTASM_ARM_DSB_SY_COMMA_IN_REG
+#  define RTASM_ARM_DMB_SY              "dmb    sy\n\t"
+#  define RTASM_ARM_DMB_SY_IN_REG
+#  define RTASM_ARM_DMB_SY_COMMA_IN_REG
+#  define RTASM_ARM_DMB_ST              "dmb    st\n\t"
+#  define RTASM_ARM_DMB_ST_IN_REG
+#  define RTASM_ARM_DMB_ST_COMMA_IN_REG
+#  define RTASM_ARM_DMB_LD              "dmb    ld\n\t"
+#  define RTASM_ARM_DMB_LD_IN_REG
+#  define RTASM_ARM_DMB_LD_COMMA_IN_REG
+#  define RTASM_ARM_PICK_6432(expr64, expr32) expr64
+#  define RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_32(name, a_pu32Mem, barrier_type, modify64, modify32, in_reg) \
+    uint32_t rcSpill; \
+    uint32_t u32NewRet; \
+    __asm__ __volatile__(".Ltry_again_" #name "_%=:\n\t" \
+                         RTASM_ARM_##barrier_type /* before lable? */ \
+                         "ldaxr     %w[uNew], %[pMem]\n\t" \
+                         modify64 \
+                         "stlxr     %w[rc], %w[uNew], %[pMem]\n\t" \
+                         "cbnz      %w[rc], .Ltry_again_" #name "_%=\n\t" \
+                         : [pMem] "+m"  (*a_pu32Mem) \
+                         , [uNew] "=&r" (u32NewRet) \
+                         , [rc]   "=&r" (rcSpill) \
+                         : in_reg \
+                         : "cc")
+#  define RTASM_ARM_LOAD_MODIFY_STORE_RET_OLD_32(name, a_pu32Mem, barrier_type, modify64, modify32, in_reg) \
+    uint32_t rcSpill; \
+    uint32_t u32OldRet; \
+    uint32_t u32NewSpill; \
+    __asm__ __volatile__(".Ltry_again_" #name "_%=:\n\t" \
+                         RTASM_ARM_##barrier_type /* before lable? */ \
+                         "ldaxr     %w[uOld], %[pMem]\n\t" \
+                         modify64 \
+                         "stlxr     %w[rc], %w[uNew], %[pMem]\n\t" \
+                         "cbnz      %w[rc], .Ltry_again_" #name "_%=\n\t" \
+                         : [pMem] "+m"  (*a_pu32Mem) \
+                         , [uOld] "=&r" (u32OldRet) \
+                         , [uNew] "=&r" (u32NewSpill) \
+                         , [rc]   "=&r" (rcSpill) \
+                         : in_reg \
+                         : "cc")
+#  define RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_64(name, a_pu64Mem, barrier_type, modify64, modify32, in_reg) \
+    uint32_t rcSpill; \
+    uint64_t u64NewRet; \
+    __asm__ __volatile__(".Ltry_again_" #name "_%=:\n\t" \
+                         RTASM_ARM_##barrier_type /* before lable? */ \
+                         "ldaxr     %[uNew], %[pMem]\n\t" \
+                         modify64 \
+                         "stlxr     %w[rc], %[uNew], %[pMem]\n\t" \
+                         "cbnz      %w[rc], .Ltry_again_" #name "_%=\n\t" \
+                         : [pMem] "+m"  (*a_pu64Mem) \
+                         , [uNew] "=&r" (u64NewRet) \
+                         , [rc]   "=&r" (rcSpill) \
+                         : in_reg \
+                         : "cc")
+#  define RTASM_ARM_LOAD_MODIFY_STORE_RET_OLD_64(name, a_pu64Mem, barrier_type, modify64, modify32, in_reg) \
+    uint32_t rcSpill; \
+    uint64_t u64OldRet; \
+    uint64_t u64NewSpill; \
+    __asm__ __volatile__(".Ltry_again_" #name "_%=:\n\t" \
+                         RTASM_ARM_##barrier_type /* before lable? */ \
+                         "ldaxr     %[uOld], %[pMem]\n\t" \
+                         modify64 \
+                         "stlxr     %w[rc], %[uNew], %[pMem]\n\t" \
+                         "cbnz      %w[rc], .Ltry_again_" #name "_%=\n\t" \
+                         : [pMem] "+m"  (*a_pu64Mem) \
+                         , [uOld] "=&r" (u64OldRet) \
+                         , [uNew] "=&r" (u64NewSpill) \
+                         , [rc]   "=&r" (rcSpill) \
+                         : in_reg \
+                         : "cc")
+
+# else /* RT_ARCH_ARM32 */
+#  define RTASM_ARM_PICK_6432(expr64, expr32) expr32
+#  if RT_ARCH_ARM32 >= 7
+#   warning armv7
+#   define RTASM_ARM_NO_BARRIER_IN_REG
+#   define RTASM_ARM_NO_BARRIER_COMMA_IN_REG
+#   define RTASM_ARM_DSB_SY             "dsb    sy\n\t"
+#   define RTASM_ARM_DSB_SY_IN_REG      "X" (0xfade)
+#   define RTASM_ARM_DMB_SY             "dmb    sy\n\t"
+#   define RTASM_ARM_DMB_SY_IN_REG      "X" (0xfade)
+#   define RTASM_ARM_DMB_ST             "dmb    st\n\t"
+#   define RTASM_ARM_DMB_ST_IN_REG      "X" (0xfade)
+#   define RTASM_ARM_DMB_LD             "dmb    ld\n\t"
+#   define RTASM_ARM_DMB_LD_IN_REG      "X" (0xfade)
+
+#  elif RT_ARCH_ARM32 >= 6
+#   warning armv6
+#   define RTASM_ARM_DSB_SY             "mcr p15, 0, %[uZero], c7, c10, 4\n\t"
+#   define RTASM_ARM_DSB_SY_IN_REG      [uZero] "r" (0)
+#   define RTASM_ARM_DMB_SY             "mcr p15, 0, %[uZero], c7, c10, 5\n\t"
+#   define RTASM_ARM_DMB_SY_IN_REG      [uZero] "r" (0)
+#   define RTASM_ARM_DMB_ST             RTASM_ARM_DMB_SY
+#   define RTASM_ARM_DMB_ST_IN_REG      RTASM_ARM_DMB_SY_IN_REG
+#   define RTASM_ARM_DMB_LD             RTASM_ARM_DMB_SY
+#   define RTASM_ARM_DMB_LD_IN_REG      RTASM_ARM_DMB_SY_IN_REG
+#  elif RT_ARCH_ARM32 >= 4
+#   warning armv5 or older
+#   define RTASM_ARM_DSB_SY             "mcr p15, 0, %[uZero], c7, c10, 4\n\t"
+#   define RTASM_ARM_DSB_SY_IN_REG      [uZero] "r" (0)
+#   define RTASM_ARM_DMB_SY             RTASM_ARM_DSB_SY
+#   define RTASM_ARM_DMB_SY_IN_REG      RTASM_ARM_DSB_SY_IN_REG
+#   define RTASM_ARM_DMB_ST             RTASM_ARM_DSB_SY
+#   define RTASM_ARM_DMB_ST_IN_REG      RTASM_ARM_DSB_SY_IN_REG
+#   define RTASM_ARM_DMB_LD             RTASM_ARM_DSB_SY
+#   define RTASM_ARM_DMB_LD_IN_REG      RTASM_ARM_DSB_SY_IN_REG
+#  else
+#   error "huh? Odd RT_ARCH_ARM32 value!"
+#  endif
+#  define RTASM_ARM_DSB_SY_COMMA_IN_REG , RTASM_ARM_DSB_SY_IN_REG
+#  define RTASM_ARM_DMB_SY_COMMA_IN_REG , RTASM_ARM_DMB_SY_IN_REG
+#  define RTASM_ARM_DMB_ST_COMMA_IN_REG , RTASM_ARM_DMB_ST_IN_REG
+#  define RTASM_ARM_DMB_LD_COMMA_IN_REG , RTASM_ARM_DMB_LD_IN_REG
+#  define RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_32(name, a_pu32Mem, barrier_type, modify64, modify32, in_reg) \
+    uint32_t rcSpill; \
+    uint32_t u32NewRet; \
+    __asm__ __volatile__(".Ltry_again_" #name "_%=:\n\t" \
+                         RT_CONCAT(RTASM_ARM_,barrier_type) /* before lable? */ \
+                         "ldrex     %[uNew], %[pMem]\n\t" \
+                         modify32 \
+                         "strex     %[rc], %[uNew], %[pMem]\n\t" \
+                         "cmp       %[rc], #0\n\t" \
+                         "bne       .Ltry_again_" #name "_%=\n\t" \
+                         : [pMem] "+m"  (*a_pu32Mem) \
+                         , [uNew] "=&r" (u32NewRet) \
+                         , [rc]   "=&r" (rcSpill) \
+                         : RT_CONCAT3(RTASM_ARM_,barrier_type,_IN_REG) \
+                         , in_reg \
+                         : "cc")
+#  define RTASM_ARM_LOAD_MODIFY_STORE_RET_OLD_32(name, a_pu32Mem, barrier_type, modify64, modify32, in_reg) \
+    uint32_t rcSpill; \
+    uint32_t u32OldRet; \
+    uint32_t u32NewSpill; \
+    __asm__ __volatile__(".Ltry_again_" #name "_%=:\n\t" \
+                         RT_CONCAT(RTASM_ARM_,barrier_type) /* before lable? */ \
+                         "ldrex     %[uOld], %[pMem]\n\t" \
+                         modify32 \
+                         "strex     %[rc], %[uNew], %[pMem]\n\t" \
+                         "cmp       %[rc], #0\n\t" \
+                         "bne       .Ltry_again_" #name "_%=\n\t" \
+                         : [pMem] "+m"  (*a_pu32Mem) \
+                         , [uOld] "=&r" (u32OldRet) \
+                         , [uNew] "=&r" (u32NewSpill) \
+                         , [rc]   "=&r" (rcSpill) \
+                         : RT_CONCAT3(RTASM_ARM_,barrier_type,_IN_REG) \
+                         , in_reg \
+                         : "cc")
+#  define RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_64(name, a_pu64Mem, barrier_type, modify64, modify32, in_reg) \
+    uint32_t rcSpill; \
+    uint64_t u64NewRet; \
+    __asm__ __volatile__(".Ltry_again_" #name "_%=:\n\t" \
+                         RT_CONCAT(RTASM_ARM_,barrier_type) /* before lable? */ \
+                         "ldrexd    %[uNew], %H[uNew], %[pMem]\n\t" \
+                         modify32 \
+                         "strexd    %[rc], %[uNew], %H[uNew], %[pMem]\n\t" \
+                         "cmp       %[rc], #0\n\t" \
+                         "bne       .Ltry_again_" #name "_%=\n\t" \
+                         : [pMem] "+m"  (*a_pu64Mem), \
+                           [uNew] "=&r" (u64NewRet), \
+                           [rc]   "=&r" (rcSpill) \
+                         : RT_CONCAT3(RTASM_ARM_,barrier_type,_IN_REG) \
+                         , in_reg \
+                         : "cc")
+#  define RTASM_ARM_LOAD_MODIFY_STORE_RET_OLD_64(name, a_pu64Mem, barrier_type, modify64, modify32, in_reg) \
+    uint32_t rcSpill; \
+    uint64_t u64OldRet; \
+    uint64_t u64NewSpill; \
+    __asm__ __volatile__(".Ltry_again_" #name "_%=:\n\t" \
+                         RT_CONCAT(RTASM_ARM_,barrier_type) /* before lable? */ \
+                         "ldrexd    %[uOld], %H[uOld], %[pMem]\n\t" \
+                         modify32 \
+                         "strexd    %[rc], %[uNew], %H[uNew], %[pMem]\n\t" \
+                         "cmp       %[rc], #0\n\t" \
+                         "bne       .Ltry_again_" #name "_%=\n\t" \
+                         : [pMem] "+m"  (*a_pu64Mem), \
+                           [uOld] "=&r" (u64OldRet), \
+                           [uNew] "=&r" (u64NewSpill), \
+                           [rc]   "=&r" (rcSpill) \
+                         : RT_CONCAT3(RTASM_ARM_,barrier_type,_IN_REG) \
+                         , in_reg \
+                         : "cc")
+# endif /* RT_ARCH_ARM32 */
+#endif
+
 
 /** @def ASMReturnAddress
@@ -309,21 +505,21 @@
     uint32_t rcSpill;
     __asm__ __volatile__(".Ltry_again_ASMAtomicXchgU8_%=:\n\t"
-                         "dmb       sy\n\t"
+                         RTASM_ARM_DMB_SY
 #  if defined(RT_ARCH_ARM64)
-                         "ldaxrb    %w0, [%3]\n\t"
-                         "stlxrb    %w1, %w2, [%3]\n\t"
-                         "cbnz      %w1, .Ltry_again_ASMAtomicXchgU8_%=\n\t"
-#  else
-                         "ldrexb    %0, [%3]\n\t"      /* ARMv6+ */
-                         "strexb    %1, %2, [%3]\n\t"
-                         "cmp       %1, #0\n\t"
+                         "ldaxrb    %w[uOld], %[pMem]\n\t"
+                         "stlxrb    %w[rc], %w[uNew], %[pMem]\n\t"
+                         "cbnz      %w[rc], .Ltry_again_ASMAtomicXchgU8_%=\n\t"
+#  else
+                         "ldrexb    %[uOld], %[pMem]\n\t"      /* ARMv6+ */
+                         "strexb    %[rc], %[uNew], %[pMem]\n\t"
+                         "cmp       %[rc], #0\n\t"
                          "bne       .Ltry_again_ASMAtomicXchgU8_%=\n\t"
 #  endif
-                         : "=&r" (uOld),
-                           "=&r" (rcSpill)
-                         : "r" ((uint32_t)u8),
-                           "r" (pu8)
-                         : "memory",
-                           "cc");
+                         : [pMem] "+m" (*pu8)
+                         , [uOld] "=&r" (uOld)
+                         , [rc]   "=&r" (rcSpill)
+                         : [uNew] "r" ((uint32_t)u8)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG
+                         : "cc");
     return (uint8_t)uOld;
 
@@ -406,21 +602,21 @@
     uint32_t rcSpill;
     __asm__ __volatile__(".Ltry_again_ASMAtomicXchgU16_%=:\n\t"
-                         "dmb       sy\n\t"
+                         RTASM_ARM_DMB_SY
 #  if defined(RT_ARCH_ARM64)
-                         "ldaxrh    %w0, [%3]\n\t"
-                         "stlxrh    %w1, %w2, [%3]\n\t"
-                         "cbnz      %w1, .Ltry_again_ASMAtomicXchgU16_%=\n\t"
-#  else
-                         "ldrexh    %0, [%3]\n\t"      /* ARMv6+ */
-                         "strexh    %1, %2, [%3]\n\t"
-                         "cmp       %1, #0\n\t"
+                         "ldaxrh    %w[uOld], %[pMem]\n\t"
+                         "stlxrh    %w[rc], %w[uNew], %[pMem]\n\t"
+                         "cbnz      %w[rc], .Ltry_again_ASMAtomicXchgU16_%=\n\t"
+#  else
+                         "ldrexh    %[uOld], %[pMem]\n\t"      /* ARMv6+ */
+                         "strexh    %[rc], %[uNew], %[pMem]\n\t"
+                         "cmp       %[rc], #0\n\t"
                          "bne       .Ltry_again_ASMAtomicXchgU16_%=\n\t"
 #  endif
-                         : "=&r" (uOld),
-                           "=&r" (rcSpill)
-                         : "r" ((uint32_t)u16),
-                           "r" (pu16)
-                         : "memory",
-                           "cc");
+                         : [pMem] "+m" (*pu16)
+                         , [uOld] "=&r" (uOld)
+                         , [rc]   "=&r" (rcSpill)
+                         : [uNew] "r" ((uint32_t)u16)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG
+                         : "cc");
     return (uint16_t)uOld;
 
@@ -462,5 +658,5 @@
 #  if RT_INLINE_ASM_GNU_STYLE
     __asm__ __volatile__("xchgl %0, %1\n\t"
-                         : "=m" (*pu32)
+                         : "=m" (*pu32) /** @todo r=bird: +m rather than =m here? */
                          , "=r" (u32)
                          : "1" (u32)
@@ -492,22 +688,22 @@
     uint32_t rcSpill;
     __asm__ __volatile__(".Ltry_again_ASMAtomicXchgU32_%=:\n\t"
-                         "dmb       sy\n\t"
+                         RTASM_ARM_DMB_SY
 #  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %w0, [%3]\n\t"
-                         "stlxr     %w1, %w2, [%3]\n\t"
-                         "cbnz      %w1, .Ltry_again_ASMAtomicXchgU32_%=\n\t"
-#  else
-                         "ldrex     %0, [%3]\n\t"      /* ARMv6+ */
-                         "strex     %1, %2, [%3]\n\t"
-                         "cmp       %1, #0\n\t"
+                         "ldaxr     %w[uOld], %[pMem]\n\t"
+                         "stlxr     %w[rc], %w[uNew], %[pMem]\n\t"
+                         "cbnz      %w[rc], .Ltry_again_ASMAtomicXchgU32_%=\n\t"
+#  else
+                         "ldrex     %[uOld], %[pMem]\n\t"      /* ARMv6+ */
+                         "strex     %[rc], %[uNew], %[pMem]\n\t"
+                         "cmp       %[rc], #0\n\t"
                          "bne       .Ltry_again_ASMAtomicXchgU32_%=\n\t"
 #  endif
-                         : "=&r" (uOld),
-                           "=&r" (rcSpill)
-                         : "r" ((uint32_t)u32),
-                           "r" (pu32)
-                         : "memory",
-                           "cc");
-    return (uint32_t)uOld;
+                         : [pMem] "+m"  (*pu32)
+                         , [uOld] "=&r" (uOld)
+                         , [rc]   "=&r" (rcSpill)
+                         : [uNew] "r"   (u32)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG
+                         : "cc");
+    return uOld;
 
 # else
@@ -548,5 +744,5 @@
 # if defined(RT_ARCH_AMD64)
 #  if RT_INLINE_ASM_USES_INTRIN
-   u64 = _InterlockedExchange64((__int64 *)pu64, u64);
+   return _InterlockedExchange64((__int64 *)pu64, u64);
 
 #  elif RT_INLINE_ASM_GNU_STYLE
@@ -565,4 +761,5 @@
     }
 #  endif
+    return u64;
 
 # elif defined(RT_ARCH_X86)
@@ -610,30 +807,32 @@
     }
 #  endif
+    return u64;
 
 # elif defined(RT_ARCH_ARM32) || defined(RT_ARCH_ARM64)
     uint32_t rcSpill;
+    uint64_t uOld;
     __asm__ __volatile__(".Ltry_again_ASMAtomicXchgU64_%=:\n\t"
-                         "dmb       sy\n\t"
+                         RTASM_ARM_DMB_SY
 #  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %0, [%3]\n\t"
-                         "stlxr     %w1, %2, [%3]\n\t"
-                         "cbnz      %w1, .Ltry_again_ASMAtomicXchgU64_%=\n\t"
-#  else
-                         "ldrexd    %H0, [%3]\n\t"      /* ARMv6+ */
-                         "strexd    %1, %H2, [%3]\n\t"
-                         "cmp       %1, #0\n\t"
+                         "ldaxr     %[uOld], %[pMem]\n\t"
+                         "stlxr     %w[rc], %[uNew], %[pMem]\n\t"
+                         "cbnz      %w[rc], .Ltry_again_ASMAtomicXchgU64_%=\n\t"
+#  else
+                         "ldrexd    %[uOld], %H[uOld], %[pMem]\n\t"      /* ARMv6+ */
+                         "strexd    %[rc], %[uNew], %H[uNew], %[pMem]\n\t"
+                         "cmp       %[rc], #0\n\t"
                          "bne       .Ltry_again_ASMAtomicXchgU64_%=\n\t"
 #  endif
-                         : "=&r" (u64),
-                           "=&r" (rcSpill)
-                         : "r" (u64),
-                           "r" (pu64)
-                         : "memory",
-                           "cc");
+                         : [pMem] "+m"  (*pu64)
+                         , [uOld] "=&r" (uOld)
+                         , [rc]   "=&r" (rcSpill)
+                         : [uNew] "r"   (u64)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG
+                         : "cc");
+    return uOld;
 
 # else
 #  error "Port me"
 # endif
-    return u64;
 }
 #endif
@@ -871,31 +1070,31 @@
     uint32_t rcSpill;
     __asm__ __volatile__(".Ltry_again_ASMAtomicCmpXchgU8_%=:\n\t"
-                         "dmb       sy\n\t"
+                         RTASM_ARM_DMB_SY
 #  if defined(RT_ARCH_ARM64)
-                         "ldaxrb    %w0, [%5]\n\t"
-                         "cmp       %w0, %w3\n\t"
+                         "ldaxrb    %w[uOld], %[pMem]\n\t"
+                         "cmp       %w[uOld], %w[uCmp]\n\t"
                          "bne       1f\n\t"   /* stop here if not equal */
-                         "stlxrb    %w1, %w4, [%5]\n\t"
-                         "cbnz      %w1, .Ltry_again_ASMAtomicCmpXchgU8_%=\n\t"
-                         "mov       %w2, #1\n\t"
-#  else
-                         "ldrexb    %0, [%5]\n\t"
-                         "teq       %0, %3\n\t"
-                         "strexbeq  %1, %4, [%5]\n\t"
+                         "stlxrb    %w[rc], %w[uNew], %[pMem]\n\t"
+                         "cbnz      %w[rc], .Ltry_again_ASMAtomicCmpXchgU8_%=\n\t"
+                         "mov       %w[fXchg], #1\n\t"
+#  else
+                         "ldrexb    %[uOld], %[pMem]\n\t"
+                         "teq       %[uOld], %[uCmp]\n\t"
+                         "strexbeq  %[rc], %[uNew], %[pMem]\n\t"
                          "bne       1f\n\t"   /* stop here if not equal */
-                         "cmp       %1, #0\n\t"
+                         "cmp       %[rc], #0\n\t"
                          "bne       .Ltry_again_ASMAtomicCmpXchgU8_%=\n\t"
-                         "mov       %2, #1\n\t"
+                         "mov       %[fXchg], #1\n\t"
 #  endif
                          "1:\n\t"
-                         : "=&r" (u32Spill),
-                           "=&r" (rcSpill),
-                           "=&r" (fXchg.u)
-                         : "r" ((uint32_t)u8Old),
-                           "r" ((uint32_t)u8New),
-                           "r" (pu8),
-                           "2" (0) /*fXchg*/
-                         : "memory",
-                           "cc");
+                         : [pMem]   "+m"  (*pu8)
+                         , [uOld]   "=&r" (u32Spill)
+                         , [rc]     "=&r" (rcSpill)
+                         , [fXchg]  "=&r" (fXchg.u)
+                         : [uCmp]   "r"  ((uint32_t)u8Old)
+                         , [uNew]   "r"  ((uint32_t)u8New)
+                         , "[fXchg]" (0)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG
+                         : "cc");
     return fXchg.f;
 
@@ -1005,31 +1204,31 @@
     uint32_t rcSpill;
     __asm__ __volatile__(".Ltry_again_ASMAtomicCmpXchgU32_%=:\n\t"
-                         "dmb       sy\n\t"
+                         RTASM_ARM_DMB_SY
 #  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %w0, [%5]\n\t"
-                         "cmp       %w0, %w3\n\t"
+                         "ldaxr     %w[uOld], %[pMem]\n\t"
+                         "cmp       %w[uOld], %w[uCmp]\n\t"
                          "bne       1f\n\t"   /* stop here if not equal */
-                         "stlxr     %w1, %w4, [%5]\n\t"
-                         "cbnz      %w1, .Ltry_again_ASMAtomicCmpXchgU32_%=\n\t"
-                         "mov       %w2, #1\n\t"
-#  else
-                         "ldrex     %0, [%5]\n\t"
-                         "teq       %0, %3\n\t"
-                         "strexeq   %1, %4, [%5]\n\t"
+                         "stlxr     %w[rc], %w[uNew], %[pMem]\n\t"
+                         "cbnz      %w[rc], .Ltry_again_ASMAtomicCmpXchgU32_%=\n\t"
+                         "mov       %w[fXchg], #1\n\t"
+#  else
+                         "ldrex     %[uOld], %[pMem]\n\t"
+                         "teq       %[uOld], %[uCmp]\n\t"
+                         "strexeq   %[rc], %[uNew], %[pMem]\n\t"
                          "bne       1f\n\t"   /* stop here if not equal */
-                         "cmp       %1, #0\n\t"
+                         "cmp       %[rc], #0\n\t"
                          "bne       .Ltry_again_ASMAtomicCmpXchgU32_%=\n\t"
-                         "mov       %2, #1\n\t"
+                         "mov       %[fXchg], #1\n\t"
 #  endif
                          "1:\n\t"
-                         : "=&r" (u32Spill),
-                           "=&r" (rcSpill),
-                           "=&r" (fXchg.u)
-                         : "r" (u32Old),
-                           "r" (u32New),
-                           "r" (pu32),
-                           "2" (0) /*fXchg*/
-                         : "memory",
-                           "cc");
+                         : [pMem]   "+m"  (*pu32)
+                         , [uOld]   "=&r" (u32Spill)
+                         , [rc]     "=&r" (rcSpill)
+                         , [fXchg]  "=&r" (fXchg.u)
+                         : [uCmp]   "r"  (u32Old)
+                         , [uNew]   "r"  (u32New)
+                         , "[fXchg]" (0)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG
+                         : "cc");
     return fXchg.f;
 
@@ -1165,32 +1364,32 @@
     uint32_t rcSpill;
     __asm__ __volatile__(".Ltry_again_ASMAtomicCmpXchgU64_%=:\n\t"
-                         "dmb       sy\n\t"
+                         RTASM_ARM_DMB_SY
 #  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %0, [%5]\n\t"
-                         "cmp       %0, %3\n\t"
+                         "ldaxr     %[uOld], %[pMem]\n\t"
+                         "cmp       %[uOld], %[uCmp]\n\t"
                          "bne       1f\n\t"   /* stop here if not equal */
-                         "stlxr     %w1, %4, [%5]\n\t"
-                         "cbnz      %w1, .Ltry_again_ASMAtomicCmpXchgU64_%=\n\t"
-                         "mov       %w2, #1\n\t"
-#  else
-                         "ldrexd    %0, %H0, [%5]\n\t"
-                         "teq       %0, %3\n\t"
-                         "teqeq     %H0, %H3\n\t"
-                         "strexdeq  %1, %4, %H4, [%5]\n\t"
+                         "stlxr     %w[rc], %[uNew], %[pMem]\n\t"
+                         "cbnz      %w[rc], .Ltry_again_ASMAtomicCmpXchgU64_%=\n\t"
+                         "mov       %w[fXchg], #1\n\t"
+#  else
+                         "ldrexd    %[uOld], %H[uOld], %[pMem]\n\t"
+                         "teq       %[uOld], %[uCmp]\n\t"
+                         "teqeq     %H[uOld], %H[uCmp]\n\t"
+                         "strexdeq  %[rc], %[uNew], %H[uNew], %[pMem]\n\t"
                          "bne       1f\n\t"   /* stop here if not equal */
-                         "cmp       %1, #0\n\t"
+                         "cmp       %[rc], #0\n\t"
                          "bne       .Ltry_again_ASMAtomicCmpXchgU64_%=\n\t"
-                         "mov       %2, #1\n\t"
+                         "mov       %[fXchg], #1\n\t"
 #  endif
                          "1:\n\t"
-                         : "=&r" (u64Spill),
-                           "=&r" (rcSpill),
-                           "=&r" (fXchg.u)
-                         : "r" (u64Old),
-                           "r" (u64New),
-                           "r" (pu64),
-                           "2" (0) /*fXchg*/
-                         : "memory",
-                           "cc");
+                         : [pMem]   "+m"  (*pu64)
+                         , [uOld]   "=&r" (u64Spill)
+                         , [rc]     "=&r" (rcSpill)
+                         , [fXchg]  "=&r" (fXchg.u)
+                         : [uCmp]   "r"  (u64Old)
+                         , [uNew]   "r"  (u64New)
+                         , "[fXchg]" (0)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG
+                         : "cc");
     return fXchg.f;
 
@@ -1395,31 +1594,31 @@
     uint32_t rcSpill;
     __asm__ __volatile__(".Ltry_again_ASMAtomicCmpXchgExU32_%=:\n\t"
-                         "dmb       sy\n\t"
+                         RTASM_ARM_DMB_SY
 #  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %w0, [%5]\n\t"
-                         "cmp       %w0, %w3\n\t"
+                         "ldaxr     %w[uOld], %[pMem]\n\t"
+                         "cmp       %w[uOld], %w[uCmp]\n\t"
                          "bne       1f\n\t"   /* stop here if not equal */
-                         "stlxr     %w1, %w4, [%5]\n\t"
-                         "cbnz      %w1, .Ltry_again_ASMAtomicCmpXchgExU32_%=\n\t"
-                         "mov       %w2, #1\n\t"
-#  else
-                         "ldrex     %0, [%5]\n\t"
-                         "teq       %0, %3\n\t"
-                         "strexeq   %1, %4, [%5]\n\t"
+                         "stlxr     %w[rc], %w[uNew], %[pMem]\n\t"
+                         "cbnz      %w[rc], .Ltry_again_ASMAtomicCmpXchgExU32_%=\n\t"
+                         "mov       %w[fXchg], #1\n\t"
+#  else
+                         "ldrex     %[uOld], %[pMem]\n\t"
+                         "teq       %[uOld], %[uCmp]\n\t"
+                         "strexeq   %[rc], %[uNew], %[pMem]\n\t"
                          "bne       1f\n\t"   /* stop here if not equal */
-                         "cmp       %1, #0\n\t"
+                         "cmp       %[rc], #0\n\t"
                          "bne       .Ltry_again_ASMAtomicCmpXchgExU32_%=\n\t"
-                         "mov       %2, #1\n\t"
+                         "mov       %[fXchg], #1\n\t"
 #  endif
                          "1:\n\t"
-                         : "=&r" (u32ActualOld),
-                           "=&r" (rcSpill),
-                           "=&r" (fXchg.u)
-                         : "r" (u32Old),
-                           "r" (u32New),
-                           "r" (pu32),
-                           "2" (0) /*fXchg*/
-                         : "memory",
-                           "cc");
+                         : [pMem]   "+m"  (*pu32)
+                         , [uOld]   "=&r" (u32ActualOld)
+                         , [rc]     "=&r" (rcSpill)
+                         , [fXchg]  "=&r" (fXchg.u)
+                         : [uCmp]   "r"  (u32Old)
+                         , [uNew]   "r"  (u32New)
+                         , "[fXchg]" (0)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG
+                         : "cc");
     *pu32Old = u32ActualOld;
     return fXchg.f;
@@ -1559,33 +1758,33 @@
     uint64_t u64ActualOld;
     uint32_t rcSpill;
-    __asm__ __volatile__(".Ltry_again_ASMAtomicCmpXchgExU64_%=:\n\t"
-                         "dmb       sy\n\t"
+    __asm__ __volatile__(".Ltry_again_ASMAtomicCmpXchgU64_%=:\n\t"
+                         RTASM_ARM_DMB_SY
 #  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %0, [%5]\n\t"
-                         "cmp       %0, %3\n\t"
+                         "ldaxr     %[uOld], %[pMem]\n\t"
+                         "cmp       %[uOld], %[uCmp]\n\t"
                          "bne       1f\n\t"   /* stop here if not equal */
-                         "stlxr     %w1, %4, [%5]\n\t"
-                         "cbnz      %w1, .Ltry_again_ASMAtomicCmpXchgExU64_%=\n\t"
-                         "mov       %w2, #1\n\t"
-#  else
-                         "ldrexd    %0, %H0, [%5]\n\t"
-                         "teq       %0, %3\n\t"
-                         "teqeq     %H0, %H3\n\t"
-                         "strexdeq  %1, %4, %H4, [%5]\n\t"
+                         "stlxr     %w[rc], %[uNew], %[pMem]\n\t"
+                         "cbnz      %w[rc], .Ltry_again_ASMAtomicCmpXchgU64_%=\n\t"
+                         "mov       %w[fXchg], #1\n\t"
+#  else
+                         "ldrexd    %[uOld], %H[uOld], %[pMem]\n\t"
+                         "teq       %[uOld], %[uCmp]\n\t"
+                         "teqeq     %H[uOld], %H[uCmp]\n\t"
+                         "strexdeq  %[rc], %[uNew], %H[uNew], %[pMem]\n\t"
                          "bne       1f\n\t"   /* stop here if not equal */
-                         "cmp       %1, #0\n\t"
-                         "bne       .Ltry_again_ASMAtomicCmpXchgExU64_%=\n\t"
-                         "mov       %2, #1\n\t"
+                         "cmp       %[rc], #0\n\t"
+                         "bne       .Ltry_again_ASMAtomicCmpXchgU64_%=\n\t"
+                         "mov       %[fXchg], #1\n\t"
 #  endif
                          "1:\n\t"
-                         : "=&r" (u64ActualOld),
-                           "=&r" (rcSpill),
-                           "=&r" (fXchg.u)
-                         : "r" (u64Old),
-                           "r" (u64New),
-                           "r" (pu64),
-                           "2" (0) /*fXchg*/
-                         : "memory",
-                           "cc");
+                         : [pMem]   "+m"  (*pu64)
+                         , [uOld]   "=&r" (u64ActualOld)
+                         , [rc]     "=&r" (rcSpill)
+                         , [fXchg]  "=&r" (fXchg.u)
+                         : [uCmp]   "r"  (u64Old)
+                         , [uNew]   "r"  (u64New)
+                         , "[fXchg]" (0)
+                         RTASM_ARM_DMB_SY_COMMA_IN_REG
+                         : "cc");
     *pu64Old = u64ActualOld;
     return fXchg.f;
@@ -1872,6 +2071,5 @@
 DECLINLINE(void) ASMSerializeInstruction(void) RT_NOTHROW_DEF
 {
-    /* Note! Only armv7 and later. */
-    __asm__ __volatile__ ("dsb sy\n\t" ::: "memory");
+    __asm__ __volatile__ (RTASM_ARM_DSB_SY :: RTASM_ARM_DSB_SY_IN_REG :);
 }
 #else
@@ -1882,4 +2080,5 @@
 /**
  * Memory fence, waits for any pending writes and reads to complete.
+ * @note No implicit compiler barrier (which is probably stupid).
  */
 DECLINLINE(void) ASMMemoryFence(void) RT_NOTHROW_DEF
@@ -1899,6 +2098,5 @@
 # endif
 #elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
-    /* Note! Only armv7 and later. */
-    __asm__ __volatile__ ("dmb sy\n\t" ::: "memory");
+    __asm__ __volatile__ (RTASM_ARM_DMB_SY :: RTASM_ARM_DMB_SY_IN_REG :);
 #elif ARCH_BITS == 16
     uint16_t volatile u16;
@@ -1913,4 +2111,5 @@
 /**
  * Write fence, waits for any pending writes to complete.
+ * @note No implicit compiler barrier (which is probably stupid).
  */
 DECLINLINE(void) ASMWriteFence(void) RT_NOTHROW_DEF
@@ -1930,6 +2129,5 @@
 # endif
 #elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
-    /* Note! Only armv7 and later. */
-    __asm__ __volatile__ ("dmb st\n\t" ::: "memory");
+    __asm__ __volatile__ (RTASM_ARM_DMB_ST :: RTASM_ARM_DMB_ST_IN_REG :);
 #else
     ASMMemoryFence();
@@ -1940,4 +2138,5 @@
 /**
  * Read fence, waits for any pending reads to complete.
+ * @note No implicit compiler barrier (which is probably stupid).
  */
 DECLINLINE(void) ASMReadFence(void) RT_NOTHROW_DEF
@@ -1957,6 +2156,5 @@
 # endif
 #elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
-    /* Note! Only armv7 and later. */
-    __asm__ __volatile__ ("dmb ld\n\t" ::: "memory");
+    __asm__ __volatile__ (RTASM_ARM_DMB_LD :: RTASM_ARM_DMB_LD_IN_REG :);
 #else
     ASMMemoryFence();
@@ -1973,6 +2171,21 @@
 DECLINLINE(uint8_t) ASMAtomicReadU8(volatile uint8_t RT_FAR *pu8) RT_NOTHROW_DEF
 {
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    uint32_t u32;
+    __asm__ __volatile__(".Lstart_ASMAtomicReadU8_%=:\n\t"
+                         RTASM_ARM_DMB_SY
+# if defined(RT_ARCH_ARM64)
+                         "ldxrb     %w[uDst], %[pMem]\n\t"
+# else
+                         "ldrexb    %[uDst], %[pMem]\n\t"
+# endif
+                         : [uDst] "=&r" (u32)
+                         : [pMem] "m" (*pu8)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG);
+    return (uint8_t)u32;
+#else
     ASMMemoryFence();
     return *pu8;    /* byte reads are atomic on x86 */
+#endif
 }
 
@@ -1986,5 +2199,18 @@
 DECLINLINE(uint8_t) ASMAtomicUoReadU8(volatile uint8_t RT_FAR *pu8) RT_NOTHROW_DEF
 {
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    uint32_t u32;
+    __asm__ __volatile__(".Lstart_ASMAtomicUoReadU8_%=:\n\t"
+# if defined(RT_ARCH_ARM64)
+                         "ldxrb     %w[uDst], %[pMem]\n\t"
+# else
+                         "ldrexb    %[uDst], %[pMem]\n\t"
+# endif
+                         : [uDst] "=&r" (u32)
+                         : [pMem] "m" (*pu8));
+    return (uint8_t)u32;
+#else
     return *pu8;    /* byte reads are atomic on x86 */
+#endif
 }
 
@@ -1999,5 +2225,20 @@
 {
     ASMMemoryFence();
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    int32_t i32;
+    __asm__ __volatile__(".Lstart_ASMAtomicReadS8_%=:\n\t"
+                         RTASM_ARM_DMB_SY
+# if defined(RT_ARCH_ARM64)
+                         "ldxrb     %w[iDst], %[pMem]\n\t"
+# else
+                         "ldrexb    %[iDst], %[pMem]\n\t"
+# endif
+                         : [iDst] "=&r" (i32)
+                         : [pMem] "m" (*pi8)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG);
+    return (int8_t)i32;
+#else
     return *pi8;    /* byte reads are atomic on x86 */
+#endif
 }
 
@@ -2011,5 +2252,18 @@
 DECLINLINE(int8_t) ASMAtomicUoReadS8(volatile int8_t RT_FAR *pi8) RT_NOTHROW_DEF
 {
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    int32_t i32;
+    __asm__ __volatile__(".Lstart_ASMAtomicUoReadS8_%=:\n\t"
+# if defined(RT_ARCH_ARM64)
+                         "ldxrb     %w[iDst], %[pMem]\n\t"
+# else
+                         "ldrexb    %[iDst], %[pMem]\n\t"
+# endif
+                         : [iDst] "=&r" (i32)
+                         : [pMem] "m" (*pi8));
+    return (int8_t)i32;
+#else
     return *pi8;    /* byte reads are atomic on x86 */
+#endif
 }
 
@@ -2024,6 +2278,21 @@
 {
     Assert(!((uintptr_t)pu16 & 1));
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    uint32_t u32;
+    __asm__ __volatile__(".Lstart_ASMAtomicReadU16_%=:\n\t"
+                         RTASM_ARM_DMB_SY
+# if defined(RT_ARCH_ARM64)
+                         "ldxrh     %w[uDst], %[pMem]\n\t"
+# else
+                         "ldrexh    %[uDst], %[pMem]\n\t"
+# endif
+                         : [uDst] "=&r" (u32)
+                         : [pMem] "m" (*pu16)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG);
+    return (uint16_t)u32;
+#else
     ASMMemoryFence();
     return *pu16;
+#endif
 }
 
@@ -2038,5 +2307,18 @@
 {
     Assert(!((uintptr_t)pu16 & 1));
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    uint32_t u32;
+    __asm__ __volatile__(".Lstart_ASMAtomicUoReadU16_%=:\n\t"
+# if defined(RT_ARCH_ARM64)
+                         "ldxrh     %w[uDst], %[pMem]\n\t"
+# else
+                         "ldrexh    %[uDst], %[pMem]\n\t"
+# endif
+                         : [uDst] "=&r" (u32)
+                         : [pMem] "m" (*pu16));
+    return (uint16_t)u32;
+#else
     return *pu16;
+#endif
 }
 
@@ -2051,6 +2333,21 @@
 {
     Assert(!((uintptr_t)pi16 & 1));
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    int32_t i32;
+    __asm__ __volatile__(".Lstart_ASMAtomicReadS16_%=:\n\t"
+                         RTASM_ARM_DMB_SY
+# if defined(RT_ARCH_ARM64)
+                         "ldxrh     %w[iDst], %[pMem]\n\t"
+# else
+                         "ldrexh    %[iDst], %[pMem]\n\t"
+# endif
+                         : [iDst] "=&r" (i32)
+                         : [pMem] "m" (*pi16)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG);
+    return (int16_t)i32;
+#else
     ASMMemoryFence();
     return *pi16;
+#endif
 }
 
@@ -2065,5 +2362,18 @@
 {
     Assert(!((uintptr_t)pi16 & 1));
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    int32_t i32;
+    __asm__ __volatile__(".Lstart_ASMAtomicUoReadS16_%=:\n\t"
+# if defined(RT_ARCH_ARM64)
+                         "ldxrh     %w[iDst], %[pMem]\n\t"
+# else
+                         "ldrexh    %[iDst], %[pMem]\n\t"
+# endif
+                         : [iDst] "=&r" (i32)
+                         : [pMem] "m" (*pi16));
+    return (int16_t)i32;
+#else
     return *pi16;
+#endif
 }
 
@@ -2078,9 +2388,24 @@
 {
     Assert(!((uintptr_t)pu32 & 3));
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    uint32_t u32;
+    __asm__ __volatile__(".Lstart_ASMAtomicReadU32_%=:\n\t"
+                         RTASM_ARM_DMB_SY
+# if defined(RT_ARCH_ARM64)
+                         "ldxr      %w[uDst], %[pMem]\n\t"
+# else
+                         "ldrex    %[uDst], %[pMem]\n\t"
+# endif
+                         : [uDst] "=&r" (u32)
+                         : [pMem] "m" (*pu32)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG);
+    return u32;
+#else
     ASMMemoryFence();
-#if ARCH_BITS == 16
+# if ARCH_BITS == 16
     AssertFailed();  /** @todo 16-bit */
-#endif
+# endif
     return *pu32;
+#endif
 }
 
@@ -2095,8 +2420,21 @@
 {
     Assert(!((uintptr_t)pu32 & 3));
-#if ARCH_BITS == 16
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    uint32_t u32;
+    __asm__ __volatile__(".Lstart_ASMAtomicUoReadU32_%=:\n\t"
+# if defined(RT_ARCH_ARM64)
+                         "ldxr      %w[uDst], %[pMem]\n\t"
+# else
+                         "ldrex    %[uDst], %[pMem]\n\t"
+# endif
+                         : [uDst] "=&r" (u32)
+                         : [pMem] "m" (*pu32));
+    return u32;
+#else
+# if ARCH_BITS == 16
     AssertFailed();  /** @todo 16-bit */
-#endif
+# endif
     return *pu32;
+#endif
 }
 
@@ -2111,9 +2449,24 @@
 {
     Assert(!((uintptr_t)pi32 & 3));
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    int32_t i32;
+    __asm__ __volatile__(".Lstart_ASMAtomicReadS32_%=:\n\t"
+                         RTASM_ARM_DMB_SY
+# if defined(RT_ARCH_ARM64)
+                         "ldxr      %w[iDst], %[pMem]\n\t"
+# else
+                         "ldrex    %[iDst], %[pMem]\n\t"
+# endif
+                         : [iDst] "=&r" (i32)
+                         : [pMem] "m" (*pi32)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG);
+    return i32;
+#else
     ASMMemoryFence();
-#if ARCH_BITS == 16
+# if ARCH_BITS == 16
     AssertFailed();  /** @todo 16-bit */
-#endif
+# endif
     return *pi32;
+#endif
 }
 
@@ -2128,8 +2481,23 @@
 {
     Assert(!((uintptr_t)pi32 & 3));
-#if ARCH_BITS == 16
+#if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+    Assert(!((uintptr_t)pu64 & 7));
+    int32_t i32;
+    __asm__ __volatile__(".Lstart_ASMAtomicUoReadS32_%=:\n\t"
+# if defined(RT_ARCH_ARM64)
+                         "ldxr      %w[iDst], %[pMem]\n\t"
+# else
+                         "ldrex    %[iDst], %[pMem]\n\t"
+# endif
+                         : [iDst] "=&r" (i32)
+                         : [pMem] "m" (*pi32));
+    return i32;
+
+#else
+# if ARCH_BITS == 16
     AssertFailed();  /** @todo 16-bit */
-#endif
+# endif
     return *pi32;
+#endif
 }
 
@@ -2214,16 +2582,16 @@
 #  endif
 
-# elif defined(RT_ARCH_ARM64)
+# elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
     Assert(!((uintptr_t)pu64 & 7));
-    ASMMemoryFence();
-    u64 = *pu64;
-
-# elif defined(RT_ARCH_ARM32)
-    Assert(!((uintptr_t)pu64 & 7));
-    __asm__ __volatile__("dmb sy\n\t"
-                         "ldrexd    %0, %H0, [%1]\n\t"
-                         : "=&r" (u64)
-                         : "r" (pu64)
-                         : "memory");
+    __asm__ __volatile__(".Lstart_ASMAtomicReadU64_%=:\n\t"
+                         RTASM_ARM_DMB_SY
+# if defined(RT_ARCH_ARM64)
+                         "ldxr      %[uDst], %[pMem]\n\t"
+# else
+                         "ldrexd    %[uDst], %H[uDst], %[pMem]\n\t"
+# endif
+                         : [uDst] "=&r" (u64)
+                         : [pMem] "m" (*pu64)
+                           RTASM_ARM_DMB_SY_COMMA_IN_REG);
 
 # else
@@ -2316,14 +2684,14 @@
 #  endif
 
-# elif defined(RT_ARCH_ARM64)
+# elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
     Assert(!((uintptr_t)pu64 & 7));
-    u64 = *pu64;
-
-# elif defined(RT_ARCH_ARM32)
-    Assert(!((uintptr_t)pu64 & 7));
-    __asm__ __volatile__("ldrexd    %0, %H0, [%1]\n\t"
-                         : "=&r" (u64)
-                         : "r" (pu64)
-                         : );
+    __asm__ __volatile__(".Lstart_ASMAtomicUoReadU64_%=:\n\t"
+# if defined(RT_ARCH_ARM64)
+                         "ldxr      %[uDst], %[pMem]\n\t"
+# else
+                         "ldrexd    %[uDst], %H[uDst], %[pMem]\n\t"
+# endif
+                         : [uDst] "=&r" (u64)
+                         : [pMem] "m" (*pu64));
 
 # else
@@ -2630,4 +2998,5 @@
 DECLINLINE(void) ASMAtomicUoWriteU8(volatile uint8_t RT_FAR *pu8, uint8_t u8) RT_NOTHROW_DEF
 {
+    /** @todo Any possible ARM32/ARM64 improvements here? */
     *pu8 = u8;      /* byte writes are atomic on x86 */
 }
@@ -3166,29 +3535,9 @@
 
 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
-    uint32_t u32Ret;
-    uint32_t rcSpill;
-    uint32_t u32Spill;
-    __asm__ __volatile__(".Ltry_again_add_u32_%=:\n\t"
-                         "dmb       sy\n\t"
-#  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %w0, [%4]\n\t"
-                         "add       %w1, %w0, %w3\n\t"
-                         "stlxr     %w2, %w1, [%4]\n\t"
-                         "cbnz      %w2, .Ltry_again_add_u32_%=\n\t"
-#  else
-                         "ldrex     %0, [%4]\n\t"
-                         "add       %1, %0, %3\n\t"
-                         "strex     %2, %1, [%4]\n\t"
-                         "cmp       %2, #0\n\t"
-                         "bne       .Ltry_again_add_u32_%=\n\t"
-#  endif
-                         : "=&r" (u32Ret),
-                           "=&r" (u32Spill),
-                           "=&r" (rcSpill)
-                         : "r" (u32),
-                           "r" (pu32)
-                         : "memory",
-                           "cc");
-    return u32Ret;
+    RTASM_ARM_LOAD_MODIFY_STORE_RET_OLD_32(ASMAtomicAddU32, pu32, DMB_SY,
+                                           "add %w[uNew], %w[uOld], %w[uVal]\n\t",
+                                           "add %[uNew], %[uOld], %[uVal]\n\t",
+                                           [uVal] "r" (u32));
+    return u32OldRet;
 
 # else
@@ -3243,30 +3592,11 @@
 
 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
-    uint64_t u64Ret;
-    uint32_t rcSpill;
-    uint64_t u64Spill;
-    __asm__ __volatile__(".Ltry_again_add_u64_%=:\n\t"
-                         "dmb       sy\n\t"
-#  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %0, [%4]\n\t"
-                         "add       %1, %0, %3\n\t"
-                         "stlxr     %w2, %1, [%4]\n\t"
-                         "cbnz      %w2, .Ltry_again_add_u64_%=\n\t"
-#  else
-                         "ldrexd    %0, %H0, [%4]\n\t"
-                         "add       %1, %0, %3\n\t"
-                         "adc       %H1, %H0, %H3\n\t"
-                         "strexd    %2, %1, %H1, [%4]\n\t"
-                         "cmp       %2, #0\n\t"
-                         "bne       .Ltry_again_add_u64_%=\n\t"
-#  endif
-                         : "=&r" (u64Ret),
-                           "=&r" (u64Spill),
-                           "=&r" (rcSpill)
-                         : "r" (u64),
-                           "r" (pu64)
-                         : "memory",
-                           "cc");
-    return u64Ret;
+    RTASM_ARM_LOAD_MODIFY_STORE_RET_OLD_64(ASMAtomicAddU64, pu64, DMB_SY,
+                                           "add %[uNew], %[uOld], %[uVal]\n\t"
+                                           ,
+                                           "add %[uNew], %[uOld], %[uVal]\n\t"
+                                           "adc %H[uNew], %H[uOld], %H[uVal]\n\t",
+                                           [uVal] "r" (u64));
+    return u64OldRet;
 
 # else
@@ -3536,26 +3866,9 @@
 
 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
-    uint32_t u32Ret;
-    uint32_t rcSpill;
-    __asm__ __volatile__(".Ltry_again_inc_u32_%=:\n\t"
-                         "dmb       sy\n\t"
-#  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %w0, [%2]\n\t"
-                         "add       %w0, %w0, #1\n\t"
-                         "stlxr     %w1, %w0, [%2]\n\t"
-                         "cbnz      %w1, .Ltry_again_inc_u32_%=\n\t"
-#  else
-                         "ldrex     %0, [%2]\n\t"
-                         "add       %0, %0, #1\n\t" /* arm6 / thumb2+ */
-                         "strex     %1, %0, [%2]\n\t"
-                         "cmp       %1, #0\n\t"
-                         "bne       .Ltry_again_inc_u32_%=\n\t"
-#  endif
-                         : "=&r" (u32Ret),
-                           "=&r" (rcSpill)
-                         : "r" (pu32)
-                         : "memory",
-                           "cc");
-    return u32Ret;
+    RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_32(ASMAtomicIncU32, pu32, DMB_SY,
+                                           "add %w[uNew], %w[uNew], #1\n\t",
+                                           "add %[uNew], %[uNew], #1\n\t" /* arm6 / thumb2+ */,
+                                           "X" (0) /* dummy */);
+    return u32NewRet;
 
 # else
@@ -3608,30 +3921,11 @@
 
 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
-    uint64_t u64Ret;
-    uint32_t rcSpill;
-    __asm__ __volatile__(".Ltry_again_inc_u64_%=:\n\t"
-                         "dmb       sy\n\t"
-#  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %0, [%2]\n\t"
-                         "add       %0, %0, #1\n\t"
-                         "stlxr     %w1, %0, [%2]\n\t"
-                         "cbnz      %w1, .Ltry_again_inc_u64_%=\n\t"
-#  else
-                         "ldrexd    %0, %H0, [%2]\n\t"
-                         "add       %0, %0, #1\n\t" /* arm6 / thumb2+ */
-                         "adc       %H0, %H0, %3\n\t"
-                         "strexd    %1, %0, %H0, [%2]\n\t"
-                         "cmp       %1, #0\n\t"
-                         "bne       .Ltry_again_inc_u64_%=\n\t"
-#  endif
-                         : "=&r" (u64Ret),
-                           "=&r" (rcSpill)
-                         : "r" (pu64)
-#  if !defined(RT_ARCH_ARM64)
-                         , "r" (0)
-#  endif
-                         : "memory",
-                           "cc");
-    return u64Ret;
+    RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_64(ASMAtomicIncU64, pu64, DMB_SY,
+                                           "add %[uNew], %[uNew], #1\n\t"
+                                           ,
+                                           "add %[uNew], %[uNew], #1\n\t" /* arm6 / thumb2+ */
+                                           "adc %H[uNew], %H[uNew], %[uZeroVal]\n\t",
+                                           RTASM_ARM_PICK_6432("X" (0) /* dummy */, [uZeroVal] "r" (0)) );
+    return u64NewRet;
 
 # else
@@ -3736,26 +4030,9 @@
 
 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
-    uint32_t u32Ret;
-    uint32_t rcSpill;
-    __asm__ __volatile__(".Ltry_again_dec_u32_%=:\n\t"
-                         "dmb       sy\n\t"
-#  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %w0, [%2]\n\t"
-                         "sub       %w0, %w0, #1\n\t"
-                         "stlxr     %w1, %w0, [%2]\n\t"
-                         "cbnz      %w1, .Ltry_again_dec_u32_%=\n\t"
-#  else
-                         "ldrex     %0, [%2]\n\t"
-                         "sub       %0, %0, #1\n\t" /* arm6 / thumb2+ */
-                         "strex     %1, %0, [%2]\n\t"
-                         "cmp       %1, #0\n\t"
-                         "bne       .Ltry_again_dec_u32_%=\n\t"
-#  endif
-                         : "=&r" (u32Ret),
-                           "=&r" (rcSpill)
-                         : "r" (pu32)
-                         : "memory",
-                           "cc");
-    return u32Ret;
+    RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_32(ASMAtomicDecU32, pu32, DMB_SY,
+                                           "sub %w[uNew], %w[uNew], #1\n\t",
+                                           "sub %[uNew], %[uNew], #1\n\t" /* arm6 / thumb2+ */,
+                                           "X" (0) /* dummy */);
+    return u32NewRet;
 
 # else
@@ -3808,30 +4085,11 @@
 
 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
-    uint64_t u64Ret;
-    uint32_t rcSpill;
-    __asm__ __volatile__(".Ltry_again_dec_u64_%=:\n\t"
-                         "dmb       sy\n\t"
-#  if defined(RT_ARCH_ARM64)
-                         "ldaxr     %0, [%2]\n\t"
-                         "sub       %0, %0, #1\n\t"
-                         "stlxr     %w1, %0, [%2]\n\t"
-                         "cbnz      %w1, .Ltry_again_dec_u64_%=\n\t"
-#  else
-                         "ldrexd    %0, %H0, [%2]\n\t"
-                         "sub       %0, %0, #1\n\t" /* arm6 / thumb2+ */
-                         "sbc       %H0, %H0, %3\n\t"
-                         "strexd    %1, %0, %H0, [%2]\n\t"
-                         "cmp       %1, #0\n\t"
-                         "bne       .Ltry_again_dec_u64_%=\n\t"
-#  endif
-                         : "=&r" (u64Ret),
-                           "=&r" (rcSpill)
-                         : "r" (pu64)
-#  if !defined(RT_ARCH_ARM64)
-                         , "r" (0)
-#  endif
-                         : "memory",
-                           "cc");
-    return u64Ret;
+    RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_64(ASMAtomicDecU64, pu64, DMB_SY,
+                                           "sub %[uNew], %[uNew], #1\n\t"
+                                           ,
+                                           "sub %[uNew], %[uNew], #1\n\t" /* arm6 / thumb2+ */
+                                           "sbc %H[uNew], %H[uNew], %[uZeroVal]\n\t",
+                                           RTASM_ARM_PICK_6432("X" (0) /* dummy */, [uZeroVal] "r" (0)) );
+    return u64NewRet;
 
 # else
Index: trunk/include/iprt/cdefs.h
===================================================================
--- trunk/include/iprt/cdefs.h	(revision 87178)
+++ trunk/include/iprt/cdefs.h	(revision 87181)
@@ -109,5 +109,6 @@
 
 /** @def RT_ARCH_ARM32
- * Indicates that we're compiling for the 32-bit ARM architecture.
+ * Indicates that we're compiling for the 32-bit ARM architecture, the value
+ * is the version (i.e. 6 for ARMv6).
  */
 
@@ -131,7 +132,9 @@
 #  define RT_ARCH_SPARC
 # elif defined(__arm64__) || defined(__aarch64__)
-#  define RT_ARCH_ARM64
-# elif defined(__arm__) || defined(__arm32__)
-#  define RT_ARCH_ARM32
+#  define RT_ARCH_ARM64 __ARM_ARCH
+# elif defined(__arm__)
+#  define RT_ARCH_ARM32 __ARM_ARCH
+# elif defined(__arm32__)
+#  define RT_ARCH_ARM32 __ARM_ARCH
 # else /* PORTME: append test for new archs. */
 #  error "Check what predefined macros your compiler uses to indicate architecture."
