Changeset 87183 in vbox for trunk/include/iprt
- Timestamp:
- Jan 6, 2021 12:12:34 PM (4 years ago)
- svn:sync-xref-src-repo-rev:
- 142114
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/iprt/asm.h
r87181 r87183 439 439 * spin locks. 440 440 */ 441 #if RT_INLINE_ASM_EXTERNAL && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))441 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)) 442 442 RT_ASM_DECL_PRAGMA_WATCOM(void) ASMNopPause(void) RT_NOTHROW_PROTO; 443 443 #else … … 2482 2482 Assert(!((uintptr_t)pi32 & 3)); 2483 2483 #if defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 2484 Assert(!((uintptr_t)p u64& 7));2484 Assert(!((uintptr_t)pi32 & 7)); 2485 2485 int32_t i32; 2486 2486 __asm__ __volatile__(".Lstart_ASMAtomicUoReadS32_%=:\n\t" … … 4144 4144 * @remarks x86: Requires a 386 or later. 4145 4145 */ 4146 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN4146 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM && !RT_INLINE_ASM_USES_INTRIN 4147 4147 RT_ASM_DECL_PRAGMA_WATCOM(void) ASMAtomicOrU32(uint32_t volatile RT_FAR *pu32, uint32_t u32) RT_NOTHROW_PROTO; 4148 4148 #else … … 4152 4152 _InterlockedOr((long volatile RT_FAR *)pu32, (long)u32); 4153 4153 4154 # elif RT_INLINE_ASM_GNU_STYLE 4154 # elif defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 4155 # if RT_INLINE_ASM_GNU_STYLE 4155 4156 __asm__ __volatile__("lock; orl %1, %0\n\t" 4156 4157 : "=m" (*pu32) … … 4158 4159 , "m" (*pu32) 4159 4160 : "cc"); 4160 # else4161 # else 4161 4162 __asm 4162 4163 { 4163 4164 mov eax, [u32] 4164 # ifdef RT_ARCH_AMD644165 # ifdef RT_ARCH_AMD64 4165 4166 mov rdx, [pu32] 4166 4167 lock or [rdx], eax 4167 # else4168 # else 4168 4169 mov edx, [pu32] 4169 4170 lock or [edx], eax 4170 # endif4171 # endif 4171 4172 } 4173 # endif 4174 4175 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 4176 /* For more on Orr see https://en.wikipedia.org/wiki/Orr_(Catch-22) ;-) */ 4177 RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_32(ASMAtomicOr32, pu32, DMB_SY, 4178 "orr %w[uNew], %w[uNew], %w[uVal]\n\t", 4179 "orr %[uNew], %[uNew], %[uVal]\n\t", 4180 [uVal] "r" (u32)); 4181 4182 # else 4183 # error "Port me" 4172 4184 # endif 4173 4185 } … … 4197 4209 * @remarks x86: Requires a Pentium or later. 4198 4210 */ 4199 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN4211 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM && !RT_INLINE_ASM_USES_INTRIN 4200 4212 DECLASM(void) ASMAtomicOrU64(uint64_t volatile RT_FAR *pu64, uint64_t u64) RT_NOTHROW_PROTO; 4201 4213 #else … … 4211 4223 , "m" (*pu64) 4212 4224 : "cc"); 4225 4226 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 4227 RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_64(ASMAtomicOrU64, pu64, DMB_SY, 4228 "orr %[uNew], %[uNew], %[uVal]\n\t" 4229 , 4230 "orr %[uNew], %[uNew], %[uVal]\n\t" 4231 "orr %H[uNew], %H[uNew], %H[uVal]\n\t", 4232 [uVal] "r" (u64)); 4233 4213 4234 # else 4214 4235 for (;;) … … 4247 4268 * @remarks x86: Requires a 386 or later. 4248 4269 */ 4249 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN4270 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM && !RT_INLINE_ASM_USES_INTRIN 4250 4271 RT_ASM_DECL_PRAGMA_WATCOM(void) ASMAtomicAndU32(uint32_t volatile RT_FAR *pu32, uint32_t u32) RT_NOTHROW_PROTO; 4251 4272 #else … … 4255 4276 _InterlockedAnd((long volatile RT_FAR *)pu32, u32); 4256 4277 4257 # elif RT_INLINE_ASM_GNU_STYLE 4278 # elif defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 4279 # if RT_INLINE_ASM_GNU_STYLE 4258 4280 __asm__ __volatile__("lock; andl %1, %0\n\t" 4259 4281 : "=m" (*pu32) … … 4261 4283 , "m" (*pu32) 4262 4284 : "cc"); 4263 # else4285 # else 4264 4286 __asm 4265 4287 { 4266 4288 mov eax, [u32] 4267 # ifdef RT_ARCH_AMD644289 # ifdef RT_ARCH_AMD64 4268 4290 mov rdx, [pu32] 4269 4291 lock and [rdx], eax 4270 # else4292 # else 4271 4293 mov edx, [pu32] 4272 4294 lock and [edx], eax 4273 # endif4295 # endif 4274 4296 } 4297 # endif 4298 4299 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 4300 RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_32(ASMAtomicAnd32, pu32, DMB_SY, 4301 "and %w[uNew], %w[uNew], %w[uVal]\n\t", 4302 "and %[uNew], %[uNew], %[uVal]\n\t", 4303 [uVal] "r" (u32)); 4304 4305 # else 4306 # error "Port me" 4275 4307 # endif 4276 4308 } … … 4300 4332 * @remarks x86: Requires a Pentium or later. 4301 4333 */ 4302 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN4334 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM && !RT_INLINE_ASM_USES_INTRIN 4303 4335 DECLASM(void) ASMAtomicAndU64(uint64_t volatile RT_FAR *pu64, uint64_t u64) RT_NOTHROW_PROTO; 4304 4336 #else … … 4314 4346 , "m" (*pu64) 4315 4347 : "cc"); 4348 4349 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 4350 RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_64(ASMAtomicAndU64, pu64, DMB_SY, 4351 "and %[uNew], %[uNew], %[uVal]\n\t" 4352 , 4353 "and %[uNew], %[uNew], %[uVal]\n\t" 4354 "and %H[uNew], %H[uNew], %H[uVal]\n\t", 4355 [uVal] "r" (u64)); 4356 4316 4357 # else 4317 4358 for (;;) … … 4350 4391 * @remarks x86: Requires a 386 or later. 4351 4392 */ 4352 #if RT_INLINE_ASM_EXTERNAL 4393 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM 4353 4394 RT_ASM_DECL_PRAGMA_WATCOM(void) ASMAtomicUoOrU32(uint32_t volatile RT_FAR *pu32, uint32_t u32) RT_NOTHROW_PROTO; 4354 4395 #else 4355 4396 DECLINLINE(void) ASMAtomicUoOrU32(uint32_t volatile RT_FAR *pu32, uint32_t u32) RT_NOTHROW_DEF 4356 4397 { 4357 # if RT_INLINE_ASM_GNU_STYLE 4398 # if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 4399 # if RT_INLINE_ASM_GNU_STYLE 4358 4400 __asm__ __volatile__("orl %1, %0\n\t" 4359 4401 : "=m" (*pu32) … … 4361 4403 , "m" (*pu32) 4362 4404 : "cc"); 4363 # else4405 # else 4364 4406 __asm 4365 4407 { 4366 4408 mov eax, [u32] 4367 # ifdef RT_ARCH_AMD644409 # ifdef RT_ARCH_AMD64 4368 4410 mov rdx, [pu32] 4369 4411 or [rdx], eax 4370 # else4412 # else 4371 4413 mov edx, [pu32] 4372 4414 or [edx], eax 4373 # endif4415 # endif 4374 4416 } 4417 # endif 4418 4419 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 4420 RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_32(ASMAtomicUoOr32, pu32, NO_BARRIER, 4421 "orr %w[uNew], %w[uNew], %w[uVal]\n\t", 4422 "orr %[uNew], %[uNew], %[uVal]\n\t", 4423 [uVal] "r" (u32)); 4424 4425 # else 4426 # error "Port me" 4375 4427 # endif 4376 4428 } … … 4400 4452 * @remarks x86: Requires a Pentium or later. 4401 4453 */ 4402 #if RT_INLINE_ASM_EXTERNAL 4454 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM 4403 4455 DECLASM(void) ASMAtomicUoOrU64(uint64_t volatile RT_FAR *pu64, uint64_t u64) RT_NOTHROW_PROTO; 4404 4456 #else … … 4411 4463 , "m" (*pu64) 4412 4464 : "cc"); 4465 4466 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 4467 RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_64(ASMAtomicUoOrU64, pu64, NO_BARRIER, 4468 "orr %[uNew], %[uNew], %[uVal]\n\t" 4469 , 4470 "orr %[uNew], %[uNew], %[uVal]\n\t" 4471 "orr %H[uNew], %H[uNew], %H[uVal]\n\t", 4472 [uVal] "r" (u64)); 4473 4413 4474 # else 4414 4475 for (;;) … … 4447 4508 * @remarks x86: Requires a 386 or later. 4448 4509 */ 4449 #if RT_INLINE_ASM_EXTERNAL 4510 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM 4450 4511 RT_ASM_DECL_PRAGMA_WATCOM(void) ASMAtomicUoAndU32(uint32_t volatile RT_FAR *pu32, uint32_t u32) RT_NOTHROW_PROTO; 4451 4512 #else 4452 4513 DECLINLINE(void) ASMAtomicUoAndU32(uint32_t volatile RT_FAR *pu32, uint32_t u32) RT_NOTHROW_DEF 4453 4514 { 4454 # if RT_INLINE_ASM_GNU_STYLE 4515 # if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 4516 # if RT_INLINE_ASM_GNU_STYLE 4455 4517 __asm__ __volatile__("andl %1, %0\n\t" 4456 4518 : "=m" (*pu32) … … 4458 4520 , "m" (*pu32) 4459 4521 : "cc"); 4460 # else4522 # else 4461 4523 __asm 4462 4524 { 4463 4525 mov eax, [u32] 4464 # ifdef RT_ARCH_AMD644526 # ifdef RT_ARCH_AMD64 4465 4527 mov rdx, [pu32] 4466 4528 and [rdx], eax 4467 # else4529 # else 4468 4530 mov edx, [pu32] 4469 4531 and [edx], eax 4470 # endif4532 # endif 4471 4533 } 4534 # endif 4535 4536 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 4537 RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_32(ASMAtomicUoAnd32, pu32, NO_BARRIER, 4538 "and %w[uNew], %w[uNew], %w[uVal]\n\t", 4539 "and %[uNew], %[uNew], %[uVal]\n\t", 4540 [uVal] "r" (u32)); 4541 4542 # else 4543 # error "Port me" 4472 4544 # endif 4473 4545 } … … 4497 4569 * @remarks x86: Requires a Pentium or later. 4498 4570 */ 4499 #if RT_INLINE_ASM_EXTERNAL 4571 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM 4500 4572 DECLASM(void) ASMAtomicUoAndU64(uint64_t volatile RT_FAR *pu64, uint64_t u64) RT_NOTHROW_PROTO; 4501 4573 #else … … 4508 4580 , "m" (*pu64) 4509 4581 : "cc"); 4582 4583 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 4584 RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_64(ASMAtomicUoAndU64, pu64, NO_BARRIER, 4585 "and %[uNew], %[uNew], %[uVal]\n\t" 4586 , 4587 "and %[uNew], %[uNew], %[uVal]\n\t" 4588 "and %H[uNew], %H[uNew], %H[uVal]\n\t", 4589 [uVal] "r" (u64)); 4590 4510 4591 # else 4511 4592 for (;;) … … 4544 4625 * @remarks x86: Requires a 486 or later. 4545 4626 */ 4546 #if RT_INLINE_ASM_EXTERNAL 4627 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM 4547 4628 RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMAtomicUoIncU32(uint32_t volatile RT_FAR *pu32) RT_NOTHROW_PROTO; 4548 4629 #else 4549 4630 DECLINLINE(uint32_t) ASMAtomicUoIncU32(uint32_t volatile RT_FAR *pu32) RT_NOTHROW_DEF 4550 4631 { 4632 # if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 4551 4633 uint32_t u32; 4552 # if RT_INLINE_ASM_GNU_STYLE4634 # if RT_INLINE_ASM_GNU_STYLE 4553 4635 __asm__ __volatile__("xaddl %0, %1\n\t" 4554 4636 : "=r" (u32) … … 4559 4641 , "cc"); 4560 4642 return u32 + 1; 4561 # else4643 # else 4562 4644 __asm 4563 4645 { 4564 4646 mov eax, 1 4565 # ifdef RT_ARCH_AMD644647 # ifdef RT_ARCH_AMD64 4566 4648 mov rdx, [pu32] 4567 4649 xadd [rdx], eax 4568 # else4650 # else 4569 4651 mov edx, [pu32] 4570 4652 xadd [edx], eax 4571 # endif4653 # endif 4572 4654 mov u32, eax 4573 4655 } 4574 4656 return u32 + 1; 4657 # endif 4658 4659 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 4660 RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_32(ASMAtomicUoIncU32, pu32, NO_BARRIER, 4661 "add %w[uNew], %w[uNew], #1\n\t", 4662 "add %[uNew], %[uNew], #1\n\t" /* arm6 / thumb2+ */, 4663 "X" (0) /* dummy */); 4664 return u32NewRet; 4665 4666 # else 4667 # error "Port me" 4575 4668 # endif 4576 4669 } … … 4586 4679 * @remarks x86: Requires a 486 or later. 4587 4680 */ 4588 #if RT_INLINE_ASM_EXTERNAL 4681 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM 4589 4682 RT_ASM_DECL_PRAGMA_WATCOM(uint32_t) ASMAtomicUoDecU32(uint32_t volatile RT_FAR *pu32) RT_NOTHROW_PROTO; 4590 4683 #else 4591 4684 DECLINLINE(uint32_t) ASMAtomicUoDecU32(uint32_t volatile RT_FAR *pu32) RT_NOTHROW_DEF 4592 4685 { 4686 # if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 4593 4687 uint32_t u32; 4594 # if RT_INLINE_ASM_GNU_STYLE4688 # if RT_INLINE_ASM_GNU_STYLE 4595 4689 __asm__ __volatile__("lock; xaddl %0, %1\n\t" 4596 4690 : "=r" (u32) … … 4601 4695 , "cc"); 4602 4696 return u32 - 1; 4603 # else4697 # else 4604 4698 __asm 4605 4699 { 4606 4700 mov eax, -1 4607 # ifdef RT_ARCH_AMD644701 # ifdef RT_ARCH_AMD64 4608 4702 mov rdx, [pu32] 4609 4703 xadd [rdx], eax 4610 # else4704 # else 4611 4705 mov edx, [pu32] 4612 4706 xadd [edx], eax 4613 # endif4707 # endif 4614 4708 mov u32, eax 4615 4709 } 4616 4710 return u32 - 1; 4711 # endif 4712 4713 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 4714 RTASM_ARM_LOAD_MODIFY_STORE_RET_NEW_32(ASMAtomicUoDecU32, pu32, NO_BARRIER, 4715 "sub %w[uNew], %w[uNew], #1\n\t", 4716 "sub %[uNew], %[uNew], #1\n\t" /* arm6 / thumb2+ */, 4717 "X" (0) /* dummy */); 4718 return u32NewRet; 4719 4720 # else 4721 # error "Port me" 4617 4722 # endif 4618 4723 } … … 4652 4757 * @param pv Pointer to the memory block. This must be page aligned. 4653 4758 */ 4654 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN4759 #if (RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN) || defined(RT_ARCH_ARM32) || defined(RT_ARCH_ARM64) 4655 4760 RT_ASM_DECL_PRAGMA_WATCOM(void) ASMMemZeroPage(volatile void RT_FAR *pv) RT_NOTHROW_PROTO; 4656 4761 # else … … 4709 4814 * @param cb Number of bytes in the block. This MUST be aligned on 32-bit! 4710 4815 */ 4711 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN4816 #if (RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN) || defined(RT_ARCH_ARM32) || defined(RT_ARCH_ARM64) 4712 4817 RT_ASM_DECL_PRAGMA_WATCOM(void) ASMMemZero32(volatile void RT_FAR *pv, size_t cb) RT_NOTHROW_PROTO; 4713 4818 #else … … 4757 4862 * @param u32 The value to fill with. 4758 4863 */ 4759 #if RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN4864 #if (RT_INLINE_ASM_EXTERNAL && !RT_INLINE_ASM_USES_INTRIN) || defined(RT_ARCH_ARM32) || defined(RT_ARCH_ARM64) 4760 4865 RT_ASM_DECL_PRAGMA_WATCOM(void) ASMMemFill32(volatile void RT_FAR *pv, size_t cb, uint32_t u32) RT_NOTHROW_PROTO; 4761 4866 #else … … 4991 5096 * @param pvByte Pointer to the byte. 4992 5097 */ 4993 #if RT_INLINE_ASM_EXTERNAL 5098 #if RT_INLINE_ASM_EXTERNAL_TMP_ARM 4994 5099 RT_ASM_DECL_PRAGMA_WATCOM(uint8_t) ASMProbeReadByte(const void RT_FAR *pvByte) RT_NOTHROW_PROTO; 4995 5100 #else 4996 5101 DECLINLINE(uint8_t) ASMProbeReadByte(const void RT_FAR *pvByte) RT_NOTHROW_DEF 4997 5102 { 5103 # if defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) 4998 5104 uint8_t u8; 4999 # if RT_INLINE_ASM_GNU_STYLE5105 # if RT_INLINE_ASM_GNU_STYLE 5000 5106 __asm__ __volatile__("movb (%1), %0\n\t" 5001 5107 : "=r" (u8) 5002 5108 : "r" (pvByte)); 5003 # else5109 # else 5004 5110 __asm 5005 5111 { 5006 # ifdef RT_ARCH_AMD645112 # ifdef RT_ARCH_AMD64 5007 5113 mov rax, [pvByte] 5008 5114 mov al, [rax] 5009 # else5115 # else 5010 5116 mov eax, [pvByte] 5011 5117 mov al, [eax] 5012 # endif5118 # endif 5013 5119 mov [u8], al 5014 5120 } 5015 # endif5121 # endif 5016 5122 return u8; 5123 5124 # elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32) 5125 uint32_t u32; 5126 __asm__ __volatile__(".Lstart_ASMProbeReadByte_%=:\n\t" 5127 # if defined(RT_ARCH_ARM64) 5128 "ldxrb %w[uDst], %[pMem]\n\t" 5129 # else 5130 "ldrexb %[uDst], %[pMem]\n\t" 5131 # endif 5132 : [uDst] "=&r" (u32) 5133 : [pMem] "m" (*(uint8_t const *)pvByte)); 5134 return (uint8_t)u32; 5135 5136 # else 5137 # error "Port me" 5138 # endif 5017 5139 } 5018 5140 #endif
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