VirtualBox

Changeset 87212 in vbox


Ignore:
Timestamp:
Jan 11, 2021 1:15:45 PM (4 years ago)
Author:
vboxsync
Message:

iprt/asm.h,tstRTInlineAsm: Extending testcase, added a couple of missing function/macros. bugref:9898

Location:
trunk
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/iprt/asm.h

    r87206 r87212  
    10481048 *
    10491049 * @remarks x86: Requires a 486 or later.
     1050 * @todo Rename ASMAtomicCmpWriteU8
    10501051 */
    10511052#if RT_INLINE_ASM_EXTERNAL_TMP_ARM || !RT_INLINE_ASM_GNU_STYLE
    … …  
    11191120 *
    11201121 * @remarks x86: Requires a 486 or later.
     1122 * @todo Rename ASMAtomicCmpWriteS8
    11211123 */
    11221124DECLINLINE(bool) ASMAtomicCmpXchgS8(volatile int8_t RT_FAR *pi8, const int8_t i8New, const int8_t i8Old) RT_NOTHROW_DEF
    … …  
    11371139 *
    11381140 * @remarks x86: Requires a 486 or later.
     1141 * @todo Rename ASMAtomicCmpWriteBool
    11391142 */
    11401143DECLINLINE(bool) ASMAtomicCmpXchgBool(volatile bool RT_FAR *pf, const bool fNew, const bool fOld) RT_NOTHROW_DEF
    … …  
    11551158 *
    11561159 * @remarks x86: Requires a 486 or later.
     1160 * @todo Rename ASMAtomicCmpWriteU32
    11571161 */
    11581162#if RT_INLINE_ASM_EXTERNAL_TMP_ARM && !RT_INLINE_ASM_USES_INTRIN
    … …  
    12531257 *
    12541258 * @remarks x86: Requires a 486 or later.
     1259 * @todo Rename ASMAtomicCmpWriteS32
    12551260 */
    12561261DECLINLINE(bool) ASMAtomicCmpXchgS32(volatile int32_t RT_FAR *pi32, const int32_t i32New, const int32_t i32Old) RT_NOTHROW_DEF
    … …  
    12711276 *
    12721277 * @remarks x86: Requires a Pentium or later.
     1278 * @todo Rename ASMAtomicCmpWriteU64
    12731279 */
    12741280#if (RT_INLINE_ASM_EXTERNAL_TMP_ARM && !RT_INLINE_ASM_USES_INTRIN) \
    … …  
    14141420 *
    14151421 * @remarks x86: Requires a Pentium or later.
     1422 * @todo Rename ASMAtomicCmpWriteS64
    14161423 */
    14171424DECLINLINE(bool) ASMAtomicCmpXchgS64(volatile int64_t RT_FAR *pi64, const int64_t i64, const int64_t i64Old) RT_NOTHROW_DEF
    … …  
    14321439 *
    14331440 * @remarks x86: Requires a 486 or later.
     1441 * @todo Rename ASMAtomicCmpWritePtrVoid
    14341442 */
    14351443DECLINLINE(bool) ASMAtomicCmpXchgPtrVoid(void RT_FAR * volatile RT_FAR *ppv, const void RT_FAR *pvNew, const void RT_FAR *pvOld) RT_NOTHROW_DEF
    … …  
    14571465 * @remarks This is relatively type safe on GCC platforms.
    14581466 * @remarks x86: Requires a 486 or later.
     1467 * @todo Rename ASMAtomicCmpWritePtr
    14591468 */
    14601469#ifdef __GNUC__
    … …  
    14851494 * @remarks This doesn't currently work for all handles (like RTFILE).
    14861495 * @remarks x86: Requires a 486 or later.
     1496 * @todo Rename ASMAtomicCmpWriteHandle
    14871497 */
    14881498#if HC_ARCH_BITS == 32 || ARCH_BITS == 16
    … …  
    15131523 *
    15141524 * @remarks x86: Requires a 486 or later.
     1525 * @todo Rename ASMAtomicCmpWriteSize
    15151526 */
    15161527#define ASMAtomicCmpXchgSize(pu, uNew, uOld, fRc) \
    … …  
    18341845        AssertCompile(sizeof(*ph)       == sizeof(uint32_t)); \
    18351846        AssertCompile(sizeof(*phOldVal) == sizeof(uint32_t)); \
    1836         (fRc) = ASMAtomicCmpXchgExU32((volatile uint32_t RT_FAR *)(pu), (uint32_t)(uNew), (uint32_t)(uOld), (uint32_t RT_FAR *)(puOldVal)); \
     1847        (fRc) = ASMAtomicCmpXchgExU32((volatile uint32_t RT_FAR *)(ph), (uint32_t)(hNew), (uint32_t)(hOld), (uint32_t RT_FAR *)(phOldVal)); \
    18371848    } while (0)
    18381849#elif HC_ARCH_BITS == 64
    … …  
    18411852        AssertCompile(sizeof(*(ph))       == sizeof(uint64_t)); \
    18421853        AssertCompile(sizeof(*(phOldVal)) == sizeof(uint64_t)); \
    1843         (fRc) = ASMAtomicCmpXchgExU64((volatile uint64_t RT_FAR *)(pu), (uint64_t)(uNew), (uint64_t)(uOld), (uint64_t RT_FAR *)(puOldVal)); \
     1854        (fRc) = ASMAtomicCmpXchgExU64((volatile uint64_t RT_FAR *)(ph), (uint64_t)(hNew), (uint64_t)(hOld), (uint64_t RT_FAR *)(phOldVal)); \
    18441855    } while (0)
    18451856#else
    … …  
    32233234
    32243235/**
     3236 * Atomically writes a size_t value, unordered.
     3237 *
     3238 * @returns nothing.
     3239 * @param   pcb     Pointer to the size_t variable to write.
     3240 * @param   cb      The value to assign to *pcb.
     3241 */
     3242DECLINLINE(void) ASMAtomicUoWriteZ(volatile size_t RT_FAR *pcb, size_t cb) RT_NOTHROW_DEF
     3243{
     3244#if ARCH_BITS == 64
     3245    ASMAtomicUoWriteU64((uint64_t volatile *)pcb, cb);
     3246#elif ARCH_BITS == 32
     3247    ASMAtomicUoWriteU32((uint32_t volatile *)pcb, cb);
     3248#elif ARCH_BITS == 16
     3249    AssertCompileSize(size_t, 2);
     3250    ASMAtomicUoWriteU16((uint16_t volatile *)pcb, cb);
     3251#else
     3252# error "Unsupported ARCH_BITS value"
     3253#endif
     3254}
     3255
     3256
     3257/**
    32253258 * Atomically writes a boolean value, unordered.
    32263259 *
    … …  
    32583291#elif ARCH_BITS == 64
    32593292    ASMAtomicWriteU64((volatile uint64_t RT_FAR *)(void RT_FAR *)ppv, (uint64_t)pv);
     3293#else
     3294# error "ARCH_BITS is bogus"
     3295#endif
     3296}
     3297
     3298
     3299/**
     3300 * Atomically writes a pointer value, unordered.
     3301 *
     3302 * @param   ppv     Pointer to the pointer variable to write.
     3303 * @param   pv      The pointer value to assign to *ppv.
     3304 */
     3305DECLINLINE(void) ASMAtomicUoWritePtrVoid(void RT_FAR * volatile RT_FAR *ppv, const void *pv) RT_NOTHROW_DEF
     3306{
     3307#if ARCH_BITS == 32 || ARCH_BITS == 16
     3308    ASMAtomicUoWriteU32((volatile uint32_t RT_FAR *)(void RT_FAR *)ppv, (uint32_t)pv);
     3309#elif ARCH_BITS == 64
     3310    ASMAtomicUoWriteU64((volatile uint64_t RT_FAR *)(void RT_FAR *)ppv, (uint64_t)pv);
    32603311#else
    32613312# error "ARCH_BITS is bogus"

  • trunk/src/VBox/Runtime/testcase/tstRTInlineAsm.cpp

    r86586 r87212  
    7979        } \
    8080    } while (0)
     81
     82#define CHECK_OP_AND_VAL(a_Type, a_Fmt, a_pVar, a_Operation, a_ExpectRetVal, a_ExpectVarVal) \
     83    do { \
     84        CHECKOP(a_Operation, a_ExpectRetVal, a_Fmt, a_Type); \
     85        CHECKVAL(*a_pVar, a_ExpectVarVal, a_Fmt); \
     86    } while (0)
     87
     88#define CHECK_OP_AND_VAL_EX(a_TypeRet, a_FmtRet, a_FmtVar, a_pVar, a_Operation, a_ExpectRetVal, a_ExpectVarVal) \
     89    do { \
     90        CHECKOP(a_Operation, a_ExpectRetVal, a_FmtRet, a_TypeRet); \
     91        CHECKVAL(*a_pVar, a_ExpectVarVal, a_FmtVar); \
     92    } while (0)
     93
     94#define CHECK_OP_AND_VAL_EX2(a_TypeRet, a_FmtRet, a_FmtVar, a_pVar, a_uVar2, a_Operation, a_ExpectRetVal, a_ExpectVarVal, a_ExpectVarVal2) \
     95    do { \
     96        CHECKOP(a_Operation, a_ExpectRetVal, a_FmtRet, a_TypeRet); \
     97        CHECKVAL(*a_pVar, a_ExpectVarVal, a_FmtVar); \
     98        CHECKVAL(a_uVar2, a_ExpectVarVal2, a_FmtVar); \
     99    } while (0)
     100
    81101
    82102/**
    … …  
    697717#endif /* AMD64 || X86 */
    698718
     719#define TEST_READ(a_pVar, a_Type, a_Fmt, a_Function, a_Val)  \
     720    do { *a_pVar = a_Val; CHECKOP(a_Function(a_pVar), a_Val, a_Fmt, a_Type); CHECKVAL(*a_pVar, a_Val, a_Fmt); } while (0)
     721
     722DECLINLINE(void) tstASMAtomicReadU8Worker(uint8_t volatile *pu8)
     723{
     724    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 0);
     725    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 1);
     726    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 2);
     727    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 16);
     728    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 32);
     729    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 32);
     730    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 127);
     731    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 128);
     732    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 169);
     733    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 239);
     734    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 254);
     735    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicReadU8, 255);
     736
     737    int8_t volatile *pi8 = (int8_t volatile *)pu8;
     738    TEST_READ(pi8, uint8_t, "%d", ASMAtomicReadS8, INT8_MAX);
     739    TEST_READ(pi8, uint8_t, "%d", ASMAtomicReadS8, INT8_MIN);
     740    TEST_READ(pi8, uint8_t, "%d", ASMAtomicReadS8, 42);
     741    TEST_READ(pi8, uint8_t, "%d", ASMAtomicReadS8, -21);
     742
     743    bool volatile *pf = (bool volatile *)pu8;
     744    TEST_READ(pf, bool, "%d", ASMAtomicReadBool, true);
     745    TEST_READ(pf, bool, "%d", ASMAtomicReadBool, false);
     746}
     747
     748
     749DECLINLINE(void) tstASMAtomicUoReadU8Worker(uint8_t volatile *pu8)
     750{
     751    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 0);
     752    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 1);
     753    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 2);
     754    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 16);
     755    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 32);
     756    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 32);
     757    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 127);
     758    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 128);
     759    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 169);
     760    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 239);
     761    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 254);
     762    TEST_READ(pu8, uint8_t, "%#x", ASMAtomicUoReadU8, 255);
     763
     764    int8_t volatile *pi8 = (int8_t volatile *)pu8;
     765    TEST_READ(pi8, uint8_t, "%d", ASMAtomicUoReadS8, INT8_MAX);
     766    TEST_READ(pi8, uint8_t, "%d", ASMAtomicUoReadS8, INT8_MIN);
     767    TEST_READ(pi8, uint8_t, "%d", ASMAtomicUoReadS8, 42);
     768    TEST_READ(pi8, uint8_t, "%d", ASMAtomicUoReadS8, -21);
     769
     770    bool volatile *pf = (bool volatile *)pu8;
     771    TEST_READ(pf, bool, "%d", ASMAtomicUoReadBool, true);
     772    TEST_READ(pf, bool, "%d", ASMAtomicUoReadBool, false);
     773}
     774
     775
     776DECLINLINE(void) tstASMAtomicReadU16Worker(uint16_t volatile *pu16)
     777{
     778    TEST_READ(pu16, uint16_t, "%#x", ASMAtomicReadU16, 0);
     779    TEST_READ(pu16, uint16_t, "%#x", ASMAtomicReadU16, 19983);
     780    TEST_READ(pu16, uint16_t, "%#x", ASMAtomicReadU16, INT16_MAX);
     781    TEST_READ(pu16, uint16_t, "%#x", ASMAtomicReadU16, UINT16_MAX);
     782
     783    int16_t volatile *pi16 = (int16_t volatile *)pu16;
     784    TEST_READ(pi16, uint16_t, "%d", ASMAtomicReadS16, INT16_MAX);
     785    TEST_READ(pi16, uint16_t, "%d", ASMAtomicReadS16, INT16_MIN);
     786    TEST_READ(pi16, uint16_t, "%d", ASMAtomicReadS16, 42);
     787    TEST_READ(pi16, uint16_t, "%d", ASMAtomicReadS16, -21);
     788}
     789
     790
     791DECLINLINE(void) tstASMAtomicUoReadU16Worker(uint16_t volatile *pu16)
     792{
     793    TEST_READ(pu16, uint16_t, "%#x", ASMAtomicUoReadU16, 0);
     794    TEST_READ(pu16, uint16_t, "%#x", ASMAtomicUoReadU16, 19983);
     795    TEST_READ(pu16, uint16_t, "%#x", ASMAtomicUoReadU16, INT16_MAX);
     796    TEST_READ(pu16, uint16_t, "%#x", ASMAtomicUoReadU16, UINT16_MAX);
     797
     798    int16_t volatile *pi16 = (int16_t volatile *)pu16;
     799    TEST_READ(pi16, uint16_t, "%d", ASMAtomicUoReadS16, INT16_MAX);
     800    TEST_READ(pi16, uint16_t, "%d", ASMAtomicUoReadS16, INT16_MIN);
     801    TEST_READ(pi16, uint16_t, "%d", ASMAtomicUoReadS16, 42);
     802    TEST_READ(pi16, uint16_t, "%d", ASMAtomicUoReadS16, -21);
     803}
     804
     805
     806DECLINLINE(void) tstASMAtomicReadU32Worker(uint32_t volatile *pu32)
     807{
     808    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicReadU32, 0);
     809    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicReadU32, 19983);
     810    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicReadU32, INT16_MAX);
     811    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicReadU32, UINT16_MAX);
     812    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicReadU32, _1M-1);
     813    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicReadU32, _1M+1);
     814    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicReadU32, _1G-1);
     815    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicReadU32, _1G+1);
     816    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicReadU32, INT32_MAX);
     817    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicReadU32, UINT32_MAX);
     818
     819    int32_t volatile *pi32 = (int32_t volatile *)pu32;
     820    TEST_READ(pi32, uint32_t, "%d", ASMAtomicReadS32, INT32_MAX);
     821    TEST_READ(pi32, uint32_t, "%d", ASMAtomicReadS32, INT32_MIN);
     822    TEST_READ(pi32, uint32_t, "%d", ASMAtomicReadS32, 42);
     823    TEST_READ(pi32, uint32_t, "%d", ASMAtomicReadS32, -21);
     824
     825#if ARCH_BITS == 32
     826    size_t volatile *pcb = (size_t volatile *)pu32;
     827    TEST_READ(pcb, size_t, "%#llz", ASMAtomicReadZ, 0);
     828    TEST_READ(pcb, size_t, "%#llz", ASMAtomicReadZ, ~(size_t)2);
     829    TEST_READ(pcb, size_t, "%#llz", ASMAtomicReadZ, ~(size_t)0 / 4);
     830
     831    void * volatile *ppv = (void * volatile *)pu32;
     832    TEST_READ(ppv, void *, "%p", ASMAtomicReadPtr, NULL);
     833    TEST_READ(ppv, void *, "%p", ASMAtomicReadPtr, (void *)~(uintptr_t)42);
     834
     835    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)pu32;
     836    RTSEMEVENT hEvt = ASMAtomicReadPtrT(phEvt, RTSEMEVENT);
     837    CHECKVAL(hEvt, (RTSEMEVENT)~(uintptr_t)42, "%p");
     838
     839    ASMAtomicReadHandle(phEvt, &hEvt);
     840    CHECKVAL(hEvt, (RTSEMEVENT)~(uintptr_t)42, "%p");
     841#endif
     842}
     843
     844
     845DECLINLINE(void) tstASMAtomicUoReadU32Worker(uint32_t volatile *pu32)
     846{
     847    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicUoReadU32, 0);
     848    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicUoReadU32, 19983);
     849    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicUoReadU32, INT16_MAX);
     850    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicUoReadU32, UINT16_MAX);
     851    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicUoReadU32, _1M-1);
     852    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicUoReadU32, _1M+1);
     853    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicUoReadU32, _1G-1);
     854    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicUoReadU32, _1G+1);
     855    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicUoReadU32, INT32_MAX);
     856    TEST_READ(pu32, uint32_t, "%#x", ASMAtomicUoReadU32, UINT32_MAX);
     857
     858    int32_t volatile *pi32 = (int32_t volatile *)pu32;
     859    TEST_READ(pi32, uint32_t, "%d", ASMAtomicUoReadS32, INT32_MAX);
     860    TEST_READ(pi32, uint32_t, "%d", ASMAtomicUoReadS32, INT32_MIN);
     861    TEST_READ(pi32, uint32_t, "%d", ASMAtomicUoReadS32, 42);
     862    TEST_READ(pi32, uint32_t, "%d", ASMAtomicUoReadS32, -21);
     863
     864#if ARCH_BITS == 32
     865    size_t volatile *pcb = (size_t volatile *)pu32;
     866    TEST_READ(pcb, size_t, "%#llz", ASMAtomicUoReadZ, 0);
     867    TEST_READ(pcb, size_t, "%#llz", ASMAtomicUoReadZ, ~(size_t)2);
     868    TEST_READ(pcb, size_t, "%#llz", ASMAtomicUoReadZ, ~(size_t)0 / 4);
     869
     870    void * volatile *ppv = (void * volatile *)pu32;
     871    TEST_READ(ppv, void *, "%p", ASMAtomicUoReadPtr, NULL);
     872    TEST_READ(ppv, void *, "%p", ASMAtomicUoReadPtr, (void *)~(uintptr_t)42);
     873
     874    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)pu32;
     875    RTSEMEVENT hEvt = ASMAtomicUoReadPtrT(phEvt, RTSEMEVENT);
     876    CHECKVAL(hEvt, (RTSEMEVENT)~(uintptr_t)42, "%p");
     877
     878    ASMAtomicUoReadHandle(phEvt, &hEvt);
     879    CHECKVAL(hEvt, (RTSEMEVENT)~(uintptr_t)42, "%p");
     880#endif
     881}
     882
     883
     884DECLINLINE(void) tstASMAtomicReadU64Worker(uint64_t volatile *pu64)
     885{
     886    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, 0);
     887    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, 19983);
     888    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, INT16_MAX);
     889    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, UINT16_MAX);
     890    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, _1M-1);
     891    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, _1M+1);
     892    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, _1G-1);
     893    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, _1G+1);
     894    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, INT32_MAX);
     895    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, UINT32_MAX);
     896    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, INT64_MAX);
     897    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, UINT64_MAX);
     898    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicReadU64, UINT64_C(0x450872549687134));
     899
     900    int64_t volatile *pi64 = (int64_t volatile *)pu64;
     901    TEST_READ(pi64, uint64_t, "%d", ASMAtomicReadS64, INT64_MAX);
     902    TEST_READ(pi64, uint64_t, "%d", ASMAtomicReadS64, INT64_MIN);
     903    TEST_READ(pi64, uint64_t, "%d", ASMAtomicReadS64, 42);
     904    TEST_READ(pi64, uint64_t, "%d", ASMAtomicReadS64, -21);
     905
     906#if ARCH_BITS == 64
     907    size_t volatile *pcb = (size_t volatile *)pu64;
     908    TEST_READ(pcb, size_t, "%#llz", ASMAtomicReadZ, 0);
     909    TEST_READ(pcb, size_t, "%#llz", ASMAtomicReadZ, ~(size_t)2);
     910    TEST_READ(pcb, size_t, "%#llz", ASMAtomicReadZ, ~(size_t)0 / 4);
     911
     912    void * volatile *ppv = (void * volatile *)pu64;
     913    TEST_READ(ppv, void *, "%p", ASMAtomicReadPtr, NULL);
     914    TEST_READ(ppv, void *, "%p", ASMAtomicReadPtr, (void *)~(uintptr_t)42);
     915
     916    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)pu64;
     917    RTSEMEVENT hEvt = ASMAtomicReadPtrT(phEvt, RTSEMEVENT);
     918    CHECKVAL(hEvt, (RTSEMEVENT)~(uintptr_t)42, "%p");
     919
     920    ASMAtomicReadHandle(phEvt, &hEvt);
     921    CHECKVAL(hEvt, (RTSEMEVENT)~(uintptr_t)42, "%p");
     922#endif
     923}
     924
     925
     926DECLINLINE(void) tstASMAtomicUoReadU64Worker(uint64_t volatile *pu64)
     927{
     928    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, 0);
     929    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, 19983);
     930    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, INT16_MAX);
     931    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, UINT16_MAX);
     932    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, _1M-1);
     933    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, _1M+1);
     934    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, _1G-1);
     935    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, _1G+1);
     936    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, INT32_MAX);
     937    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, UINT32_MAX);
     938    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, INT64_MAX);
     939    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, UINT64_MAX);
     940    TEST_READ(pu64, uint64_t, "%#llx", ASMAtomicUoReadU64, UINT64_C(0x450872549687134));
     941
     942    int64_t volatile *pi64 = (int64_t volatile *)pu64;
     943    TEST_READ(pi64, uint64_t, "%d", ASMAtomicUoReadS64, INT64_MAX);
     944    TEST_READ(pi64, uint64_t, "%d", ASMAtomicUoReadS64, INT64_MIN);
     945    TEST_READ(pi64, uint64_t, "%d", ASMAtomicUoReadS64, 42);
     946    TEST_READ(pi64, uint64_t, "%d", ASMAtomicUoReadS64, -21);
     947
     948#if ARCH_BITS == 64
     949    size_t volatile *pcb = (size_t volatile *)pu64;
     950    TEST_READ(pcb, size_t, "%#llz", ASMAtomicUoReadZ, 0);
     951    TEST_READ(pcb, size_t, "%#llz", ASMAtomicUoReadZ, ~(size_t)2);
     952    TEST_READ(pcb, size_t, "%#llz", ASMAtomicUoReadZ, ~(size_t)0 / 4);
     953
     954    void * volatile *ppv = (void * volatile *)pu64;
     955    TEST_READ(ppv, void *, "%p", ASMAtomicUoReadPtr, NULL);
     956    TEST_READ(ppv, void *, "%p", ASMAtomicUoReadPtr, (void *)~(uintptr_t)42);
     957
     958    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)pu64;
     959    RTSEMEVENT hEvt = ASMAtomicUoReadPtrT(phEvt, RTSEMEVENT);
     960    CHECKVAL(hEvt, (RTSEMEVENT)~(uintptr_t)42, "%p");
     961
     962    ASMAtomicUoReadHandle(phEvt, &hEvt);
     963    CHECKVAL(hEvt, (RTSEMEVENT)~(uintptr_t)42, "%p");
     964#endif
     965}
     966
     967
     968static void tstASMAtomicRead(void)
     969{
     970    DO_SIMPLE_TEST(ASMAtomicReadU8, uint8_t);
     971    DO_SIMPLE_TEST(ASMAtomicUoReadU8, uint8_t);
     972
     973    DO_SIMPLE_TEST(ASMAtomicReadU16, uint16_t);
     974    DO_SIMPLE_TEST(ASMAtomicUoReadU16, uint16_t);
     975
     976    DO_SIMPLE_TEST(ASMAtomicReadU32, uint32_t);
     977    DO_SIMPLE_TEST(ASMAtomicUoReadU32, uint32_t);
     978
     979    DO_SIMPLE_TEST(ASMAtomicReadU64, uint64_t);
     980    DO_SIMPLE_TEST(ASMAtomicUoReadU64, uint64_t);
     981}
     982
     983
     984#define TEST_WRITE(a_pVar, a_Type, a_Fmt, a_Function, a_Val)  \
     985    do { a_Function(a_pVar, a_Val); CHECKVAL(*a_pVar, a_Val, a_Fmt); } while (0)
     986
     987DECLINLINE(void) tstASMAtomicWriteU8Worker(uint8_t volatile *pu8)
     988{
     989    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 0);
     990    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 1);
     991    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 2);
     992    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 16);
     993    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 32);
     994    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 32);
     995    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 127);
     996    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 128);
     997    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 169);
     998    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 239);
     999    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 254);
     1000    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicWriteU8, 255);
     1001
     1002    volatile int8_t *pi8 = (volatile int8_t *)pu8;
     1003    TEST_WRITE(pi8, int8_t, "%d", ASMAtomicWriteS8, INT8_MIN);
     1004    TEST_WRITE(pi8, int8_t, "%d", ASMAtomicWriteS8, INT8_MAX);
     1005    TEST_WRITE(pi8, int8_t, "%d", ASMAtomicWriteS8, 42);
     1006    TEST_WRITE(pi8, int8_t, "%d", ASMAtomicWriteS8, -41);
     1007
     1008    volatile bool *pf = (volatile bool *)pu8;
     1009    TEST_WRITE(pf, bool, "%d", ASMAtomicWriteBool, true);
     1010    TEST_WRITE(pf, bool, "%d", ASMAtomicWriteBool, false);
     1011}
     1012
     1013
     1014DECLINLINE(void) tstASMAtomicUoWriteU8Worker(uint8_t volatile *pu8)
     1015{
     1016    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 0);
     1017    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 1);
     1018    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 2);
     1019    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 16);
     1020    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 32);
     1021    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 32);
     1022    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 127);
     1023    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 128);
     1024    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 169);
     1025    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 239);
     1026    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 254);
     1027    TEST_WRITE(pu8, uint8_t, "%#x", ASMAtomicUoWriteU8, 255);
     1028
     1029    volatile int8_t *pi8 = (volatile int8_t *)pu8;
     1030    TEST_WRITE(pi8, int8_t, "%d", ASMAtomicUoWriteS8, INT8_MIN);
     1031    TEST_WRITE(pi8, int8_t, "%d", ASMAtomicUoWriteS8, INT8_MAX);
     1032    TEST_WRITE(pi8, int8_t, "%d", ASMAtomicUoWriteS8, 42);
     1033    TEST_WRITE(pi8, int8_t, "%d", ASMAtomicUoWriteS8, -41);
     1034
     1035    volatile bool *pf = (volatile bool *)pu8;
     1036    TEST_WRITE(pf, bool, "%d", ASMAtomicUoWriteBool, true);
     1037    TEST_WRITE(pf, bool, "%d", ASMAtomicUoWriteBool, false);
     1038}
     1039
     1040
     1041DECLINLINE(void) tstASMAtomicWriteU16Worker(uint16_t volatile *pu16)
     1042{
     1043    TEST_WRITE(pu16, uint16_t, "%#x", ASMAtomicWriteU16, 0);
     1044    TEST_WRITE(pu16, uint16_t, "%#x", ASMAtomicWriteU16, 19983);
     1045    TEST_WRITE(pu16, uint16_t, "%#x", ASMAtomicWriteU16, INT16_MAX);
     1046    TEST_WRITE(pu16, uint16_t, "%#x", ASMAtomicWriteU16, UINT16_MAX);
     1047
     1048    volatile int16_t *pi16 = (volatile int16_t *)pu16;
     1049    TEST_WRITE(pi16, int16_t, "%d", ASMAtomicWriteS16, INT16_MIN);
     1050    TEST_WRITE(pi16, int16_t, "%d", ASMAtomicWriteS16, INT16_MAX);
     1051    TEST_WRITE(pi16, int16_t, "%d", ASMAtomicWriteS16, 42);
     1052    TEST_WRITE(pi16, int16_t, "%d", ASMAtomicWriteS16, -41);
     1053}
     1054
     1055
     1056DECLINLINE(void) tstASMAtomicUoWriteU16Worker(uint16_t volatile *pu16)
     1057{
     1058    TEST_WRITE(pu16, uint16_t, "%#x", ASMAtomicUoWriteU16, 0);
     1059    TEST_WRITE(pu16, uint16_t, "%#x", ASMAtomicUoWriteU16, 19983);
     1060    TEST_WRITE(pu16, uint16_t, "%#x", ASMAtomicUoWriteU16, INT16_MAX);
     1061    TEST_WRITE(pu16, uint16_t, "%#x", ASMAtomicUoWriteU16, UINT16_MAX);
     1062
     1063    volatile int16_t *pi16 = (volatile int16_t *)pu16;
     1064    TEST_WRITE(pi16, int16_t, "%d", ASMAtomicUoWriteS16, INT16_MIN);
     1065    TEST_WRITE(pi16, int16_t, "%d", ASMAtomicUoWriteS16, INT16_MAX);
     1066    TEST_WRITE(pi16, int16_t, "%d", ASMAtomicUoWriteS16, 42);
     1067    TEST_WRITE(pi16, int16_t, "%d", ASMAtomicUoWriteS16, -41);
     1068}
     1069
     1070
     1071DECLINLINE(void) tstASMAtomicWriteU32Worker(uint32_t volatile *pu32)
     1072{
     1073    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicWriteU32, 0);
     1074    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicWriteU32, 19983);
     1075    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicWriteU32, INT16_MAX);
     1076    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicWriteU32, UINT16_MAX);
     1077    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicWriteU32, _1M-1);
     1078    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicWriteU32, _1M+1);
     1079    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicWriteU32, _1G-1);
     1080    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicWriteU32, _1G+1);
     1081    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicWriteU32, INT32_MAX);
     1082    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicWriteU32, UINT32_MAX);
     1083
     1084    volatile int32_t *pi32 = (volatile int32_t *)pu32;
     1085    TEST_WRITE(pi32, int32_t, "%d", ASMAtomicWriteS32, INT32_MIN);
     1086    TEST_WRITE(pi32, int32_t, "%d", ASMAtomicWriteS32, INT32_MAX);
     1087    TEST_WRITE(pi32, int32_t, "%d", ASMAtomicWriteS32, 42);
     1088    TEST_WRITE(pi32, int32_t, "%d", ASMAtomicWriteS32, -41);
     1089
     1090#if ARCH_BITS == 32
     1091    size_t volatile *pcb = (size_t volatile *)pu32;
     1092    TEST_WRITE(pcb, size_t, "%#zx", ASMAtomicWriteZ, ~(size_t)42);
     1093    TEST_WRITE(pcb, size_t, "%#zx", ASMAtomicWriteZ, 42);
     1094
     1095    void * volatile *ppv = (void * volatile *)pu32;
     1096    TEST_WRITE(ppv, void *, "%#zx", ASMAtomicWritePtrVoid, NULL);
     1097    TEST_WRITE(ppv, void *, "%#zx", ASMAtomicWritePtrVoid, (void *)~(uintptr_t)12938754);
     1098
     1099    ASMAtomicWriteNullPtr(ppv); CHECKVAL(*ppv, NULL, "%p");
     1100    ASMAtomicWritePtr(ppv, (void *)~(intptr_t)2322434); CHECKVAL(*ppv, (void *)~(intptr_t)2322434, "%p");
     1101
     1102    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)pu32;
     1103    ASMAtomicWriteHandle(phEvt, (RTSEMEVENT)(uintptr_t)99753456);  CHECKVAL(*phEvt, (RTSEMEVENT)(uintptr_t)99753456, "%p");
     1104#endif
     1105}
     1106
     1107
     1108DECLINLINE(void) tstASMAtomicUoWriteU32Worker(uint32_t volatile *pu32)
     1109{
     1110    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicUoWriteU32, 0);
     1111    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicUoWriteU32, 19983);
     1112    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicUoWriteU32, INT16_MAX);
     1113    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicUoWriteU32, UINT16_MAX);
     1114    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicUoWriteU32, _1M-1);
     1115    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicUoWriteU32, _1M+1);
     1116    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicUoWriteU32, _1G-1);
     1117    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicUoWriteU32, _1G+1);
     1118    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicUoWriteU32, INT32_MAX);
     1119    TEST_WRITE(pu32, uint32_t, "%#x", ASMAtomicUoWriteU32, UINT32_MAX);
     1120
     1121    volatile int32_t *pi32 = (volatile int32_t *)pu32;
     1122    TEST_WRITE(pi32, int32_t, "%d", ASMAtomicUoWriteS32, INT32_MIN);
     1123    TEST_WRITE(pi32, int32_t, "%d", ASMAtomicUoWriteS32, INT32_MAX);
     1124    TEST_WRITE(pi32, int32_t, "%d", ASMAtomicUoWriteS32, 42);
     1125    TEST_WRITE(pi32, int32_t, "%d", ASMAtomicUoWriteS32, -41);
     1126
     1127#if ARCH_BITS == 32
     1128    size_t volatile *pcb = (size_t volatile *)pu32;
     1129    TEST_WRITE(pcb, size_t, "%#zx", ASMAtomicUoWriteZ, ~(size_t)42);
     1130    TEST_WRITE(pcb, size_t, "%#zx", ASMAtomicUoWriteZ, 42);
     1131
     1132    void * volatile *ppv = (void * volatile *)pu32;
     1133    TEST_WRITE(ppv, void *, "%#zx", ASMAtomicUoWritePtrVoid, NULL);
     1134    TEST_WRITE(ppv, void *, "%#zx", ASMAtomicUoWritePtrVoid, (void *)~(uintptr_t)12938754);
     1135
     1136    ASMAtomicUoWriteNullPtr(ppv); CHECKVAL(*ppv, NULL, "%p");
     1137    ASMAtomicUoWritePtr(ppv, (void *)~(intptr_t)2322434); CHECKVAL(*ppv, (void *)~(intptr_t)2322434, "%p");
     1138
     1139    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)pu32;
     1140    ASMAtomicUoWriteHandle(phEvt, (RTSEMEVENT)(uintptr_t)99753456);  CHECKVAL(*phEvt, (RTSEMEVENT)(uintptr_t)99753456, "%p");
     1141#endif
     1142}
     1143
     1144
     1145DECLINLINE(void) tstASMAtomicWriteU64Worker(uint64_t volatile *pu64)
     1146{
     1147    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, 0);
     1148    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, 19983);
     1149    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, INT16_MAX);
     1150    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, UINT16_MAX);
     1151    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, _1M-1);
     1152    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, _1M+1);
     1153    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, _1G-1);
     1154    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, _1G+1);
     1155    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, INT32_MAX);
     1156    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, UINT32_MAX);
     1157    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, INT64_MAX);
     1158    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, UINT64_MAX);
     1159    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicWriteU64, UINT64_C(0x450872549687134));
     1160
     1161    volatile int64_t *pi64 = (volatile int64_t *)pu64;
     1162    TEST_WRITE(pi64, int64_t, "%d", ASMAtomicWriteS64, INT64_MIN);
     1163    TEST_WRITE(pi64, int64_t, "%d", ASMAtomicWriteS64, INT64_MAX);
     1164    TEST_WRITE(pi64, int64_t, "%d", ASMAtomicWriteS64, 42);
     1165
     1166#if ARCH_BITS == 64
     1167    size_t volatile *pcb = (size_t volatile *)pu64;
     1168    TEST_WRITE(pcb, size_t, "%#zx", ASMAtomicWriteZ, ~(size_t)42);
     1169    TEST_WRITE(pcb, size_t, "%#zx", ASMAtomicWriteZ, 42);
     1170
     1171    void * volatile *ppv = (void * volatile *)pu64;
     1172    TEST_WRITE(ppv, void *, "%#zx", ASMAtomicWritePtrVoid, NULL);
     1173    TEST_WRITE(ppv, void *, "%#zx", ASMAtomicWritePtrVoid, (void *)~(uintptr_t)12938754);
     1174
     1175    ASMAtomicWriteNullPtr(ppv); CHECKVAL(*ppv, NULL, "%p");
     1176    ASMAtomicWritePtr(ppv, (void *)~(intptr_t)2322434); CHECKVAL(*ppv, (void *)~(intptr_t)2322434, "%p");
     1177
     1178    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)pu64;
     1179    ASMAtomicWriteHandle(phEvt, (RTSEMEVENT)(uintptr_t)99753456);  CHECKVAL(*phEvt, (RTSEMEVENT)(uintptr_t)99753456, "%p");
     1180#endif
     1181}
     1182
     1183
     1184DECLINLINE(void) tstASMAtomicUoWriteU64Worker(uint64_t volatile *pu64)
     1185{
     1186    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, 0);
     1187    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, 19983);
     1188    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, INT16_MAX);
     1189    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, UINT16_MAX);
     1190    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, _1M-1);
     1191    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, _1M+1);
     1192    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, _1G-1);
     1193    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, _1G+1);
     1194    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, INT32_MAX);
     1195    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, UINT32_MAX);
     1196    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, INT64_MAX);
     1197    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, UINT64_MAX);
     1198    TEST_WRITE(pu64, uint64_t, "%#llx", ASMAtomicUoWriteU64, UINT64_C(0x450872549687134));
     1199
     1200    volatile int64_t *pi64 = (volatile int64_t *)pu64;
     1201    TEST_WRITE(pi64, int64_t, "%d", ASMAtomicUoWriteS64, INT64_MIN);
     1202    TEST_WRITE(pi64, int64_t, "%d", ASMAtomicUoWriteS64, INT64_MAX);
     1203    TEST_WRITE(pi64, int64_t, "%d", ASMAtomicUoWriteS64, 42);
     1204
     1205#if ARCH_BITS == 64
     1206    size_t volatile *pcb = (size_t volatile *)pu64;
     1207    TEST_WRITE(pcb, size_t, "%#zx", ASMAtomicUoWriteZ, ~(size_t)42);
     1208    TEST_WRITE(pcb, size_t, "%#zx", ASMAtomicUoWriteZ, 42);
     1209
     1210    void * volatile *ppv = (void * volatile *)pu64;
     1211    TEST_WRITE(ppv, void *, "%#zx", ASMAtomicUoWritePtrVoid, NULL);
     1212    TEST_WRITE(ppv, void *, "%#zx", ASMAtomicUoWritePtrVoid, (void *)~(uintptr_t)12938754);
     1213
     1214    ASMAtomicUoWriteNullPtr(ppv); CHECKVAL(*ppv, NULL, "%p");
     1215    ASMAtomicUoWritePtr(ppv, (void *)~(intptr_t)2322434); CHECKVAL(*ppv, (void *)~(intptr_t)2322434, "%p");
     1216
     1217    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)pu64;
     1218    ASMAtomicUoWriteHandle(phEvt, (RTSEMEVENT)(uintptr_t)99753456);  CHECKVAL(*phEvt, (RTSEMEVENT)(uintptr_t)99753456, "%p");
     1219#endif
     1220}
     1221
     1222static void tstASMAtomicWrite(void)
     1223{
     1224    DO_SIMPLE_TEST(ASMAtomicWriteU8, uint8_t);
     1225    DO_SIMPLE_TEST(ASMAtomicUoWriteU8, uint8_t);
     1226
     1227    DO_SIMPLE_TEST(ASMAtomicWriteU16, uint16_t);
     1228    DO_SIMPLE_TEST(ASMAtomicUoWriteU16, uint16_t);
     1229
     1230    DO_SIMPLE_TEST(ASMAtomicWriteU32, uint32_t);
     1231    DO_SIMPLE_TEST(ASMAtomicUoWriteU32, uint32_t);
     1232
     1233    DO_SIMPLE_TEST(ASMAtomicWriteU64, uint64_t);
     1234    DO_SIMPLE_TEST(ASMAtomicUoWriteU64, uint64_t);
     1235}
     1236
     1237
    6991238DECLINLINE(void) tstASMAtomicXchgU8Worker(uint8_t volatile *pu8)
    7001239{
    7011240    *pu8 = 0;
    702     CHECKOP(ASMAtomicXchgU8(pu8, 1), 0, "%#x", uint8_t);
    703     CHECKVAL(*pu8, 1, "%#x");
    704 
    705     CHECKOP(ASMAtomicXchgU8(pu8, 0), 1, "%#x", uint8_t);
    706     CHECKVAL(*pu8, 0, "%#x");
    707 
    708     CHECKOP(ASMAtomicXchgU8(pu8, UINT8_C(0xff)), 0, "%#x", uint8_t);
    709     CHECKVAL(*pu8, 0xff, "%#x");
    710 
    711     CHECKOP(ASMAtomicXchgU8(pu8, UINT8_C(0x87)), UINT8_C(0xff), "%#x", uint8_t);
    712     CHECKVAL(*pu8, 0x87, "%#x");
    713 }
    714 
    715 
    716 static void tstASMAtomicXchgU8(void)
     1241    CHECK_OP_AND_VAL(uint8_t, "%#x", pu8, ASMAtomicXchgU8(pu8, 1), 0, 1);
     1242    CHECK_OP_AND_VAL(uint8_t, "%#x", pu8, ASMAtomicXchgU8(pu8, UINT8_C(0xff)), 1, UINT8_C(0xff));
     1243    CHECK_OP_AND_VAL(uint8_t, "%#x", pu8, ASMAtomicXchgU8(pu8, UINT8_C(0x87)), UINT8_C(0xff), UINT8_C(0x87));
     1244    CHECK_OP_AND_VAL(uint8_t, "%#x", pu8, ASMAtomicXchgU8(pu8, UINT8_C(0xfe)), UINT8_C(0x87), UINT8_C(0xfe));
     1245
     1246    int8_t volatile *pi8 = (int8_t volatile *)pu8;
     1247    CHECK_OP_AND_VAL(int8_t,  "%d",  pi8, ASMAtomicXchgS8(pi8, INT8_C(-4)), UINT8_C(-2), UINT8_C(-4));
     1248    CHECK_OP_AND_VAL(int8_t,  "%d",  pi8, ASMAtomicXchgS8(pi8, INT8_C(4)), UINT8_C(-4), UINT8_C(4));
     1249    CHECK_OP_AND_VAL(int8_t,  "%d",  pi8, ASMAtomicXchgS8(pi8, INT8_MAX), UINT8_C(4), INT8_MAX);
     1250    CHECK_OP_AND_VAL(int8_t,  "%d",  pi8, ASMAtomicXchgS8(pi8, INT8_MIN), INT8_MAX, INT8_MIN);
     1251    CHECK_OP_AND_VAL(int8_t,  "%d",  pi8, ASMAtomicXchgS8(pi8, 1), INT8_MIN, 1);
     1252
     1253    bool volatile *pf = (bool volatile *)pu8;
     1254    CHECK_OP_AND_VAL(bool, "%d", pf, ASMAtomicXchgBool(pf, false), true, false);
     1255    CHECK_OP_AND_VAL(bool, "%d", pf, ASMAtomicXchgBool(pf, false), false, false);
     1256    CHECK_OP_AND_VAL(bool, "%d", pf, ASMAtomicXchgBool(pf, true), false, true);
     1257}
     1258
     1259
     1260DECLINLINE(void) tstASMAtomicXchgU16Worker(uint16_t volatile *pu16)
     1261{
     1262    *pu16 = 0;
     1263    CHECK_OP_AND_VAL(uint16_t, "%#x", pu16, ASMAtomicXchgU16(pu16, 1), 0, 1);
     1264    CHECK_OP_AND_VAL(uint16_t, "%#x", pu16, ASMAtomicXchgU16(pu16, 0), 1, 0);
     1265    CHECK_OP_AND_VAL(uint16_t, "%#x", pu16, ASMAtomicXchgU16(pu16, UINT16_MAX), 0, UINT16_MAX);
     1266    CHECK_OP_AND_VAL(uint16_t, "%#x", pu16, ASMAtomicXchgU16(pu16, UINT16_C(0x7fff)), UINT16_MAX, UINT16_C(0x7fff));
     1267    CHECK_OP_AND_VAL(uint16_t, "%#x", pu16, ASMAtomicXchgU16(pu16, UINT16_C(0x8765)), UINT16_C(0x7fff), UINT16_C(0x8765));
     1268    CHECK_OP_AND_VAL(uint16_t, "%#x", pu16, ASMAtomicXchgU16(pu16, UINT16_C(0xfffe)), UINT16_C(0x8765), UINT16_C(0xfffe));
     1269
     1270    int16_t volatile *pi16 = (int16_t volatile *)pu16;
     1271    CHECK_OP_AND_VAL(int16_t, "%d", pi16, ASMAtomicXchgS16(pi16, INT16_MIN), INT16_C(-2), INT16_MIN);
     1272    CHECK_OP_AND_VAL(int16_t, "%d", pi16, ASMAtomicXchgS16(pi16, INT16_MAX), INT16_MIN, INT16_MAX);
     1273    CHECK_OP_AND_VAL(int16_t, "%d", pi16, ASMAtomicXchgS16(pi16, -8), INT16_MAX, -8);
     1274    CHECK_OP_AND_VAL(int16_t, "%d", pi16, ASMAtomicXchgS16(pi16, 8), -8, 8);
     1275}
     1276
     1277
     1278DECLINLINE(void) tstASMAtomicXchgU32Worker(uint32_t volatile *pu32)
     1279{
     1280    *pu32 = 0;
     1281    CHECK_OP_AND_VAL(uint32_t, "%#x", pu32, ASMAtomicXchgU32(pu32, 1), 0, 1);
     1282    CHECK_OP_AND_VAL(uint32_t, "%#x", pu32, ASMAtomicXchgU32(pu32, 0), 1, 0);
     1283    CHECK_OP_AND_VAL(uint32_t, "%#x", pu32, ASMAtomicXchgU32(pu32, UINT32_MAX), 0, UINT32_MAX);
     1284    CHECK_OP_AND_VAL(uint32_t, "%#x", pu32, ASMAtomicXchgU32(pu32, UINT32_C(0x87654321)), UINT32_MAX, UINT32_C(0x87654321));
     1285    CHECK_OP_AND_VAL(uint32_t, "%#x", pu32, ASMAtomicXchgU32(pu32, UINT32_C(0xfffffffe)), UINT32_C(0x87654321), UINT32_C(0xfffffffe));
     1286
     1287    int32_t volatile *pi32 = (int32_t volatile *)pu32;
     1288    CHECK_OP_AND_VAL(int32_t, "%d", pi32, ASMAtomicXchgS32(pi32, INT32_MIN), INT32_C(-2), INT32_MIN);
     1289    CHECK_OP_AND_VAL(int32_t, "%d", pi32, ASMAtomicXchgS32(pi32, INT32_MAX), INT32_MIN, INT32_MAX);
     1290    CHECK_OP_AND_VAL(int32_t, "%d", pi32, ASMAtomicXchgS32(pi32, -16), INT32_MAX, -16);
     1291    CHECK_OP_AND_VAL(int32_t, "%d", pi32, ASMAtomicXchgS32(pi32, 16), -16, 16);
     1292
     1293#if ARCH_BITS == 32
     1294    size_t volatile *pcb = (size_t volatile *)pu32;
     1295    CHECK_OP_AND_VAL(size_t, "%#zx", pcb, ASMAtomicXchgZ(pcb, UINT32_C(0x9481239b)), 0x10, UINT32_C(0x9481239b));
     1296    CHECK_OP_AND_VAL(size_t, "%#zx", pcb, ASMAtomicXchgZ(pcb, UINT32_C(0xcdef1234)), UINT32_C(0x9481239b), UINT32_C(0xcdef1234));
     1297#endif
     1298
     1299#if R0_ARCH_BITS == 32
     1300    RTR0PTR volatile *pR0Ptr = (RTR0PTR volatile *)pu32;
     1301    CHECK_OP_AND_VAL(size_t, "%#llx", pcb, ASMAtomicXchgR0Ptr(pR0Ptr, UINT32_C(0x80341237)), UINT32_C(0xcdef1234), UINT32_C(0x80341237));
     1302#endif
     1303}
     1304
     1305
     1306DECLINLINE(void) tstASMAtomicXchgU64Worker(uint64_t volatile *pu64)
     1307{
     1308    *pu64 = 0;
     1309    CHECK_OP_AND_VAL(uint64_t, "%#llx", pu64, ASMAtomicXchgU64(pu64, 1), 0, 1);
     1310    CHECK_OP_AND_VAL(uint64_t, "%#llx", pu64, ASMAtomicXchgU64(pu64, 0), 1, 0);
     1311    CHECK_OP_AND_VAL(uint64_t, "%#llx", pu64, ASMAtomicXchgU64(pu64, UINT64_MAX), 0, UINT64_MAX);
     1312    CHECK_OP_AND_VAL(uint64_t, "%#llx", pu64, ASMAtomicXchgU64(pu64, UINT64_C(0xfedcba0987654321)), UINT64_MAX, UINT64_C(0xfedcba0987654321));
     1313    CHECK_OP_AND_VAL(uint64_t, "%#llx", pu64, ASMAtomicXchgU64(pu64, UINT64_C(0xfffffffffffffffe)), UINT64_C(0xfedcba0987654321), UINT64_C(0xfffffffffffffffe));
     1314
     1315    int64_t volatile *pi64 = (int64_t volatile *)pu64;
     1316    CHECK_OP_AND_VAL(int64_t, "%lld", pi64, ASMAtomicXchgS64(pi64, INT64_MAX), -2, INT64_MAX);
     1317    CHECK_OP_AND_VAL(int64_t, "%lld", pi64, ASMAtomicXchgS64(pi64, INT64_MIN), INT64_MAX, INT64_MIN);
     1318    CHECK_OP_AND_VAL(int64_t, "%lld", pi64, ASMAtomicXchgS64(pi64, -32), INT64_MIN, -32);
     1319    CHECK_OP_AND_VAL(int64_t, "%lld", pi64, ASMAtomicXchgS64(pi64, 32), -32, 32);
     1320
     1321#if ARCH_BITS == 64
     1322    size_t volatile *pcb = (size_t volatile *)pu64;
     1323    CHECK_OP_AND_VAL(size_t, "%#zx", pcb, ASMAtomicXchgZ(pcb, UINT64_C(0x94812396759)), 0x20, UINT64_C(0x94812396759));
     1324    CHECK_OP_AND_VAL(size_t, "%#zx", pcb, ASMAtomicXchgZ(pcb, UINT64_C(0xcdef1234abdf7896)), UINT64_C(0x94812396759), UINT64_C(0xcdef1234abdf7896));
     1325#endif
     1326
     1327#if R0_ARCH_BITS == 64
     1328    RTR0PTR volatile *pR0Ptr = (RTR0PTR volatile *)pu64;
     1329    CHECK_OP_AND_VAL(size_t, "%#llx", pcb, ASMAtomicXchgR0Ptr(pR0Ptr, UINT64_C(0xfedc1234567890ab)), UINT64_C(0xcdef1234abdf7896), UINT64_C(0xfedc1234567890ab));
     1330#endif
     1331}
     1332
     1333
     1334DECLINLINE(void) tstASMAtomicXchgPtrWorker(void * volatile *ppv)
     1335{
     1336    *ppv = NULL;
     1337    CHECK_OP_AND_VAL(void *, "%p", ppv, ASMAtomicXchgPtr(ppv, (void *)(~(uintptr_t)0)), NULL, (void *)(~(uintptr_t)0));
     1338    CHECK_OP_AND_VAL(void *, "%p", ppv, ASMAtomicXchgPtr(ppv, (void *)(~(uintptr_t)0x87654321)), (void *)(~(uintptr_t)0), (void *)(~(uintptr_t)0x87654321));
     1339    CHECK_OP_AND_VAL(void *, "%p", ppv, ASMAtomicXchgPtr(ppv, NULL), (void *)(~(uintptr_t)0x87654321), NULL);
     1340
     1341    CHECK_OP_AND_VAL(void *, "%p", ppv, ASMAtomicXchgR3Ptr(ppv, (void *)ppv), NULL, (void *)ppv);
     1342
     1343    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)ppv;
     1344    RTSEMEVENT hRet;
     1345    ASMAtomicXchgHandle(phEvt, (RTSEMEVENT)(~(uintptr_t)12345), &hRet);
     1346    CHECKVAL(hRet, (RTSEMEVENT)ppv, "%p");
     1347    CHECKVAL(*phEvt, (RTSEMEVENT)(~(uintptr_t)12345), "%p");
     1348}
     1349
     1350
     1351static void tstASMAtomicXchg(void)
    7171352{
    7181353    DO_SIMPLE_TEST(ASMAtomicXchgU8, uint8_t);
    719 }
    720 
    721 
    722 DECLINLINE(void) tstASMAtomicXchgU16Worker(uint16_t volatile *pu16)
    723 {
    724     *pu16 = 0;
    725 
    726     CHECKOP(ASMAtomicXchgU16(pu16, 1), 0, "%#x", uint16_t);
    727     CHECKVAL(*pu16, 1, "%#x");
    728 
    729     CHECKOP(ASMAtomicXchgU16(pu16, 0), 1, "%#x", uint16_t);
    730     CHECKVAL(*pu16, 0, "%#x");
    731 
    732     CHECKOP(ASMAtomicXchgU16(pu16, 0xffff), 0, "%#x", uint16_t);
    733     CHECKVAL(*pu16, 0xffff, "%#x");
    734 
    735     CHECKOP(ASMAtomicXchgU16(pu16, 0x8765), 0xffff, "%#x", uint16_t);
    736     CHECKVAL(*pu16, 0x8765, "%#x");
    737 }
    738 
    739 
    740 static void tstASMAtomicXchgU16(void)
    741 {
    7421354    DO_SIMPLE_TEST(ASMAtomicXchgU16, uint16_t);
    743 }
    744 
    745 
    746 DECLINLINE(void) tstASMAtomicXchgU32Worker(uint32_t volatile *pu32)
    747 {
    748     *pu32 = 0;
    749 
    750     CHECKOP(ASMAtomicXchgU32(pu32, 1), 0, "%#x", uint32_t);
    751     CHECKVAL(*pu32, 1, "%#x");
    752 
    753     CHECKOP(ASMAtomicXchgU32(pu32, 0), 1, "%#x", uint32_t);
    754     CHECKVAL(*pu32, 0, "%#x");
    755 
    756     CHECKOP(ASMAtomicXchgU32(pu32, ~UINT32_C(0)), 0, "%#x", uint32_t);
    757     CHECKVAL(*pu32, ~UINT32_C(0), "%#x");
    758 
    759     CHECKOP(ASMAtomicXchgU32(pu32, 0x87654321), ~UINT32_C(0), "%#x", uint32_t);
    760     CHECKVAL(*pu32, 0x87654321, "%#x");
    761 }
    762 
    763 
    764 static void tstASMAtomicXchgU32(void)
    765 {
    7661355    DO_SIMPLE_TEST(ASMAtomicXchgU32, uint32_t);
    767 }
    768 
    769 
    770 DECLINLINE(void) tstASMAtomicXchgU64Worker(uint64_t volatile *pu64)
    771 {
    772     *pu64 = 0;
    773 
    774     CHECKOP(ASMAtomicXchgU64(pu64, 1), UINT64_C(0), "%#llx", uint64_t);
    775     CHECKVAL(*pu64, UINT64_C(1), "%#llx");
    776 
    777     CHECKOP(ASMAtomicXchgU64(pu64, 0), UINT64_C(1), "%#llx", uint64_t);
    778     CHECKVAL(*pu64, UINT64_C(0), "%#llx");
    779 
    780     CHECKOP(ASMAtomicXchgU64(pu64, ~UINT64_C(0)), UINT64_C(0), "%#llx", uint64_t);
    781     CHECKVAL(*pu64, ~UINT64_C(0), "%#llx");
    782 
    783     CHECKOP(ASMAtomicXchgU64(pu64, UINT64_C(0xfedcba0987654321)),  ~UINT64_C(0), "%#llx", uint64_t);
    784     CHECKVAL(*pu64, UINT64_C(0xfedcba0987654321), "%#llx");
    785 }
    786 
    787 
    788 static void tstASMAtomicXchgU64(void)
    789 {
    7901356    DO_SIMPLE_TEST(ASMAtomicXchgU64, uint64_t);
    791 }
    792 
    793 
    794 DECLINLINE(void) tstASMAtomicXchgPtrWorker(void * volatile *ppv)
    795 {
    796     *ppv = NULL;
    797 
    798     CHECKOP(ASMAtomicXchgPtr(ppv, (void *)(~(uintptr_t)0)), NULL, "%p", void *);
    799     CHECKVAL(*ppv, (void *)(~(uintptr_t)0), "%p");
    800 
    801     CHECKOP(ASMAtomicXchgPtr(ppv, (void *)(uintptr_t)0x87654321), (void *)(~(uintptr_t)0), "%p", void *);
    802     CHECKVAL(*ppv, (void *)(uintptr_t)0x87654321, "%p");
    803 
    804     CHECKOP(ASMAtomicXchgPtr(ppv, NULL), (void *)(uintptr_t)0x87654321, "%p", void *);
    805     CHECKVAL(*ppv, NULL, "%p");
    806 }
    807 
    808 
    809 static void tstASMAtomicXchgPtr(void)
    810 {
    8111357    DO_SIMPLE_TEST(ASMAtomicXchgPtr, void *);
    8121358}
    … …  
    8161362{
    8171363    *pu8 = 0xff;
    818 
    819     CHECKOP(ASMAtomicCmpXchgU8(pu8, 0, 0), false, "%d", bool);
    820     CHECKVAL(*pu8, 0xff, "%x");
    821 
    822     CHECKOP(ASMAtomicCmpXchgU8(pu8, 0, 0xff), true, "%d", bool);
    823     CHECKVAL(*pu8, 0, "%x");
    824 
    825     CHECKOP(ASMAtomicCmpXchgU8(pu8, 0x79, 0xff), false, "%d", bool);
    826     CHECKVAL(*pu8, 0, "%x");
    827 
    828     CHECKOP(ASMAtomicCmpXchgU8(pu8, 0x97, 0), true, "%d", bool);
    829     CHECKVAL(*pu8, 0x97, "%x");
    830 }
    831 
    832 
    833 static void tstASMAtomicCmpXchgU8(void)
     1364    CHECK_OP_AND_VAL_EX(bool, "%d", "%#x", pu8, ASMAtomicCmpXchgU8(pu8, 0, 0), false, 0xff);
     1365    CHECK_OP_AND_VAL_EX(bool, "%d", "%#x", pu8, ASMAtomicCmpXchgU8(pu8, 0, 0xff), true, 0);
     1366    CHECK_OP_AND_VAL_EX(bool, "%d", "%#x", pu8, ASMAtomicCmpXchgU8(pu8, 0x97, 0), true, 0x97);
     1367    CHECK_OP_AND_VAL_EX(bool, "%d", "%#x", pu8, ASMAtomicCmpXchgU8(pu8, 0x97, 0), false, 0x97);
     1368    CHECK_OP_AND_VAL_EX(bool, "%d", "%#x", pu8, ASMAtomicCmpXchgU8(pu8, 0x7f, 0x97), true, 0x7f);
     1369
     1370    int8_t volatile *pi8 = (int8_t volatile *)pu8;
     1371    CHECK_OP_AND_VAL(bool, "%d", pi8, ASMAtomicCmpXchgS8(pi8, -2, 0x7f), true, -2);
     1372    CHECK_OP_AND_VAL(bool, "%d", pi8, ASMAtomicCmpXchgS8(pi8, INT8_MAX, -2), true, INT8_MAX);
     1373    CHECK_OP_AND_VAL(bool, "%d", pi8, ASMAtomicCmpXchgS8(pi8, INT8_MAX, INT8_MIN), false, INT8_MAX);
     1374    CHECK_OP_AND_VAL(bool, "%d", pi8, ASMAtomicCmpXchgS8(pi8, INT8_MIN, INT8_MAX), true, INT8_MIN);
     1375    CHECK_OP_AND_VAL(bool, "%d", pi8, ASMAtomicCmpXchgS8(pi8, 1, INT8_MIN), true, 1);
     1376
     1377    bool volatile *pf = (bool volatile *)pu8;
     1378    CHECK_OP_AND_VAL(bool, "%d", pf, ASMAtomicCmpXchgBool(pf, true, true), true, true);
     1379    CHECK_OP_AND_VAL(bool, "%d", pf, ASMAtomicCmpXchgBool(pf, false, true), true, false);
     1380    CHECK_OP_AND_VAL(bool, "%d", pf, ASMAtomicCmpXchgBool(pf, false, true), false, false);
     1381    CHECK_OP_AND_VAL(bool, "%d", pf, ASMAtomicCmpXchgBool(pf, false, false), true, false);
     1382}
     1383
     1384
     1385DECLINLINE(void) tstASMAtomicCmpXchgU32Worker(uint32_t volatile *pu32)
     1386{
     1387    *pu32 = UINT32_C(0xffffffff);
     1388    CHECK_OP_AND_VAL_EX(bool, "%d", "%#x", pu32, ASMAtomicCmpXchgU32(pu32, 0, 0), false, UINT32_C(0xffffffff));
     1389    CHECK_OP_AND_VAL_EX(bool, "%d", "%#x", pu32, ASMAtomicCmpXchgU32(pu32, 0, UINT32_C(0xffffffff)), true, 0);
     1390    CHECK_OP_AND_VAL_EX(bool, "%d", "%#x", pu32, ASMAtomicCmpXchgU32(pu32, UINT32_C(0x80088efd), UINT32_C(0x12345678)), false, 0);
     1391    CHECK_OP_AND_VAL_EX(bool, "%d", "%#x", pu32, ASMAtomicCmpXchgU32(pu32, UINT32_C(0x80088efd), 0), true, UINT32_C(0x80088efd));
     1392    CHECK_OP_AND_VAL_EX(bool, "%d", "%#x", pu32, ASMAtomicCmpXchgU32(pu32, UINT32_C(0xfffffffe), UINT32_C(0x80088efd)), true, UINT32_C(0xfffffffe));
     1393
     1394    int32_t volatile *pi32 = (int32_t volatile *)pu32;
     1395    CHECK_OP_AND_VAL_EX(bool, "%d", "%d", pi32, ASMAtomicCmpXchgS32(pi32, INT32_MIN, 2), false, -2);
     1396    CHECK_OP_AND_VAL_EX(bool, "%d", "%d", pi32, ASMAtomicCmpXchgS32(pi32, INT32_MIN, -2), true, INT32_MIN);
     1397    CHECK_OP_AND_VAL_EX(bool, "%d", "%d", pi32, ASMAtomicCmpXchgS32(pi32, -19, -2), false, INT32_MIN);
     1398    CHECK_OP_AND_VAL_EX(bool, "%d", "%d", pi32, ASMAtomicCmpXchgS32(pi32, -19, INT32_MIN), true, -19);
     1399    CHECK_OP_AND_VAL_EX(bool, "%d", "%d", pi32, ASMAtomicCmpXchgS32(pi32, -19, INT32_MIN), false, -19);
     1400    CHECK_OP_AND_VAL_EX(bool, "%d", "%d", pi32, ASMAtomicCmpXchgS32(pi32, 19, -19), true, 19);
     1401    CHECK_OP_AND_VAL_EX(bool, "%d", "%d", pi32, ASMAtomicCmpXchgS32(pi32, INT32_MAX, -234), false, 19);
     1402    CHECK_OP_AND_VAL_EX(bool, "%d", "%d", pi32, ASMAtomicCmpXchgS32(pi32, INT32_MAX, 19), true, INT32_MAX);
     1403
     1404#if ARCH_BITS == 32
     1405    void * volatile *ppv = (void * volatile *)pu64;
     1406    CHECK_OP_AND_VAL_EX(bool, "%d", "%p", ppv, ASMAtomicCmpXchgPtrVoid(ppv, NULL, (void *)(intptr_t)-29), false, (void *)(intptr_t)29);
     1407    CHECK_OP_AND_VAL_EX(bool, "%d", "%p", ppv, ASMAtomicCmpXchgPtrVoid(ppv, NULL, (void *)(intptr_t)29), true, NULL);
     1408    CHECK_OP_AND_VAL_EX(bool, "%d", "%p", ppv, ASMAtomicCmpXchgPtrVoid(ppv, NULL, (void *)(intptr_t)29), false, NULL);
     1409    CHECK_OP_AND_VAL_EX(bool, "%d", "%p", ppv, ASMAtomicCmpXchgPtrVoid(ppv, (void *)~(uintptr_t)42, NULL), true, (void *)~(uintptr_t)42);
     1410
     1411    bool fRc;
     1412    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)pu64;
     1413    ASMAtomicCmpXchgHandle(phEvt, (RTSEMEVENT)~(uintptr_t)0x12356389, (RTSEMEVENT)NULL, fRc);
     1414    CHECKVAL(fRc, false, "%d");
     1415    CHECKVAL(*phEvt, (RTSEMEVENT)~(uintptr_t)42, "%p");
     1416
     1417    ASMAtomicCmpXchgHandle(phEvt, (RTSEMEVENT)~(uintptr_t)0x12356389, (RTSEMEVENT)~(uintptr_t)42, fRc);
     1418    CHECKVAL(fRc, true, "%d");
     1419    CHECKVAL(*phEvt, (RTSEMEVENT)~(uintptr_t)0x12356389, "%p");
     1420#endif
     1421}
     1422
     1423
     1424DECLINLINE(void) tstASMAtomicCmpXchgU64Worker(uint64_t volatile *pu64)
     1425{
     1426    *pu64 = UINT64_C(0xffffffffffffff);
     1427    CHECK_OP_AND_VAL_EX(bool, "%d", "%#llx", pu64, ASMAtomicCmpXchgU64(pu64, 0, 0), false, UINT64_C(0xffffffffffffff));
     1428    CHECK_OP_AND_VAL_EX(bool, "%d", "%#llx", pu64, ASMAtomicCmpXchgU64(pu64, 0, UINT64_C(0xffffffffffffff)), true, 0);
     1429    CHECK_OP_AND_VAL_EX(bool, "%d", "%#llx", pu64, ASMAtomicCmpXchgU64(pu64, UINT64_C(0x80040008008efd), 1), false, 0);
     1430    CHECK_OP_AND_VAL_EX(bool, "%d", "%#llx", pu64, ASMAtomicCmpXchgU64(pu64, UINT64_C(0x80040008008efd), 0), true, UINT64_C(0x80040008008efd));
     1431    CHECK_OP_AND_VAL_EX(bool, "%d", "%#llx", pu64, ASMAtomicCmpXchgU64(pu64, UINT64_C(0x80040008008efd), 0), false, UINT64_C(0x80040008008efd));
     1432    CHECK_OP_AND_VAL_EX(bool, "%d", "%#llx", pu64, ASMAtomicCmpXchgU64(pu64, UINT64_C(0xfffffffffffffffd), UINT64_C(0x80040008008efd)), true, UINT64_C(0xfffffffffffffffd));
     1433
     1434    int64_t volatile *pi64 = (int64_t volatile *)pu64;
     1435    CHECK_OP_AND_VAL_EX(bool, "%d", "%#lld", pi64, ASMAtomicCmpXchgS64(pi64, INT64_MAX, 0), false, -3);
     1436    CHECK_OP_AND_VAL_EX(bool, "%d", "%#lld", pi64, ASMAtomicCmpXchgS64(pi64, INT64_MAX, -3), true, INT64_MAX);
     1437    CHECK_OP_AND_VAL_EX(bool, "%d", "%#lld", pi64, ASMAtomicCmpXchgS64(pi64, INT64_MIN, INT64_MIN), false, INT64_MAX);
     1438    CHECK_OP_AND_VAL_EX(bool, "%d", "%#lld", pi64, ASMAtomicCmpXchgS64(pi64, INT64_MIN, INT64_MAX), true, INT64_MIN);
     1439    CHECK_OP_AND_VAL_EX(bool, "%d", "%#lld", pi64, ASMAtomicCmpXchgS64(pi64, -29, -29), false, INT64_MIN);
     1440    CHECK_OP_AND_VAL_EX(bool, "%d", "%#lld", pi64, ASMAtomicCmpXchgS64(pi64, -29, INT64_MIN), true, -29);
     1441    CHECK_OP_AND_VAL_EX(bool, "%d", "%#lld", pi64, ASMAtomicCmpXchgS64(pi64, -29, INT64_MIN), false, -29);
     1442    CHECK_OP_AND_VAL_EX(bool, "%d", "%#lld", pi64, ASMAtomicCmpXchgS64(pi64, 29, -29), true, 29);
     1443
     1444#if ARCH_BITS == 64
     1445    void * volatile *ppv = (void * volatile *)pu64;
     1446    CHECK_OP_AND_VAL_EX(bool, "%d", "%p", ppv, ASMAtomicCmpXchgPtrVoid(ppv, NULL, (void *)(intptr_t)-29), false, (void *)(intptr_t)29);
     1447    CHECK_OP_AND_VAL_EX(bool, "%d", "%p", ppv, ASMAtomicCmpXchgPtrVoid(ppv, NULL, (void *)(intptr_t)29), true, NULL);
     1448    CHECK_OP_AND_VAL_EX(bool, "%d", "%p", ppv, ASMAtomicCmpXchgPtrVoid(ppv, NULL, (void *)(intptr_t)29), false, NULL);
     1449    CHECK_OP_AND_VAL_EX(bool, "%d", "%p", ppv, ASMAtomicCmpXchgPtrVoid(ppv, (void *)~(uintptr_t)42, NULL), true, (void *)~(uintptr_t)42);
     1450
     1451    bool fRc;
     1452    RTSEMEVENT volatile *phEvt = (RTSEMEVENT volatile *)pu64;
     1453    ASMAtomicCmpXchgHandle(phEvt, (RTSEMEVENT)~(uintptr_t)0x12356389, (RTSEMEVENT)NULL, fRc);
     1454    CHECKVAL(fRc, false, "%d");
     1455    CHECKVAL(*phEvt, (RTSEMEVENT)~(uintptr_t)42, "%p");
     1456
     1457    ASMAtomicCmpXchgHandle(phEvt, (RTSEMEVENT)~(uintptr_t)0x12356389, (RTSEMEVENT)~(uintptr_t)42, fRc);
     1458    CHECKVAL(fRc, true, "%d");
     1459    CHECKVAL(*phEvt, (RTSEMEVENT)~(uintptr_t)0x12356389, "%p");
     1460#endif
     1461}
     1462
     1463
     1464static void tstASMAtomicCmpXchg(void)
    8341465{
    8351466    DO_SIMPLE_TEST(ASMAtomicCmpXchgU8, uint8_t);
    836 }
    837 
    838 
    839 DECLINLINE(void) tstASMAtomicCmpXchgU32Worker(uint32_t volatile *pu32)
    840 {
    841     *pu32 = UINT32_C(0xffffffff);
    842 
    843     CHECKOP(ASMAtomicCmpXchgU32(pu32, 0, 0), false, "%d", bool);
    844     CHECKVAL(*pu32, UINT32_C(0xffffffff), "%x");
    845 
    846     CHECKOP(ASMAtomicCmpXchgU32(pu32, 0, UINT32_C(0xffffffff)), true, "%d", bool);
    847     CHECKVAL(*pu32, 0, "%x");
    848 
    849     CHECKOP(ASMAtomicCmpXchgU32(pu32, UINT32_C(0x8008efd), UINT32_C(0xffffffff)), false, "%d", bool);
    850     CHECKVAL(*pu32, 0, "%x");
    851 
    852     CHECKOP(ASMAtomicCmpXchgU32(pu32, UINT32_C(0x8008efd), 0), true, "%d", bool);
    853     CHECKVAL(*pu32, UINT32_C(0x8008efd), "%x");
    854 }
    855 
    856 
    857 static void tstASMAtomicCmpXchgU32(void)
    858 {
    8591467    DO_SIMPLE_TEST(ASMAtomicCmpXchgU32, uint32_t);
    860 }
    861 
    862 
    863 
    864 DECLINLINE(void) tstASMAtomicCmpXchgU64Worker(uint64_t volatile *pu64)
    865 {
    866     *pu64 = UINT64_C(0xffffffffffffff);
    867 
    868     CHECKOP(ASMAtomicCmpXchgU64(pu64, 0, 0), false, "%d", bool);
    869     CHECKVAL(*pu64, UINT64_C(0xffffffffffffff), "%#llx");
    870 
    871     CHECKOP(ASMAtomicCmpXchgU64(pu64, 0, UINT64_C(0xffffffffffffff)), true, "%d", bool);
    872     CHECKVAL(*pu64, 0, "%x");
    873 
    874     CHECKOP(ASMAtomicCmpXchgU64(pu64, UINT64_C(0x80040008008efd), UINT64_C(0xffffffff)), false, "%d", bool);
    875     CHECKVAL(*pu64, 0, "%x");
    876 
    877     CHECKOP(ASMAtomicCmpXchgU64(pu64, UINT64_C(0x80040008008efd), UINT64_C(0xffffffff00000000)), false, "%d", bool);
    878     CHECKVAL(*pu64, 0, "%x");
    879 
    880     CHECKOP(ASMAtomicCmpXchgU64(pu64, UINT64_C(0x80040008008efd), 0), true, "%d", bool);
    881     CHECKVAL(*pu64, UINT64_C(0x80040008008efd), "%#llx");
    882 }
    883 
    884 
    885 static void tstASMAtomicCmpXchgU64(void)
    886 {
    8871468    DO_SIMPLE_TEST(ASMAtomicCmpXchgU64, uint64_t);
    8881469}
    … …  
    8931474    *pu32           = UINT32_C(0xffffffff);
    8941475    uint32_t u32Old = UINT32_C(0x80005111);
    895 
    896     CHECKOP(ASMAtomicCmpXchgExU32(pu32, 0, 0, &u32Old), false, "%d", bool);
    897     CHECKVAL(*pu32,  UINT32_C(0xffffffff), "%x");
    898     CHECKVAL(u32Old, UINT32_C(0xffffffff), "%x");
    899 
    900     CHECKOP(ASMAtomicCmpXchgExU32(pu32, 0, UINT32_C(0xffffffff), &u32Old), true, "%d", bool);
    901     CHECKVAL(*pu32, 0, "%x");
    902     CHECKVAL(u32Old, UINT32_C(0xffffffff), "%x");
    903 
    904     CHECKOP(ASMAtomicCmpXchgExU32(pu32, UINT32_C(0x8008efd), UINT32_C(0xffffffff), &u32Old), false, "%d", bool);
    905     CHECKVAL(*pu32, 0, "%x");
    906     CHECKVAL(u32Old, 0, "%x");
    907 
    908     CHECKOP(ASMAtomicCmpXchgExU32(pu32, UINT32_C(0x8008efd), 0, &u32Old), true, "%d", bool);
    909     CHECKVAL(*pu32, UINT32_C(0x8008efd), "%x");
    910     CHECKVAL(u32Old, 0, "%x");
    911 
    912     CHECKOP(ASMAtomicCmpXchgExU32(pu32, 0, UINT32_C(0x8008efd), &u32Old), true, "%d", bool);
    913     CHECKVAL(*pu32, 0, "%x");
    914     CHECKVAL(u32Old, UINT32_C(0x8008efd), "%x");
    915 }
    916 
    917 
    918 static void tstASMAtomicCmpXchgExU32(void)
    919 {
    920     DO_SIMPLE_TEST(ASMAtomicCmpXchgExU32, uint32_t);
     1476    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#x", pu32, u32Old, ASMAtomicCmpXchgExU32(pu32, 0, 0, &u32Old), false, UINT32_C(0xffffffff), UINT32_C(0xffffffff));
     1477    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#x", pu32, u32Old, ASMAtomicCmpXchgExU32(pu32, 0, UINT32_C(0xffffffff), &u32Old), true,  0, UINT32_C(0xffffffff));
     1478    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#x", pu32, u32Old, ASMAtomicCmpXchgExU32(pu32, 0, UINT32_C(0xffffffff), &u32Old), false, 0, UINT32_C(0x00000000));
     1479    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#x", pu32, u32Old, ASMAtomicCmpXchgExU32(pu32, UINT32_C(0x80088efd), 0, &u32Old), true,  UINT32_C(0x80088efd), 0);
     1480    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#x", pu32, u32Old, ASMAtomicCmpXchgExU32(pu32, UINT32_C(0x80088efd), 0, &u32Old), false, UINT32_C(0x80088efd), UINT32_C(0x80088efd));
     1481    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#x", pu32, u32Old, ASMAtomicCmpXchgExU32(pu32, UINT32_C(0xffffffe0), UINT32_C(0x80088efd), &u32Old), true,  UINT32_C(0xffffffe0), UINT32_C(0x80088efd));
     1482
     1483    int32_t volatile *pi32   = (int32_t volatile *)pu32;
     1484    int32_t           i32Old = 0;
     1485    CHECK_OP_AND_VAL_EX2(bool, "%d", "%d", pi32, i32Old, ASMAtomicCmpXchgExS32(pi32, 32, 32, &i32Old), false, -32, -32);
     1486    CHECK_OP_AND_VAL_EX2(bool, "%d", "%d", pi32, i32Old, ASMAtomicCmpXchgExS32(pi32, 32, -32, &i32Old), true, 32, -32);
     1487    CHECK_OP_AND_VAL_EX2(bool, "%d", "%d", pi32, i32Old, ASMAtomicCmpXchgExS32(pi32, INT32_MIN, 32, &i32Old), true, INT32_MIN, 32);
     1488    CHECK_OP_AND_VAL_EX2(bool, "%d", "%d", pi32, i32Old, ASMAtomicCmpXchgExS32(pi32, INT32_MIN, 32, &i32Old), false, INT32_MIN, INT32_MIN);
     1489    CHECK_OP_AND_VAL_EX2(bool, "%d", "%d", pi32, i32Old, ASMAtomicCmpXchgExS32(pi32, INT32_MAX, INT32_MAX, &i32Old), false, INT32_MIN, INT32_MIN);
     1490    CHECK_OP_AND_VAL_EX2(bool, "%d", "%d", pi32, i32Old, ASMAtomicCmpXchgExS32(pi32, INT32_MAX, INT32_MIN, &i32Old), true, INT32_MAX, INT32_MIN);
     1491    CHECK_OP_AND_VAL_EX2(bool, "%d", "%d", pi32, i32Old, ASMAtomicCmpXchgExS32(pi32, 42, INT32_MAX, &i32Old), true, 42, INT32_MAX);
     1492
     1493#if ARCH_BITS == 32
     1494    RTSEMEVENT volatile *phEvt   = (RTSEMEVENT volatile *)pu32;
     1495    RTSEMEVENT           hEvtOld = (RTSEMEVENT)~(uintptr_t)31;
     1496    bool                 fRc     = true;
     1497    ASMAtomicCmpXchgExHandle(phEvt, (RTSEMEVENT)~(uintptr_t)0x12380964, (RTSEMEVENT)~(uintptr_t)0, fRc, &hEvtOld);
     1498    CHECKVAL(fRc, false, "%d");
     1499    CHECKVAL(*phEvt, (RTSEMEVENT)(uintptr_t)42, "%p");
     1500    CHECKVAL(hEvtOld, (RTSEMEVENT)(uintptr_t)42, "%p");
     1501
     1502    ASMAtomicCmpXchgExHandle(phEvt, (RTSEMEVENT)~(uintptr_t)0x12380964, (RTSEMEVENT)(uintptr_t)42, fRc, &hEvtOld);
     1503    CHECKVAL(fRc, true, "%d");
     1504    CHECKVAL(*phEvt, (RTSEMEVENT)~(uintptr_t)0x12380964, "%p");
     1505    CHECKVAL(hEvtOld, (RTSEMEVENT)(uintptr_t)42, "%p");
     1506#endif
    9211507}
    9221508
    … …  
    9261512    *pu64 = UINT64_C(0xffffffffffffffff);
    9271513    uint64_t u64Old = UINT64_C(0x8000000051111111);
    928 
    929     CHECKOP(ASMAtomicCmpXchgExU64(pu64, 0, 0, &u64Old), false, "%d", bool);
    930     CHECKVAL(*pu64, UINT64_C(0xffffffffffffffff), "%llx");
    931     CHECKVAL(u64Old, UINT64_C(0xffffffffffffffff), "%llx");
    932 
    933     CHECKOP(ASMAtomicCmpXchgExU64(pu64, 0, UINT64_C(0xffffffffffffffff), &u64Old), true, "%d", bool);
    934     CHECKVAL(*pu64, UINT64_C(0), "%llx");
    935     CHECKVAL(u64Old, UINT64_C(0xffffffffffffffff), "%llx");
    936 
    937     CHECKOP(ASMAtomicCmpXchgExU64(pu64, UINT64_C(0x80040008008efd), 0xffffffff, &u64Old), false, "%d", bool);
    938     CHECKVAL(*pu64, UINT64_C(0), "%llx");
    939     CHECKVAL(u64Old, UINT64_C(0), "%llx");
    940 
    941     CHECKOP(ASMAtomicCmpXchgExU64(pu64, UINT64_C(0x80040008008efd), UINT64_C(0xffffffff00000000), &u64Old), false, "%d", bool);
    942     CHECKVAL(*pu64, UINT64_C(0), "%llx");
    943     CHECKVAL(u64Old, UINT64_C(0), "%llx");
    944 
    945     CHECKOP(ASMAtomicCmpXchgExU64(pu64, UINT64_C(0x80040008008efd), 0, &u64Old), true, "%d", bool);
    946     CHECKVAL(*pu64, UINT64_C(0x80040008008efd), "%llx");
    947     CHECKVAL(u64Old, UINT64_C(0), "%llx");
    948 
    949     CHECKOP(ASMAtomicCmpXchgExU64(pu64, 0, UINT64_C(0x80040008008efd), &u64Old), true, "%d", bool);
    950     CHECKVAL(*pu64, UINT64_C(0), "%llx");
    951     CHECKVAL(u64Old, UINT64_C(0x80040008008efd), "%llx");
    952 }
    953 
    954 
    955 static void tstASMAtomicCmpXchgExU64(void)
    956 {
     1514    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#llx", pu64, u64Old, ASMAtomicCmpXchgExU64(pu64, 0, 0, &u64Old), false, UINT64_C(0xffffffffffffffff), UINT64_C(0xffffffffffffffff));
     1515    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#llx", pu64, u64Old, ASMAtomicCmpXchgExU64(pu64, 0, UINT64_C(0xffffffffffffffff), &u64Old), true, 0, UINT64_C(0xffffffffffffffff));
     1516    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#llx", pu64, u64Old, ASMAtomicCmpXchgExU64(pu64, UINT64_C(0x0080040008008efd), 0x342, &u64Old), false, 0, 0);
     1517    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#llx", pu64, u64Old, ASMAtomicCmpXchgExU64(pu64, UINT64_C(0x0080040008008efd), 0, &u64Old), true, UINT64_C(0x0080040008008efd), 0);
     1518    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#llx", pu64, u64Old, ASMAtomicCmpXchgExU64(pu64, UINT64_C(0xffffffffffffffc0), UINT64_C(0x0080040008008efd), &u64Old), true, UINT64_C(0xffffffffffffffc0), UINT64_C(0x0080040008008efd));
     1519
     1520    int64_t volatile *pi64 = (int64_t volatile *)pu64;
     1521    int64_t           i64Old = -3;
     1522    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#lld", pi64, i64Old, ASMAtomicCmpXchgExS64(pi64, 64, 64, &i64Old), false, -64, -64);
     1523    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#lld", pi64, i64Old, ASMAtomicCmpXchgExS64(pi64, 64, -64, &i64Old), true, 64, -64);
     1524    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#lld", pi64, i64Old, ASMAtomicCmpXchgExS64(pi64, 64, -64, &i64Old), false, 64, 64);
     1525    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#lld", pi64, i64Old, ASMAtomicCmpXchgExS64(pi64, INT64_MIN, -64, &i64Old), false, 64, 64);
     1526    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#lld", pi64, i64Old, ASMAtomicCmpXchgExS64(pi64, INT64_MIN, 64, &i64Old), true, INT64_MIN, 64);
     1527    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#lld", pi64, i64Old, ASMAtomicCmpXchgExS64(pi64, INT64_MAX, INT64_MIN, &i64Old), true, INT64_MAX, INT64_MIN);
     1528    CHECK_OP_AND_VAL_EX2(bool, "%d", "%#lld", pi64, i64Old, ASMAtomicCmpXchgExS64(pi64, 42, INT64_MAX, &i64Old), true, 42, INT64_MAX);
     1529
     1530#if ARCH_BITS == 64
     1531    RTSEMEVENT volatile *phEvt   = (RTSEMEVENT volatile *)pu64;
     1532    RTSEMEVENT           hEvtOld = (RTSEMEVENT)~(uintptr_t)31;
     1533    bool                 fRc     = true;
     1534    ASMAtomicCmpXchgExHandle(phEvt, (RTSEMEVENT)~(uintptr_t)0x12380964, (RTSEMEVENT)~(uintptr_t)0, fRc, &hEvtOld);
     1535    CHECKVAL(fRc, false, "%d");
     1536    CHECKVAL(*phEvt, (RTSEMEVENT)(uintptr_t)42, "%p");
     1537    CHECKVAL(hEvtOld, (RTSEMEVENT)(uintptr_t)42, "%p");
     1538
     1539    ASMAtomicCmpXchgExHandle(phEvt, (RTSEMEVENT)~(uintptr_t)0x12380964, (RTSEMEVENT)(uintptr_t)42, fRc, &hEvtOld);
     1540    CHECKVAL(fRc, true, "%d");
     1541    CHECKVAL(*phEvt, (RTSEMEVENT)~(uintptr_t)0x12380964, "%p");
     1542    CHECKVAL(hEvtOld, (RTSEMEVENT)(uintptr_t)42, "%p");
     1543
     1544    void * volatile *ppv = (void * volatile *)pu64;
     1545    void            *pvOld;
     1546    CHECK_OP_AND_VAL_EX2(bool, "%d", "%p", ppv, pvOld, ASMAtomicCmpXchgExPtrVoid(ppv, (void *)(intptr_t)12345678, NULL, &pvOld), false, (void *)~(uintptr_t)0x12380964, (void *)~(uintptr_t)0x12380964);
     1547    CHECK_OP_AND_VAL_EX2(bool, "%d", "%p", ppv, pvOld, ASMAtomicCmpXchgExPtrVoid(ppv, (void *)(intptr_t)12345678, (void *)~(uintptr_t)0x12380964, &pvOld), true, (void *)(intptr_t)12345678, (void *)~(uintptr_t)0x12380964);
     1548
     1549    CHECK_OP_AND_VAL_EX2(bool, "%d", "%p", ppv, pvOld, ASMAtomicCmpXchgExPtr(ppv, (void *)~(uintptr_t)99, (void *)~(uintptr_t)99, &pvOld), false, (void *)(intptr_t)12345678, (void *)(intptr_t)12345678);
     1550    CHECK_OP_AND_VAL_EX2(bool, "%d", "%p", ppv, pvOld, ASMAtomicCmpXchgExPtr(ppv, (void *)~(uintptr_t)99, (void *)(intptr_t)12345678, &pvOld), true, (void *)~(intptr_t)99, (void *)(intptr_t)12345678);
     1551#endif
     1552}
     1553
     1554
     1555static void tstASMAtomicCmpXchgEx(void)
     1556{
     1557    DO_SIMPLE_TEST(ASMAtomicCmpXchgExU32, uint32_t);
    9571558    DO_SIMPLE_TEST(ASMAtomicCmpXchgExU64, uint64_t);
    958 }
    959 
    960 
    961 DECLINLINE(void) tstASMAtomicReadU64Worker(uint64_t volatile *pu64)
    962 {
    963     *pu64 = 0;
    964 
    965     CHECKOP(ASMAtomicReadU64(pu64), UINT64_C(0), "%#llx", uint64_t);
    966     CHECKVAL(*pu64, UINT64_C(0), "%#llx");
    967 
    968     *pu64 = ~UINT64_C(0);
    969     CHECKOP(ASMAtomicReadU64(pu64), ~UINT64_C(0), "%#llx", uint64_t);
    970     CHECKVAL(*pu64, ~UINT64_C(0), "%#llx");
    971 
    972     *pu64 = UINT64_C(0xfedcba0987654321);
    973     CHECKOP(ASMAtomicReadU64(pu64), UINT64_C(0xfedcba0987654321), "%#llx", uint64_t);
    974     CHECKVAL(*pu64, UINT64_C(0xfedcba0987654321), "%#llx");
    975 }
    976 
    977 
    978 static void tstASMAtomicReadU64(void)
    979 {
    980     DO_SIMPLE_TEST(ASMAtomicReadU64, uint64_t);
    981 }
    982 
    983 
    984 DECLINLINE(void) tstASMAtomicUoReadU64Worker(uint64_t volatile *pu64)
    985 {
    986     *pu64 = 0;
    987 
    988     CHECKOP(ASMAtomicUoReadU64(pu64), UINT64_C(0), "%#llx", uint64_t);
    989     CHECKVAL(*pu64, UINT64_C(0), "%#llx");
    990 
    991     *pu64 = ~UINT64_C(0);
    992     CHECKOP(ASMAtomicUoReadU64(pu64), ~UINT64_C(0), "%#llx", uint64_t);
    993     CHECKVAL(*pu64, ~UINT64_C(0), "%#llx");
    994 
    995     *pu64 = UINT64_C(0xfedcba0987654321);
    996     CHECKOP(ASMAtomicUoReadU64(pu64), UINT64_C(0xfedcba0987654321), "%#llx", uint64_t);
    997     CHECKVAL(*pu64, UINT64_C(0xfedcba0987654321), "%#llx");
    998 }
    999 
    1000 
    1001 static void tstASMAtomicUoReadU64(void)
    1002 {
    1003     DO_SIMPLE_TEST(ASMAtomicUoReadU64, uint64_t);
    10041559}
    10051560
    … …  
    16252180
    16262181
     2182void tstASMMisc(void)
     2183{
     2184    RTTestSub(g_hTest, "Misc");
     2185    for (uint32_t i = 0; i < 20; i++)
     2186    {
     2187        ASMWriteFence();
     2188        ASMCompilerBarrier();
     2189        ASMReadFence();
     2190        ASMNopPause();
     2191        ASMSerializeInstruction();
     2192        ASMMemoryFence();
     2193    }
     2194}
    16272195
    16282196void tstASMMath(void)
    … …  
    19162484    BENCH_TSC(ASMSerializeInstructionIRet(),     "ASMSerializeInstructionIRet");
    19172485#endif
     2486    BENCH(ASMReadFence(),                        "ASMReadFence");
     2487    BENCH(ASMWriteFence(),                       "ASMWriteFence");
     2488    BENCH(ASMMemoryFence(),                      "ASMMemoryFence");
     2489    BENCH(ASMSerializeInstruction(),             "ASMSerializeInstruction");
     2490    BENCH(ASMNopPause(),                         "ASMNopPause");
    19182491
    19192492    /* The Darwin gcc does not like this ... */
    … …  
    19702543#endif
    19712544#if 1
    1972     tstASMAtomicXchgU8();
    1973     tstASMAtomicXchgU16();
    1974     tstASMAtomicXchgU32();
    1975     tstASMAtomicXchgU64();
    1976     tstASMAtomicXchgPtr();
    1977     tstASMAtomicCmpXchgU8();
    1978     tstASMAtomicCmpXchgU32();
    1979     tstASMAtomicCmpXchgU64();
    1980     tstASMAtomicCmpXchgExU32();
    1981     tstASMAtomicCmpXchgExU64();
    1982     tstASMAtomicReadU64();
    1983     tstASMAtomicUoReadU64();
     2545    tstASMAtomicRead();
     2546    tstASMAtomicWrite();
     2547    tstASMAtomicXchg();
     2548    tstASMAtomicCmpXchg();
     2549    tstASMAtomicCmpXchgEx();
    19842550
    19852551    tstASMAtomicAddS32();
    … …  
    20002566    tstASMMemFill32();
    20012567
     2568    tstASMMisc();
     2569
    20022570    tstASMMath();
    20032571
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