Changeset 87311 in vbox
- Timestamp:
- Jan 19, 2021 11:45:43 PM (4 years ago)
- File:
-
- 1 edited
-
trunk/src/VBox/VMM/VMMR0/HMR0A.asm (modified) (17 diffs)
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trunk/src/VBox/VMM/VMMR0/HMR0A.asm
r87310 r87311 39 39 %define XMM_OFF_IN_X86FXSTATE 160 40 40 41 ;; Spectre filler for 32-bit mode.42 ; Some user space address that points to a 4MB page boundrary in hope that it43 ; will somehow make it less useful.44 %define SPECTRE_FILLER32 0x227fffff45 41 ;; Spectre filler for 64-bit mode. 46 42 ; Choosen to be an invalid address (also with 5 level paging). 47 %define SPECTRE_FILLER64 0x02204204207fffff 48 ;; Spectre filler for the current CPU mode. 49 %ifdef RT_ARCH_AMD64 50 %define SPECTRE_FILLER SPECTRE_FILLER64 51 %else 52 %define SPECTRE_FILLER SPECTRE_FILLER32 53 %endif 43 %define SPECTRE_FILLER 0x02204204207fffff 54 44 55 45 ;; 56 46 ; Determine skipping restoring of GDTR, IDTR, TR across VMX non-root operation. 57 47 ; 58 %ifdef RT_ARCH_AMD64 59 %define VMX_SKIP_GDTR 60 %define VMX_SKIP_TR 61 %define VBOX_SKIP_RESTORE_SEG 62 %ifdef RT_OS_DARWIN 63 ; Load the NULL selector into DS, ES, FS and GS on 64-bit darwin so we don't 64 ; risk loading a stale LDT value or something invalid. 65 %define HM_64_BIT_USE_NULL_SEL 66 ; Darwin (Mavericks) uses IDTR limit to store the CPU Id so we need to restore it always. 67 ; See @bugref{6875}. 68 %else 69 %define VMX_SKIP_IDTR 70 %endif 48 %define VMX_SKIP_GDTR 49 %define VMX_SKIP_TR 50 %define VBOX_SKIP_RESTORE_SEG 51 %ifdef RT_OS_DARWIN 52 ; Load the NULL selector into DS, ES, FS and GS on 64-bit darwin so we don't 53 ; risk loading a stale LDT value or something invalid. 54 %define HM_64_BIT_USE_NULL_SEL 55 ; Darwin (Mavericks) uses IDTR limit to store the CPU Id so we need to restore it always. 56 ; See @bugref{6875}. 57 %else 58 %define VMX_SKIP_IDTR 71 59 %endif 72 60 … … 88 76 89 77 %ifdef ASM_CALL64_GCC 90 %macro MYPUSHAD 64078 %macro MYPUSHAD 0 91 79 push r15 92 80 push r14 … … 95 83 push rbx 96 84 %endmacro 97 %macro MYPOPAD 64085 %macro MYPOPAD 0 98 86 pop rbx 99 87 pop r12 … … 104 92 105 93 %else ; ASM_CALL64_MSC 106 %macro MYPUSHAD 64094 %macro MYPUSHAD 0 107 95 push r15 108 96 push r14 … … 113 101 push rdi 114 102 %endmacro 115 %macro MYPOPAD 640103 %macro MYPOPAD 0 116 104 pop rdi 117 105 pop rsi … … 125 113 126 114 %ifdef VBOX_SKIP_RESTORE_SEG 127 %macro MYPUSHSEGS 642115 %macro MYPUSHSEGS 2 128 116 %endmacro 129 117 130 %macro MYPOPSEGS 642118 %macro MYPOPSEGS 2 131 119 %endmacro 132 120 %else ; !VBOX_SKIP_RESTORE_SEG 133 121 ; Trashes, rax, rdx & rcx. 134 %macro MYPUSHSEGS 642122 %macro MYPUSHSEGS 2 135 123 %ifndef HM_64_BIT_USE_NULL_SEL 136 124 mov %2, es … … 162 150 163 151 ; trashes, rax, rdx & rcx 164 %macro MYPOPSEGS 642152 %macro MYPOPSEGS 2 165 153 ; Note: do not step through this code with a debugger! 166 154 %ifndef HM_64_BIT_USE_NULL_SEL … … 198 186 %endif ; VBOX_SKIP_RESTORE_SEG 199 187 200 %macro MYPUSHAD32 0201 pushad202 %endmacro203 %macro MYPOPAD32 0204 popad205 %endmacro206 207 %macro MYPUSHSEGS32 2208 push ds209 push es210 push fs211 push gs212 %endmacro213 %macro MYPOPSEGS32 2214 pop gs215 pop fs216 pop es217 pop ds218 %endmacro219 220 %ifdef RT_ARCH_AMD64221 %define MYPUSHAD MYPUSHAD64222 %define MYPOPAD MYPOPAD64223 %define MYPUSHSEGS MYPUSHSEGS64224 %define MYPOPSEGS MYPOPSEGS64225 %else226 %define MYPUSHAD MYPUSHAD32227 %define MYPOPAD MYPOPAD32228 %define MYPUSHSEGS MYPUSHSEGS32229 %define MYPOPSEGS MYPOPSEGS32230 %endif231 188 232 189 ;; … … 310 267 ALIGNCODE(16) 311 268 BEGINPROC VMXRestoreHostState 312 %ifdef RT_ARCH_AMD64 313 %ifndef ASM_CALL64_GCC 269 %ifndef ASM_CALL64_GCC 314 270 ; Use GCC's input registers since we'll be needing both rcx and rdx further 315 271 ; down with the wrmsr instruction. Use the R10 and R11 register for saving … … 319 275 mov rdi, rcx 320 276 mov rsi, rdx 321 277 %endif 322 278 323 279 test edi, VMX_RESTORE_HOST_GDTR … … 413 369 .restore_success: 414 370 mov eax, VINF_SUCCESS 415 371 %ifndef ASM_CALL64_GCC 416 372 ; Restore RDI and RSI on MSC. 417 373 mov rdi, r10 418 374 mov rsi, r11 419 %endif420 %else ; RT_ARCH_X86421 mov eax, VERR_NOT_IMPLEMENTED422 375 %endif 423 376 ret … … 800 753 801 754 802 %ifdef RT_ARCH_AMD64803 755 ;; @def RESTORE_STATE_VM64 804 756 ; Macro restoring essential host state and updating guest state … … 824 776 825 777 mov qword [xDI + CPUMCTX.eax], rax 826 mov rax, SPECTRE_FILLER 64778 mov rax, SPECTRE_FILLER 827 779 mov qword [xDI + CPUMCTX.ebx], rbx 828 780 mov rbx, rax … … 1070 1022 jmp .vmstart64_end 1071 1023 ENDPROC VMXR0StartVM64 1072 %endif ; RT_ARCH_AMD641073 1024 1074 1025 … … 1085 1036 1086 1037 1087 %ifdef RT_ARCH_AMD641088 1038 ;; 1089 1039 ; Prepares for and executes VMRUN (32-bit and 64-bit guests). … … 1211 1161 1212 1162 mov qword [rax + CPUMCTX.ebx], rbx 1213 mov rbx, SPECTRE_FILLER 641163 mov rbx, SPECTRE_FILLER 1214 1164 mov qword [rax + CPUMCTX.ecx], rcx 1215 1165 mov rcx, rbx … … 1261 1211 ret 1262 1212 ENDPROC SVMR0VMRun 1263 %endif ; RT_ARCH_AMD64 1264 1213
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