Changeset 87387 in vbox

Timestamp:

Jan 22, 2021 11:12:45 PM (4 years ago)

Author:

vboxsync

Message:

Moved the hmR0SvmVmRun* prototypes to HMInternal.h.

Location:

trunk/src/VBox/VMM

Files:

• VMMR0/HMSVMR0.cpp (modified) (1 diff)
• VMMR0/HMSVMR0.h (modified) (1 diff)
• include/HMInternal.h (modified) (1 diff)

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -712 +712 @@
  *      - CPUMCTX_WSF_IBPB_ENTRY in pVCpu->cpum.GstCtx.fWorldSwitcher
  *      - CPUMCTX_WSF_IBPB_EXIT  in pVCpu->cpum.GstCtx.fWorldSwitcher
- *      - CPUMIsGuestFPUStateActive() (windows only)
- *      - CPUMCTX.fXStateMask (windows only)
+ *      - Perhaps: CPUMIsGuestFPUStateActive() (windows only)
+ *      - Perhaps: CPUMCTX.fXStateMask (windows only)
  *
  * We currently ASSUME that neither CPUMCTX_WSF_IBPB_ENTRY nor

trunk/src/VBox/VMM/VMMR0/HMSVMR0.h

@@ -54 +54 @@
 
 /**
- * Prepares for and executes VMRUN (64-bit register context).
- *
- * @returns VBox status code.
- * @param   pVM             The cross context VM structure. (Not used.)
- * @param   pVCpu           The cross context virtual CPU structure.
- * @param   HCPhyspVMCB     Physical address of the VMCB.
- *
- * @remarks With spectre mitigations and the usual need for speed (/ micro
- *          optimizations), we have a bunch of variations of this code depending
- *          on a few precoditions.  In release builds, the code is entirely
- *          without conditionals.  Debug builds have a couple of assertions that
- *          shouldn't ever be triggered.
- *
- * @{
- */
-DECLASM(int) hmR0SvmVmRun_SansXcr0_SansIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
-DECLASM(int) hmR0SvmVmRun_WithXcr0_SansIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
-DECLASM(int) hmR0SvmVmRun_SansXcr0_WithIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
-DECLASM(int) hmR0SvmVmRun_WithXcr0_WithIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
-DECLASM(int) hmR0SvmVmRun_SansXcr0_SansIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
-DECLASM(int) hmR0SvmVmRun_WithXcr0_SansIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
-DECLASM(int) hmR0SvmVmRun_SansXcr0_WithIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
-DECLASM(int) hmR0SvmVmRun_WithXcr0_WithIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
-/** @} */
-
-
-/**
  * Executes INVLPGA.
  *
- * @param   pPageGC         Virtual page to invalidate.
+ * @param   GCVirt          Virtual page to invalidate.
  * @param   u32ASID         Tagged TLB id.
  */
-DECLASM(void) SVMR0InvlpgA(RTGCPTR pPageGC, uint32_t u32ASID);
+DECLASM(void) SVMR0InvlpgA(RTGCPTR GCVirt, uint32_t u32ASID);
 
 #endif /* IN_RING0 */

trunk/src/VBox/VMM/include/HMInternal.h

@@ -1241 +1241 @@
 VMM_INT_DECL(PVMXVMCSINFO)  hmGetVmxActiveVmcsInfo(PVMCPU pVCpu);
 
+/**
+ * Prepares for and executes VMRUN (64-bit register context).
+ *
+ * @returns VBox status code.
+ * @param   pVM             The cross context VM structure. (Not used.)
+ * @param   pVCpu           The cross context virtual CPU structure.
+ * @param   HCPhyspVMCB     Physical address of the VMCB.
+ *
+ * @remarks With spectre mitigations and the usual need for speed (/ micro
+ *          optimizations), we have a bunch of variations of this code depending
+ *          on a few precoditions.  In release builds, the code is entirely
+ *          without conditionals.  Debug builds have a couple of assertions that
+ *          shouldn't ever be triggered.
+ *
+ * @{
+ */
+DECLASM(int) hmR0SvmVmRun_SansXcr0_SansIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
+DECLASM(int) hmR0SvmVmRun_WithXcr0_SansIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
+DECLASM(int) hmR0SvmVmRun_SansXcr0_WithIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
+DECLASM(int) hmR0SvmVmRun_WithXcr0_WithIbpbEntry_SansIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
+DECLASM(int) hmR0SvmVmRun_SansXcr0_SansIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
+DECLASM(int) hmR0SvmVmRun_WithXcr0_SansIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
+DECLASM(int) hmR0SvmVmRun_SansXcr0_WithIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
+DECLASM(int) hmR0SvmVmRun_WithXcr0_WithIbpbEntry_WithIbpbExit(PVMCC pVM, PVMCPUCC pVCpu, RTHCPHYS HCPhyspVMCB);
 /** @} */
 
+
+/** @} */
+
 RT_C_DECLS_END