Changeset 87480 in vbox for trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

Timestamp:

Jan 29, 2021 2:55:56 PM (4 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

142502

Message:

VMM/HMVMX: Moving more stuff to HMR0PERVCPU. bugref:9217

File:

• trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (modified) (6 diffs)

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -1284 +1284 @@
     Assert(pHostCpu->idCpu != NIL_RTCPUID);
     if (   pVCpu->hmr0.s.idLastCpu   != pHostCpu->idCpu
-        || pVCpu->hm.s.cTlbFlushes != pHostCpu->cTlbFlushes
+        || pVCpu->hmr0.s.cTlbFlushes != pHostCpu->cTlbFlushes
 #ifdef VBOX_WITH_NESTED_HWVIRT_SVM
         || CPUMIsGuestInSvmNestedHwVirtMode(&pVCpu->cpum.GstCtx)
@@ -1314 +1314 @@
         pHostCpu->uCurrentAsid           = 1;
         pVCpu->hmr0.s.uCurrentAsid       = 1;
-        pVCpu->hm.s.cTlbFlushes          = pHostCpu->cTlbFlushes;
+        pVCpu->hmr0.s.cTlbFlushes        = pHostCpu->cTlbFlushes;
         pVCpu->hmr0.s.idLastCpu          = pHostCpu->idCpu;
         pVmcb->ctrl.TLBCtrl.n.u8TLBFlush = SVM_TLB_FLUSH_ENTIRE;
@@ -1338 +1338 @@
                     pHostCpu->uCurrentAsid = 1;      /* Wraparound at 1; host uses 0 */
                     pHostCpu->cTlbFlushes++;         /* All VCPUs that run on this host CPU must use a new ASID. */
-                    fHitASIDLimit      = true;
+                    fHitASIDLimit          = true;
                 }
 
@@ -1350 +1350 @@
                 pVCpu->hmr0.s.uCurrentAsid = pHostCpu->uCurrentAsid;
                 pVCpu->hmr0.s.idLastCpu    = pHostCpu->idCpu;
-                pVCpu->hm.s.cTlbFlushes    = pHostCpu->cTlbFlushes;
+                pVCpu->hmr0.s.cTlbFlushes  = pHostCpu->cTlbFlushes;
             }
             else
@@ -1373 +1373 @@
     AssertMsg(pVCpu->hmr0.s.idLastCpu == pHostCpu->idCpu,
               ("vcpu idLastCpu=%u hostcpu idCpu=%u\n", pVCpu->hmr0.s.idLastCpu, pHostCpu->idCpu));
-    AssertMsg(pVCpu->hm.s.cTlbFlushes == pHostCpu->cTlbFlushes,
-              ("Flush count mismatch for cpu %u (%u vs %u)\n", pHostCpu->idCpu, pVCpu->hm.s.cTlbFlushes, pHostCpu->cTlbFlushes));
+    AssertMsg(pVCpu->hmr0.s.cTlbFlushes == pHostCpu->cTlbFlushes,
+              ("Flush count mismatch for cpu %u (%u vs %u)\n", pHostCpu->idCpu, pVCpu->hmr0.s.cTlbFlushes, pHostCpu->cTlbFlushes));
     AssertMsg(pHostCpu->uCurrentAsid >= 1 && pHostCpu->uCurrentAsid < pVM->hm.s.uMaxAsid,
               ("cpu%d uCurrentAsid = %x\n", pHostCpu->idCpu, pHostCpu->uCurrentAsid));
@@ -4341 +4341 @@
     uint64_t const uHostTsc = ASMReadTSC();                     /* Read the TSC as soon as possible. */
     ASMAtomicWriteBool(&pVCpu->hm.s.fCheckedTLBFlush, false);   /* See HMInvalidatePageOnAllVCpus(): used for TLB flushing. */
-    ASMAtomicIncU32(&pVCpu->hm.s.cWorldSwitchExits);            /* Initialized in vmR3CreateUVM(): used for EMT poking. */
+    ASMAtomicIncU32(&pVCpu->hmr0.s.cWorldSwitchExits);          /* Initialized in vmR3CreateUVM(): used for EMT poking. */
 
     PSVMVMCB     pVmcb     = pSvmTransient->pVmcb;