VirtualBox

Changeset 87503 in vbox for trunk/src/VBox/VMM/VMMR0


Ignore:
Timestamp:
Feb 1, 2021 2:38:38 PM (4 years ago)
Author:
vboxsync
Message:

VMM/HMSVM: Moving more stuff to HMR0PERVCPU. bugref:9217

Location:
trunk/src/VBox/VMM/VMMR0
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR0/HMR0A.asm

    r87500 r87503  
    13501350
    13511351        ; Save host fs, gs, sysenter msr etc.
    1352         mov     rax, [rsi + VMCPU.hm + HMCPU.svm + HMCPUSVM.HCPhysVmcbHost]
     1352        mov     rax, [rsi + GVMCPU.hmr0 + HMR0PERVCPU.svm + HMR0CPUSVM.HCPhysVmcbHost]
    13531353        mov     qword [rbp + frm_HCPhysVmcbHost], rax ; save for the vmload after vmrun
    13541354        lea     rsi, [rsi + VMCPU.cpum.GstCtx]
  • trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

    r87493 r87503  
    678678        AssertPtr(pVCpu);
    679679
    680         if (pVCpu->hm.s.svm.hMemObjVmcbHost != NIL_RTR0MEMOBJ)
    681         {
    682             RTR0MemObjFree(pVCpu->hm.s.svm.hMemObjVmcbHost, false);
    683             pVCpu->hm.s.svm.HCPhysVmcbHost   = 0;
    684             pVCpu->hm.s.svm.hMemObjVmcbHost  = NIL_RTR0MEMOBJ;
    685         }
    686 
    687         if (pVCpu->hm.s.svm.hMemObjVmcb != NIL_RTR0MEMOBJ)
    688         {
    689             RTR0MemObjFree(pVCpu->hm.s.svm.hMemObjVmcb, false);
    690             pVCpu->hm.s.svm.pVmcb            = NULL;
    691             pVCpu->hm.s.svm.HCPhysVmcb       = 0;
    692             pVCpu->hm.s.svm.hMemObjVmcb      = NIL_RTR0MEMOBJ;
    693         }
    694 
    695         if (pVCpu->hm.s.svm.hMemObjMsrBitmap != NIL_RTR0MEMOBJ)
    696         {
    697             RTR0MemObjFree(pVCpu->hm.s.svm.hMemObjMsrBitmap, false);
    698             pVCpu->hm.s.svm.pvMsrBitmap      = NULL;
    699             pVCpu->hm.s.svm.HCPhysMsrBitmap  = 0;
    700             pVCpu->hm.s.svm.hMemObjMsrBitmap = NIL_RTR0MEMOBJ;
     680        if (pVCpu->hmr0.s.svm.hMemObjVmcbHost != NIL_RTR0MEMOBJ)
     681        {
     682            RTR0MemObjFree(pVCpu->hmr0.s.svm.hMemObjVmcbHost, false);
     683            pVCpu->hmr0.s.svm.HCPhysVmcbHost   = 0;
     684            pVCpu->hmr0.s.svm.hMemObjVmcbHost  = NIL_RTR0MEMOBJ;
     685        }
     686
     687        if (pVCpu->hmr0.s.svm.hMemObjVmcb != NIL_RTR0MEMOBJ)
     688        {
     689            RTR0MemObjFree(pVCpu->hmr0.s.svm.hMemObjVmcb, false);
     690            pVCpu->hmr0.s.svm.pVmcb            = NULL;
     691            pVCpu->hmr0.s.svm.HCPhysVmcb       = 0;
     692            pVCpu->hmr0.s.svm.hMemObjVmcb      = NIL_RTR0MEMOBJ;
     693        }
     694
     695        if (pVCpu->hmr0.s.svm.hMemObjMsrBitmap != NIL_RTR0MEMOBJ)
     696        {
     697            RTR0MemObjFree(pVCpu->hmr0.s.svm.hMemObjMsrBitmap, false);
     698            pVCpu->hmr0.s.svm.pvMsrBitmap      = NULL;
     699            pVCpu->hmr0.s.svm.HCPhysMsrBitmap  = 0;
     700            pVCpu->hmr0.s.svm.hMemObjMsrBitmap = NIL_RTR0MEMOBJ;
    701701        }
    702702    }
     
    778778    {
    779779        PVMCPUCC pVCpu = VMCC_GET_CPU(pVM, idCpu);
    780         pVCpu->hm.s.svm.hMemObjVmcbHost  = NIL_RTR0MEMOBJ;
    781         pVCpu->hm.s.svm.hMemObjVmcb      = NIL_RTR0MEMOBJ;
    782         pVCpu->hm.s.svm.hMemObjMsrBitmap = NIL_RTR0MEMOBJ;
     780        pVCpu->hmr0.s.svm.hMemObjVmcbHost  = NIL_RTR0MEMOBJ;
     781        pVCpu->hmr0.s.svm.hMemObjVmcb      = NIL_RTR0MEMOBJ;
     782        pVCpu->hmr0.s.svm.hMemObjMsrBitmap = NIL_RTR0MEMOBJ;
    783783    }
    784784
     
    797797         * FS, GS, Kernel GS Base, etc.) apart from the host-state save area specified in MSR_K8_VM_HSAVE_PA.
    798798         */
    799         rc = RTR0MemObjAllocCont(&pVCpu->hm.s.svm.hMemObjVmcbHost, SVM_VMCB_PAGES << PAGE_SHIFT, false /* fExecutable */);
     799/** @todo Does this need to be below 4G? */
     800        rc = RTR0MemObjAllocCont(&pVCpu->hmr0.s.svm.hMemObjVmcbHost, SVM_VMCB_PAGES << PAGE_SHIFT, false /* fExecutable */);
    800801        if (RT_FAILURE(rc))
    801802            goto failure_cleanup;
    802803
    803         void *pvVmcbHost               = RTR0MemObjAddress(pVCpu->hm.s.svm.hMemObjVmcbHost);
    804         pVCpu->hm.s.svm.HCPhysVmcbHost = RTR0MemObjGetPagePhysAddr(pVCpu->hm.s.svm.hMemObjVmcbHost, 0 /* iPage */);
    805         Assert(pVCpu->hm.s.svm.HCPhysVmcbHost < _4G);
     804        void *pvVmcbHost                    = RTR0MemObjAddress(pVCpu->hmr0.s.svm.hMemObjVmcbHost);
     805        pVCpu->hmr0.s.svm.HCPhysVmcbHost    = RTR0MemObjGetPagePhysAddr(pVCpu->hmr0.s.svm.hMemObjVmcbHost, 0 /* iPage */);
     806        Assert(pVCpu->hmr0.s.svm.HCPhysVmcbHost < _4G);
    806807        ASMMemZeroPage(pvVmcbHost);
    807808
     
    809810         * Allocate one page for the guest-state VMCB.
    810811         */
    811         rc = RTR0MemObjAllocCont(&pVCpu->hm.s.svm.hMemObjVmcb, SVM_VMCB_PAGES << PAGE_SHIFT, false /* fExecutable */);
     812/** @todo Does this need to be below 4G? */
     813        rc = RTR0MemObjAllocCont(&pVCpu->hmr0.s.svm.hMemObjVmcb, SVM_VMCB_PAGES << PAGE_SHIFT, false /* fExecutable */);
    812814        if (RT_FAILURE(rc))
    813815            goto failure_cleanup;
    814816
    815         pVCpu->hm.s.svm.pVmcb           = (PSVMVMCB)RTR0MemObjAddress(pVCpu->hm.s.svm.hMemObjVmcb);
    816         pVCpu->hm.s.svm.HCPhysVmcb      = RTR0MemObjGetPagePhysAddr(pVCpu->hm.s.svm.hMemObjVmcb, 0 /* iPage */);
    817         Assert(pVCpu->hm.s.svm.HCPhysVmcb < _4G);
    818         ASMMemZeroPage(pVCpu->hm.s.svm.pVmcb);
     817        pVCpu->hmr0.s.svm.pVmcb             = (PSVMVMCB)RTR0MemObjAddress(pVCpu->hmr0.s.svm.hMemObjVmcb);
     818        pVCpu->hmr0.s.svm.HCPhysVmcb        = RTR0MemObjGetPagePhysAddr(pVCpu->hmr0.s.svm.hMemObjVmcb, 0 /* iPage */);
     819        Assert(pVCpu->hmr0.s.svm.HCPhysVmcb < _4G);
     820        ASMMemZeroPage(pVCpu->hmr0.s.svm.pVmcb);
    819821
    820822        /*
     
    822824         * SVM to not require one.
    823825         */
    824         rc = RTR0MemObjAllocCont(&pVCpu->hm.s.svm.hMemObjMsrBitmap, SVM_MSRPM_PAGES << X86_PAGE_4K_SHIFT,
     826/** @todo Does this need to be below 4G? */
     827        rc = RTR0MemObjAllocCont(&pVCpu->hmr0.s.svm.hMemObjMsrBitmap, SVM_MSRPM_PAGES << X86_PAGE_4K_SHIFT,
    825828                                 false /* fExecutable */);
    826829        if (RT_FAILURE(rc))
    827830            goto failure_cleanup;
    828831
    829         pVCpu->hm.s.svm.pvMsrBitmap     = RTR0MemObjAddress(pVCpu->hm.s.svm.hMemObjMsrBitmap);
    830         pVCpu->hm.s.svm.HCPhysMsrBitmap = RTR0MemObjGetPagePhysAddr(pVCpu->hm.s.svm.hMemObjMsrBitmap, 0 /* iPage */);
     832        pVCpu->hmr0.s.svm.pvMsrBitmap       = RTR0MemObjAddress(pVCpu->hmr0.s.svm.hMemObjMsrBitmap);
     833        pVCpu->hmr0.s.svm.HCPhysMsrBitmap   = RTR0MemObjGetPagePhysAddr(pVCpu->hmr0.s.svm.hMemObjMsrBitmap, 0 /* iPage */);
    831834        /* Set all bits to intercept all MSR accesses (changed later on). */
    832         ASMMemFill32(pVCpu->hm.s.svm.pvMsrBitmap, SVM_MSRPM_PAGES << X86_PAGE_4K_SHIFT, UINT32_C(0xffffffff));
     835        ASMMemFill32(pVCpu->hmr0.s.svm.pvMsrBitmap, SVM_MSRPM_PAGES << X86_PAGE_4K_SHIFT, UINT32_C(0xffffffff));
    833836   }
    834837
     
    10071010
    10081011    PVMCPUCC     pVCpu0 = VMCC_GET_CPU_0(pVM);
    1009     PSVMVMCB     pVmcb0 = pVCpu0->hm.s.svm.pVmcb;
     1012    PSVMVMCB     pVmcb0 = pVCpu0->hmr0.s.svm.pVmcb;
    10101013    AssertMsgReturn(RT_VALID_PTR(pVmcb0), ("Invalid pVmcb (%p) for vcpu[0]\n", pVmcb0), VERR_SVM_INVALID_PVMCB);
    10111014    PSVMVMCBCTRL pVmcbCtrl0 = &pVmcb0->ctrl;
     
    11421145     * Don't intercept guest read/write accesses to these MSRs.
    11431146     */
    1144     uint8_t *pbMsrBitmap0 = (uint8_t *)pVCpu0->hm.s.svm.pvMsrBitmap;
     1147    uint8_t *pbMsrBitmap0 = (uint8_t *)pVCpu0->hmr0.s.svm.pvMsrBitmap;
    11451148    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_K8_LSTAR,          SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
    11461149    hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_K8_CSTAR,          SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE);
     
    11621165        hmR0SvmSetMsrPermission(pVCpu0, pbMsrBitmap0, MSR_IA32_SYSENTER_EIP, SVMMSREXIT_INTERCEPT_READ, SVMMSREXIT_INTERCEPT_WRITE);
    11631166    }
    1164     pVmcbCtrl0->u64MSRPMPhysAddr = pVCpu0->hm.s.svm.HCPhysMsrBitmap;
     1167    pVmcbCtrl0->u64MSRPMPhysAddr = pVCpu0->hmr0.s.svm.HCPhysMsrBitmap;
    11651168
    11661169    /* Initially all VMCB clean bits MBZ indicating that everything should be loaded from the VMCB in memory. */
     
    11701173    {
    11711174        PVMCPUCC     pVCpuCur = VMCC_GET_CPU(pVM, idCpu);
    1172         PSVMVMCB     pVmcbCur = pVCpuCur->hm.s.svm.pVmcb;
     1175        PSVMVMCB     pVmcbCur = pVCpuCur->hmr0.s.svm.pVmcb;
    11731176        AssertMsgReturn(RT_VALID_PTR(pVmcbCur), ("Invalid pVmcb (%p) for vcpu[%u]\n", pVmcbCur, idCpu), VERR_SVM_INVALID_PVMCB);
    11741177        PSVMVMCBCTRL pVmcbCtrlCur = &pVmcbCur->ctrl;
     
    11781181
    11791182        /* Copy the MSR bitmap and setup the VCPU-specific host physical address. */
    1180         uint8_t *pbMsrBitmapCur = (uint8_t *)pVCpuCur->hm.s.svm.pvMsrBitmap;
     1183        uint8_t *pbMsrBitmapCur = (uint8_t *)pVCpuCur->hmr0.s.svm.pvMsrBitmap;
    11811184        memcpy(pbMsrBitmapCur, pbMsrBitmap0, SVM_MSRPM_PAGES << X86_PAGE_4K_SHIFT);
    1182         pVmcbCtrlCur->u64MSRPMPhysAddr = pVCpuCur->hm.s.svm.HCPhysMsrBitmap;
     1185        pVmcbCtrlCur->u64MSRPMPhysAddr = pVCpuCur->hmr0.s.svm.HCPhysMsrBitmap;
    11831186
    11841187        /* Initially all VMCB clean bits MBZ indicating that everything should be loaded from the VMCB in memory. */
     
    12111214        return pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pVmcb);
    12121215#endif
    1213     return pVCpu->hm.s.svm.pVmcb;
     1216    return pVCpu->hmr0.s.svm.pVmcb;
    12141217}
    12151218
     
    21272130                /* 32-bit guests uses LSTAR MSR for patching guest code which touches the TPR. */
    21282131                pVmcb->guest.u64LSTAR = u8Tpr;
    2129                 uint8_t *pbMsrBitmap = (uint8_t *)pVCpu->hm.s.svm.pvMsrBitmap;
     2132                uint8_t *pbMsrBitmap = (uint8_t *)pVCpu->hmr0.s.svm.pvMsrBitmap;
    21302133
    21312134                /* If there are interrupts pending, intercept LSTAR writes, otherwise don't intercept reads or writes. */
     
    21932196static void hmR0SvmMergeVmcbCtrlsNested(PVMCPUCC pVCpu)
    21942197{
    2195     PVMCC          pVM             = pVCpu->CTX_SUFF(pVM);
    2196     PCSVMVMCB    pVmcb           = pVCpu->hm.s.svm.pVmcb;
     2198    PVMCC        pVM             = pVCpu->CTX_SUFF(pVM);
     2199    PCSVMVMCB    pVmcb           = pVCpu->hmr0.s.svm.pVmcb;
    21972200    PSVMVMCB     pVmcbNstGst     = pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pVmcb);
    21982201    PSVMVMCBCTRL pVmcbNstGstCtrl = &pVmcbNstGst->ctrl;
     
    24702473DECLINLINE(void) hmR0SvmMergeMsrpmNested(PHMPHYSCPU pHostCpu, PVMCPUCC pVCpu)
    24712474{
    2472     uint64_t const *pu64GstMsrpm    = (uint64_t const *)pVCpu->hm.s.svm.pvMsrBitmap;
     2475    uint64_t const *pu64GstMsrpm    = (uint64_t const *)pVCpu->hmr0.s.svm.pvMsrBitmap;
    24732476    uint64_t const *pu64NstGstMsrpm = (uint64_t const *)pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pvMsrBitmap);
    24742477    uint64_t       *pu64DstMsrpm    = (uint64_t *)pHostCpu->n.svm.pvNstGstMsrpm;
     
    29562959    if (CPUMIsHyperDebugStateActive(pVCpu))
    29572960    {
    2958         PSVMVMCB pVmcb = pVCpu->hm.s.svm.pVmcb; /** @todo nested-guest. */
     2961        PSVMVMCB pVmcb = pVCpu->hmr0.s.svm.pVmcb; /** @todo nested-guest. */
    29592962        Assert(pVmcb->ctrl.u16InterceptRdDRx == 0xffff);
    29602963        Assert(pVmcb->ctrl.u16InterceptWrDRx == 0xffff);
     
    41294132    {
    41304133        Assert(!pSvmTransient->fIsNestedGuest);
    4131         PCSVMVMCB pVmcb = pVCpu->hm.s.svm.pVmcb;
     4134        PCSVMVMCB pVmcb = pVCpu->hmr0.s.svm.pVmcb;
    41324135        if (pVM->hm.s.fTPRPatchingActive)
    41334136            pSvmTransient->u8GuestTpr = pVmcb->guest.u64LSTAR;
     
    42494252    uint8_t *pbMsrBitmap;
    42504253    if (!pSvmTransient->fIsNestedGuest)
    4251         pbMsrBitmap = (uint8_t *)pVCpu->hm.s.svm.pvMsrBitmap;
     4254        pbMsrBitmap = (uint8_t *)pVCpu->hmr0.s.svm.pvMsrBitmap;
    42524255    else
    42534256    {
     
    44694472    RT_ZERO(SvmTransient);
    44704473    SvmTransient.fUpdateTscOffsetting = true;
    4471     SvmTransient.pVmcb = pVCpu->hm.s.svm.pVmcb;
     4474    SvmTransient.pVmcb = pVCpu->hmr0.s.svm.pVmcb;
    44724475
    44734476    VBOXSTRICTRC rc = VERR_INTERNAL_ERROR_5;
     
    44914494         */
    44924495        hmR0SvmPreRunGuestCommitted(pVCpu, &SvmTransient);
    4493         rc = hmR0SvmRunGuest(pVCpu, pVCpu->hm.s.svm.HCPhysVmcb);
     4496        rc = hmR0SvmRunGuest(pVCpu, pVCpu->hmr0.s.svm.HCPhysVmcb);
    44944497
    44954498        /* Restore any residual host-state and save any bits shared between host and guest
     
    45104513        HMSVM_EXITCODE_STAM_COUNTER_INC(SvmTransient.u64ExitCode);
    45114514        STAM_PROFILE_ADV_STOP_START(&pVCpu->hm.s.StatPreExit, &pVCpu->hm.s.StatExitHandling, x);
    4512         VBOXVMM_R0_HMSVM_VMEXIT(pVCpu, &pVCpu->cpum.GstCtx, SvmTransient.u64ExitCode, pVCpu->hm.s.svm.pVmcb);
     4515        VBOXVMM_R0_HMSVM_VMEXIT(pVCpu, &pVCpu->cpum.GstCtx, SvmTransient.u64ExitCode, pVCpu->hmr0.s.svm.pVmcb);
    45134516        rc = hmR0SvmHandleExit(pVCpu, &SvmTransient);
    45144517        STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatExitHandling, x);
     
    45444547    RT_ZERO(SvmTransient);
    45454548    SvmTransient.fUpdateTscOffsetting = true;
    4546     SvmTransient.pVmcb = pVCpu->hm.s.svm.pVmcb;
     4549    SvmTransient.pVmcb = pVCpu->hmr0.s.svm.pVmcb;
    45474550
    45484551    PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
     
    45734576        hmR0SvmPreRunGuestCommitted(pVCpu, &SvmTransient);
    45744577
    4575         rc = hmR0SvmRunGuest(pVCpu, pVCpu->hm.s.svm.HCPhysVmcb);
     4578        rc = hmR0SvmRunGuest(pVCpu, pVCpu->hmr0.s.svm.HCPhysVmcb);
    45764579
    45774580        /* Restore any residual host-state and save any bits shared between host and guest
     
    45924595        HMSVM_EXITCODE_STAM_COUNTER_INC(SvmTransient.u64ExitCode);
    45934596        STAM_PROFILE_ADV_STOP_START(&pVCpu->hm.s.StatPreExit, &pVCpu->hm.s.StatExitHandling, x);
    4594         VBOXVMM_R0_HMSVM_VMEXIT(pVCpu, pCtx, SvmTransient.u64ExitCode, pVCpu->hm.s.svm.pVmcb);
     4597        VBOXVMM_R0_HMSVM_VMEXIT(pVCpu, pCtx, SvmTransient.u64ExitCode, pVCpu->hmr0.s.svm.pVmcb);
    45954598        rc = hmR0SvmHandleExit(pVCpu, &SvmTransient);
    45964599        STAM_PROFILE_ADV_STOP(&pVCpu->hm.s.StatExitHandling, x);
     
    64846487
    64856488            /* Don't intercept DRx read and writes. */
    6486             PSVMVMCB pVmcb = pVCpu->hm.s.svm.pVmcb;
     6489            PSVMVMCB pVmcb = pVCpu->hmr0.s.svm.pVmcb;
    64876490            pVmcb->ctrl.u16InterceptRdDRx = 0;
    64886491            pVmcb->ctrl.u16InterceptWrDRx = 0;
     
    72967299
    72977300    /* Paranoia; Ensure we cannot be called as a result of event delivery. */
    7298     PSVMVMCB pVmcb = pVCpu->hm.s.svm.pVmcb;
     7301    PSVMVMCB pVmcb = pVCpu->hmr0.s.svm.pVmcb;
    72997302    Assert(!pVmcb->ctrl.ExitIntInfo.n.u1Valid);  NOREF(pVmcb);
    73007303
     
    74537456     */
    74547457    PVMCC      pVM   = pVCpu->CTX_SUFF(pVM);
    7455     PSVMVMCB pVmcb = pVCpu->hm.s.svm.pVmcb;
     7458    PSVMVMCB pVmcb = pVCpu->hmr0.s.svm.pVmcb;
    74567459    PCPUMCTX pCtx  = &pVCpu->cpum.GstCtx;
    74577460    int rc = DBGFTrap01Handler(pVM, pVCpu, CPUMCTX2CORE(pCtx), pVmcb->guest.u64DR6, pVCpu->hm.s.fSingleInstruction);
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